Abstract: A method and apparatus for removing deposition products from internal surfaces of a processing chamber, and for preventing or slowing growth of such deposition products. A halogen containing gas is provided to the chamber to etch away deposition products. A halogen scavenging gas is provided to the chamber to remove any residual halogen. The halogen scavenging gas is generally activated by exposure to electromagnetic energy, either inside the processing chamber by thermal energy, or in a remote chamber by electric field, UV, or microwave. A deposition precursor may be added to the halogen scavenging gas to form a deposition resistant film on the internal surfaces of the chamber. Additionally, or alternately, a deposition resistant film may be formed by sputtering a deposition resistant metal onto internal components of the processing chamber in a PVD process.

Abstract: Aspects of the invention provide methods and devices. In one embodiment, the invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanopyramids are grown utilizing a CVD based selective area growth technique. The nanopyramids are grown directly or as core-shell structures.

Abstract: Embodiments disclosed herein generally relate to an HVPE chamber. The chamber may have two separate precursor sources coupled thereto to permit two separate layers to be deposited. For example, a gallium source and a separate aluminum source may be coupled to the processing chamber to permit gallium nitride and aluminum nitride to be separately deposited onto a substrate in the same processing chamber. The nitrogen may be introduced to the processing chamber at a separate location from the gallium and the aluminum and at a lower temperature. The different temperatures causes the gases to mix together, react and deposit on the substrate with little or no deposition on the chamber walls.

Abstract: A method of depositing a high quality low defect single crystalline Group III-Nitride film. A patterned substrate having a plurality of features with inclined sidewalls separated by spaces is provided. A Group III-Nitride film is deposited by a hydride vapor phase epitaxy (HVPE) process over the patterned substrate. The HVPE deposition process forms a Group III-Nitride film having a first crystal orientation in the spaces between features and a second different crystal orientation on the inclined sidewalls. The first crystal orientation in the spaces subsequently overgrows the second crystal orientation on the sidewalls and in the process turns over and terminates treading dislocations formed in the first crystal orientation.

Abstract: Embodiments disclosed herein generally relate to an HVPE chamber. The chamber may have two separate precursor sources coupled thereto to permit two separate layers to be deposited. For example, a gallium source and a separate aluminum source may be coupled to the processing chamber to permit gallium nitride and aluminum nitride to be separately deposited onto a substrate in the same processing chamber. The nitrogen may be introduced to the processing chamber at a separate location from the gallium and the aluminum and at a lower temperature. The different temperatures causes the gases to mix together, react and deposit on the substrate with little or no deposition on the chamber walls.

Abstract: The metal-organic chemical vapor deposition (MOCVD) fabrication of group III-nitride materials using in-situ generated hydrazine or fragments there from is described. For example, a method of fabricating a group III-nitride material includes forming hydrazine in an in-situ process. The hydrazine, or fragments there from, is reacted with a group III precursor in a metal-organic chemical vapor deposition (MOCVD) chamber. From the reacting, a group III-nitride layer is formed above a substrate.

Abstract: The plasma-assisted metal-organic chemical vapor deposition (MOCVD) fabrication of a p-type group III-nitride material is described. For example, a method of fabricating a p-type group III-nitride material includes generating a nitrogen-based plasma. A nitrogen-containing species from the nitrogen-based plasma is reacted with a group III precursor and a p-type dopant precursor in a metal-organic chemical vapor deposition (MOCVD) chamber. A group III-nitride layer including p-type dopants is then formed above a substrate.

Abstract: One embodiment of a quantum well structure comprises an active region including active layers that comprise quantum wells and barrier layers wherein some or all of the active layers are p type doped. P type doping some or all of the active layers improves the quantum efficiency of III-V compound semiconductor light emitting diodes by locating the position of the P-N junction in the active region of the device thereby enabling the dominant radiative recombination to occur within the active region. In one embodiment, the quantum well structure is fabricated in a cluster tool having a hydride vapor phase epitaxial (HVPE) deposition chamber with a eutectic source alloy. In one embodiment, the indium gallium nitride (InGaN) layer and the magnesium doped gallium nitride (Mg—GaN) or magnesium doped aluminum gallium nitride (Mg—AlGaN) layer are grown in separate chambers by a cluster tool to avoid indium and magnesium cross contamination.

Abstract: A layered group III-nitride article includes a single crystal silicon substrate, and a highly textured group III-nitride layer, such as GaN, disposed on the silicon substrate. The highly textured group III-nitride layer is crack free and has a thickness of at least 10 ?m. A method for forming highly textured group III-nitride layers includes the steps of providing a single crystal silicon comprising substrate, depositing a nanostructured InxGa1-xN (1?x?0) interlayer on the silicon substrate, and depositing a highly textured group III-nitride layer on the interlayer. The interlayer has a nano indentation hardness that is less than both the silicon substrate and the highly textured group III-nitride layer.

Abstract: Disclosed herein is an article comprising a substrate; an interlayer comprising aluminum nitride, gallium nitride, boron nitride, indium nitride or a solid solution of aluminum nitride, gallium nitride, boron nitride and/or indium nitride; the interlayer being directly disposed upon the substrate and in contact with the substrate; where the interlayer comprises a columnar film and/or nanorods and/or nanotubes; and a group-III nitride layer disposed upon the interlayer; where the group-III nitride layer completely covers a surface of the interlayer that is opposed to a surface in contact with the substrate; the group-III nitride layer being free from cracks.

Abstract: Embodiments of the present invention relate to apparatus and method for pretreatment of substrates for manufacturing devices such as light emitting diodes (LEDs) or laser diodes (LDs). One embodiment of the present invention comprises pretreating the aluminum oxide containing substrate by exposing a surface of the aluminum oxide containing substrate to a pretreatment gas mixture, wherein the pretreatment gas mixture comprises ammonia (NH3) and a halogen gas.

Abstract: The present invention generally provides apparatus and methods for forming LED structures. One embodiment of the present invention provides a method for fabricating a compound nitride structure comprising forming a first layer comprising a first group-III element and nitrogen on substrates in a first processing chamber by a hydride vapor phase epitaxial (HVPE) process or a metal organic chemical vapor deposition (MOCVD) process, forming a second layer comprising a second group-III element and nitrogen over the first layer in a second processing chamber by a MOCVD process, and forming a third layer comprising a third group-III element and nitrogen over the second layer by a MOCVD process.

Abstract: In one embodiment an integrated processing system for manufacturing compound nitride semiconductor devices comprising a metal organic chemical vapor deposition (MOCVD) chamber operable to form a gallium nitride (GaN) layer over one or more substrates with a thermal chemical-vapor-deposition process and to form a multi-quantum well (MQW) layer over the GaN layer, and a halogen containing gas source coupled with the MOCVD chamber operable for flowing a halogen containing gas into the MOCVD chamber to remove at least a portion of unwanted deposition build-up deposited when forming the GaN layer over the one or more substrate from one or more interior surfaces of the MOCVD chamber prior to forming the MQW layer over the GaN layer, wherein the halogen containing gas is selected from the group comprising fluorine, chlorine, bromine, iodine, HI gas, HCl gas, HBr gas, HF gas, NF3, and combinations thereof is provided.

Abstract: One embodiment of depositing a gallium nitride (GaN) film on a substrate comprises providing a source of indium (In) and gallium (Ga) and depositing a monolayer of indium (In) on the surface of the gallium nitride (GaN) film. The monolayer of indium (In) acts as a surfactant to modify the surface energy and facilitate the epitaxial growth of the film by suppressing three dimensional growth and enhancing or facilitating two dimensional growth. The deposition temperature is kept sufficiently high to enable the indium (In) to undergo absorption and desorption on the gallium nitride (GaN) film without being incorporated into the solid phase gallium nitride (GaN) film. The gallium (Ga) and indium (In) can be provided by a single source or separate sources.

Abstract: Embodiments of the present invention relate to apparatus and method for pretreatment of substrates for manufacturing devices such as light emitting diodes (LEDs) or laser diodes (LDs). One embodiment of the present invention comprises pre-treating the aluminum oxide containing substrate by exposing a surface of the aluminum oxide containing substrate to a pretreatment gas mixture, wherein the pretreatment gas mixture comprises ammonia (NH3) and a halogen gas.

Abstract: In one embodiment a method for fabricating a compound nitride semiconductor device comprising positioning one or more substrates on a susceptor in a processing region of a metal organic chemical vapor deposition (MOCVD) chamber comprising a showerhead, depositing a gallium nitride layer over the substrate with a thermal chemical-vapor-deposition process within the MOCVD chamber by flowing a first gallium containing precursor and a first nitrogen containing precursor through the showerhead into the MOCVD chamber, removing the one or more substrates from the MOCVD chamber without exposing the one or more substrates to atmosphere, flowing a chlorine gas into the processing chamber to remove contaminants from the showerhead, transferring the one or more substrates into the MOCVD chamber after removing contaminants from the showerhead, and depositing an InGaN layer over the GaN layer with a thermal chemical-vapor-deposition process within the MOCVD chamber is provided.

Abstract: Embodiments described herein generally relate to apparatus and methods for forming Group III-V materials by metal-organic chemical vapor deposition (MOCVD) processes and hydride vapor phase epitaxial (HVPE) processes. In one embodiment, a method for fabricating a nitrogen-face (N-face) polarity compound nitride semiconductor device is provided. The method comprises depositing a nitrogen containing buffer layer having N-face polarity over one or more substrates using a metal organic chemical vapor deposition (MOCVD) process to form one or more substrates having N-face polarity and depositing a gallium nitride (GaN) layer over the nitrogen containing buffer layer using a hydride vapor phase epitaxial (HVPE) deposition process, wherein the nitrogen containing buffer layer and the GaN layer are formed without breaking vacuum and exposing the one or more substrates to atmosphere.

Abstract: Group III-nitride N-type doping techniques are described.

Abstract: Methods of epitaxy of gallium nitride, and other such related films, and light emitting diodes on patterned sapphire substrates, and other such related substrates, are described.