Patents by Inventor Oliver Kniffler

Oliver Kniffler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030005313
    Abstract: A microcontroller for security applications includes an encryption unit between a bus and a functional unit. The encryption unit includes a gate and a key register. A memory is provided with a further encryption unit whose gate is connected between the register and the gate of the first encryption unit. As a result, the transferred information item is available in encrypted form at any point on the bus.
    Type: Application
    Filed: July 18, 2002
    Publication date: January 2, 2003
    Inventors: Berndt Gammel, Oliver Kniffler, Holger Sedlak
  • Publication number: 20030005206
    Abstract: A microprocessor configuration includes a central control and processing unit, a bus having a bus state line and data/address lines, and units connected to the bus. If none of the units is being addressed by the control and processing unit, random data values are transmitted on the data/address lines. Such a process and configuration masks the current profile of the microprocessor configuration with regard to the useful information to be transmitted through the bus.
    Type: Application
    Filed: July 19, 2002
    Publication date: January 2, 2003
    Inventor: Oliver Kniffler
  • Publication number: 20020169968
    Abstract: A microprocessor configuration includes a data bus for data transfer between functional units. On the bus side, each unit contains an encryption/decryption unit that is controlled synchronously by a random number generator.
    Type: Application
    Filed: June 3, 2002
    Publication date: November 14, 2002
    Inventors: Berndt Gammel, Oliver Kniffler, Holger Sedlak
  • Publication number: 20020156956
    Abstract: A method of operating a processor bus, with which a central unit (processor) makes accesses to various peripheral units, is described. The processor bus has the ability to change the order of the accesses as a function of the operating state of the peripheral units, and the peripheral units can either reject or delay the access.
    Type: Application
    Filed: March 28, 2002
    Publication date: October 24, 2002
    Inventors: Holger Sedlak, Oliver Kniffler, Wolfgang Gartner
  • Publication number: 20020078324
    Abstract: A microprocessor for processing various assembler codes, in which a parameter that designates the respective assembler code is provided in the microprocessor and, in dependence on how the parameter is set, a different relative addressing takes place. A method of relative addressing in the microprocessor is also disclosed in which, dependent on an operating state or parameter for the respective assembler code, relative addresses are differently determined.
    Type: Application
    Filed: August 10, 2001
    Publication date: June 20, 2002
    Inventors: Holger Sedlak, Oliver Kniffler
  • Publication number: 20020046377
    Abstract: The built-in self test method enables common and concurrent self testing of the combinatorial logic and the memory of an electronic circuit. The common self test circuit for the logic and the memory performs the self test simultaneously for the logic and for the memory.
    Type: Application
    Filed: September 17, 2001
    Publication date: April 18, 2002
    Inventors: Oliver Kniffler, Gerd Dirscherl