Abstract: A graphics processor that rasterises input primitives to generate graphics fragments to be processed and renders the graphics fragments to generate a first, higher resolution version of a render output. When processing of a render output is stopped before the render output is finished, the first resolution version of the render output is downsampled to a second, lower resolution and the downsampled data elements at the second resolution are written out together with a set of difference values indicative of the differences between the data elements at the first resolution and the downsampled data elements at the second resolution. Then, when processing of the render output is resumed, these values can be loaded in and used to reconstruct the array of data elements at the first resolution for use when continuing processing of the render output.

Abstract: A data processing system includes a memory and a processor in communication with the memory. The processor is configured to, when storing an array of data in the memory, produce information representative of the content of a block of data representing a particular region of the array of data, write the block of data to a data structure in the memory, and write the information representative of the content of the block of data to the data structure.

Abstract: In a data processing system comprising a cache system configured to transfer data stored in a memory system to a processor and vice-versa, a processing unit operable to read data from a cache of the cache system can send a read request for data to the cache. The cache system, in response to the read request, determines whether the requested data is present in the cache. When the requested data is present in the cache, the cache system returns the data from the cache to the processing unit and invalidates the entry for the data in the cache. When the requested data is not present in the cache, the cache system returns an indication of that to the processing unit, without the cache system sending a request for the data towards the memory system.

Abstract: A data processing system includes a cache system configured to transfer data stored in the memory system to a processor and to transfer data from the processor to the memory system. The cache system comprises a cache and a data encoder associated with the cache that is configured to encode uncompressed data from the cache for storing in the memory system in a compressed format, and decode compressed data from the memory system for storing in the cache in an uncompressed format.

Abstract: A graphics processor that rasterises input primitives to generate graphics fragments to be processed and renders the graphics fragments to generate a first, higher resolution version of a render output. When processing of a render output is stopped before the render output is finished, the first resolution version of the render output is downsampled to a second, lower resolution and the downsampled data elements at the second resolution are written out together with a set of difference values indicative of the differences between the data elements at the first resolution and the downsampled data elements at the second resolution. Then, when processing of the render output is resumed, these values can be loaded in and used to reconstruct the array of data elements at the first resolution for use when continuing processing of the render output.

Abstract: When processing graphics primitives in a graphics processing system, the render output is divided into a plurality of regions (40) for rendering, each region (40) comprising a respective area of the render output; and for sets of one or more primitives to be rendered, it is determined for which of the plurality of regions of the render output (40) the primitive(s) should be rendered; and for each region of the render output (40) it is determined the primitive(s) should be rendered for, geometry data for the primitive(s) is stored in memory in a respective data structure (42) along with an indication of state data that is to be used for rendering the primitive(s) for the region, such that the geometry data for the primitive(s) to be rendered is stored in a respective, different data structure (42) for each different region of the render output (40) it is determined the primitive(s) should be rendered for.

Abstract: When processing graphics primitives in a graphics processing system, the render output is divided into a plurality of regions for rendering, each region comprising a respective area of the render output. It is determined for which of the plurality of regions of the render output a primitive should be rendered for. For each region of the render output it is determined a primitive should be rendered for, geometry data for the primitive is stored in memory in a respective data structure for the region in a compressed form, such that the geometry data for the primitive to be rendered is stored in a compressed form, in a respective, different data structure for each different region of the render output it is determined the primitive should be rendered for.

Abstract: When processing graphics primitives in a graphics processing system, the render output is divided into a plurality of regions for rendering, each region comprising a respective area of the render output. It is determined for which of the plurality of regions of the render output a primitive should be rendered for. Primitive data for rendering the primitive is then stored either in a combined data structure in memory that is associated with a plurality of different regions of the render output, or is stored in a respective data structure for each region of the render output it is determined the primitive should be rendered for. Which manner the primitive data is stored is determined in dependence on a property, e.g. a coverage, of the primitive.

Abstract: When processing graphics primitives in a graphics processing system, the render output is divided into a plurality of regions for rendering, each region comprising a respective area of the render output. It is determined for which of the plurality of regions of the render output a primitive should be rendered for. Associated state data for rendering the primitive is stored in a “state data” data structure in memory. For each region of the render output it is determined the primitive should be rendered for, a reference to the associated state data for rendering the primitive is stored in a respective, different data structure for each different region of the render output it is determined the primitive should be rendered for.

Abstract: When processing a primitive when generating a render output in a graphics processor, the vertices for the primitive are loaded by a vertex loader, but before a primitive setup stage generates per-primitive data for the primitive using the loaded vertices for the primitive, an early culling test is performed for the primitive using data of the loaded vertices for the primitive. When the primitive passes the early culling test, the primitive is sent onwards to the primitive setup stage and to a rasteriser for rasterising the primitive, but when the primitive fails the early culling test, it is discarded from further processing at the early culling test.

Abstract: An instruction is included in a program, which instruction causes execution threads of a processor executing the program to determine whether they satisfy a condition which can only be satisfied by a subset of one or more execution threads at any one time. If a thread satisfies the condition, it executes subsequent instructions in the program. Otherwise, the thread sleeps. The subsequent instructions in the program can accordingly be executed by one execution thread subset at a time in serial order.

Abstract: A graphics processing system is disclosed having a cache system (24) arranged between memory (23) and the graphics processor (20), the cache system comprising a first cache (53) for transferring data to and from the graphics processor (20) and a second cache (54) arranged and configured to transfer data between the first cache (53) and memory (23). When data is to be written from the first cache (53) to memory (23), a cache controller (55) determines a data type of the data and, in dependence on the data type, either causes the data to be written into the second cache (54) without writing the data to memory (23), or causes the data to be written to memory (23) without storing the data in the second cache (54). In embodiments the second cache (54) is write-only allocated.

Abstract: An instruction is included in a program, which instruction causes execution threads of a processor executing the program to determine whether they satisfy a condition which can only be satisfied by a subset of one or more execution threads at any one time. If a thread satisfies the condition, it executes subsequent instructions in the program. Otherwise, the thread sleeps. The subsequent instructions in the program can accordingly be executed by one execution thread subset at a time in serial order.

Abstract: When generating a set of tile-lists for use in a tile-based graphics processing system when rendering a scene for display, vertex data is obtained for a plurality of draw calls, and the obtained vertex data is then processed to generate for each of the draw calls data indicative of which tile(s) the primitives associated with that draw call should be rendered for when rendering the scene for display. The vertex data for at least some of the plurality of draw calls can be obtained and processed out of order and/or in parallel and the data is then sorted based on a desired rendering order for the draw calls in order to generating a tile-list identifying the sequence of draw calls to be rendered. In embodiments, the generated data is sorted using a re-ordering buffer.

Abstract: When processing a primitive when generating a render output in a graphics processor, the vertices for the primitive are loaded by a vertex loader, but before a primitive setup stage generates per-primitive data for the primitive using the loaded vertices for the primitive, an early culling test is performed for the primitive using data of the loaded vertices for the primitive. When the primitive passes the early culling test, the primitive is sent onwards to the primitive setup stage and to a rasteriser for rasterising the primitive, but when the primitive fails the early culling test, it is discarded from further processing at the early culling test.

Abstract: A data processing system replicates the operation of a target graphics processor under test by making use of a native graphics processor of the data processing system. The native graphics processor is provided with executable program instructions that replicate some or all of the fixed function operations of the target graphics processor. The programmable processing circuitry of the graphics processor of the data processing system can then generate an output by executing the executable program instructions, rather than by using fixed function processing circuitry of the graphics processor of the data processing system. The data processing system can provide a “bit-exact” testing environment when replicating the operation of the target graphics processor using the native graphics processor, for example where the target graphics processor and native graphics processor are configured very differently from one another.

Abstract: A data processing system replicates the operation of a target graphics processor using a graphics processor of the data processing system. A driver for the target graphics processor converts higher level commands and program expressions intended for the target graphics processor into lower level control data and instructions suitable for use by the target graphics processor. The lower level control data and instructions suitable for use by the target graphics processor are then converted into lower level control data and instructions for the graphics processor of the data processing system. The graphics processor of the data processing system then generates an output using the lower level control data and instructions for the graphics processor of the data processing system. The data processing system provides an efficient and comprehensive testing environment when replicating the operation of the target graphics processor.

Abstract: A data processing system replicates the operation of a target graphics processor under test by making use of a native graphics processor of the data processing system. The native graphics processor is provided with executable program instructions that replicate some or all of the fixed function operations of the target graphics processor. The programmable processing circuitry of the graphics processor of the data processing system can then generate an output by executing the executable program instructions, rather than by using fixed function processing circuitry of the graphics processor of the data processing system. The data processing system can provide a “bit-exact” testing environment when replicating the operation of the target graphics processor using the native graphics processor, for example where the target graphics processor and native graphics processor are configured very differently from one another.

Abstract: A data processing system replicates the operation of a target graphics processor using a graphics processor of the data processing system. A driver for the target graphics processor converts higher level commands and program expressions intended for the target graphics processor into lower level control data and instructions suitable for use by the target graphics processor. The lower level control data and instructions suitable for use by the target graphics processor are then converted into lower level control data and instructions for the graphics processor of the data processing system. The graphics processor of the data processing system then generates an output using the lower level control data and instructions for the graphics processor of the data processing system. The data processing system provides an efficient and comprehensive testing environment when replicating the operation of the target graphics processor.