Abstract: Described herein are systems and techniques for providing photonic devices having efficient optical coupling between waveguides and optical fibers. The photonic devices comprise an edge coupler disposed within a cavity of a photonic integrated circuit (PIC) and a pluggable assembly removably coupled with the edge coupler. The PIC includes a spot size converter optically coupled to a waveguide to expand light received from the waveguide prior to exiting the PIC.

Abstract: Various devices, systems, and/or methods perform wireless chip to chip high speed data transmission. Strategies for such transmission include use of improved microbump antennas, wireless chip to chip interconnects, precoding and decoding strategies, channel design to achieve spatial multiplexing gain in line of sight transmissions, open cavity chip design for improved transmission, and/or mixed signal channel equalization.

Abstract: Embodiments disclosed herein include optoelectronic systems and methods of forming such systems. In an embodiment, an optoelectronic system comprises a first substrate, a second substrate over the first substrate, and a micro-ring resonator (MRR) over the second substrate. In an embodiment, a heater is integrated into the MRR, a cladding is over the MRR, and an opening is through the first substrate and the second substrate to expose a bottom surface of the MRR.

Abstract: A device may include an electronic-photonic assembly comprising: a photonic integrated circuit (PIC) comprising a waveguide extending near a sidewall of the PIC, an electronic integrated circuit (EIC) attached to the PIC; and an encapsulant at least partially encapsulating the EIC. A device may include an optical assembly comprising a detachable plug and a fiber attached to the detachable plug. A device may include an optical coupler between the sidewall of the PIC and the optical assembly, wherein the optical coupler is configured to couple light received from the waveguide to the fiber.

Abstract: A device may include an electronic-photonic assembly comprising: a photonic integrated circuit (PIC) comprising a waveguide defining a waveguide plane, an electronic integrated circuit (EIC) attached to the PIC; and an encapsulant at least partially encapsulating the EIC. A device may include an optical coupler attached to the PIC, wherein the optical coupler is configured to collimate, in a first direction that is angled relative to the waveguide plane, light emitted by the PIC upon being guided by the waveguide. A device may include an optical assembly comprising a detachable plug and a fiber attached to the detachable plug, wherein the optical assembly is positioned to receive the collimated light from the optical coupler.

Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed includes an integrated circuit (IC) package including a first die including a first surface and a second surface opposite the first surface, the first surface defined by a bulk semiconductor region of the first die, a second die including a third surface and a fourth surface opposite the third surface, the third surface defined by a bulk semiconductor region of the second die, the fourth surface facing towards the second surface, a first bonding layer between the second and fourth surfaces, the first bonding layer including first metal vias disposed therein, and a second bonding layer between the second and fourth surfaces, the second bonding layer including second metal vias disposed therein, the first bonding layer in direct contact with the second bonding layer, ones of the first metal vias in direct contact with ones of the second metal vias to electrically couple the first die to the second die.

Abstract: Described herein are techniques for light extraction in hybrid-bonded photonics packages, in which application-specific integrated circuits (ASICs) are attached to a photonic integrated circuit (PIC) via hybrid-bonding. The techniques developed by the inventors involve extraction of light from the backside of the PIC, as opposed to the top side or the edge of the PIC as in conventional devices. A photonic device comprises a substrate, a PIC, an ASIC and an optical assembly. The PIC is disposed on the substrate and has a first surface and a second surface. The first surface faces the substrate. The ASIC is hybrid-bonded to the second surface of the PIC. The optical assembly comprises a fiber array unit and an optical fiber. The optical assembly is disposed in an opening formed in the substrate and the optical assembly is configured to receive light through the first surface of the PIC.

Abstract: Described herein are packaged photonic devices configured to mitigate the negative effects of package warpage using piezoelectric transducers. As the package deforms due to mismatches in the coefficient of thermal expansion (CTE) among its components, the piezoelectric transducers are actuated to bend and conform to the resulting curvature of the photonic integrated circuit (PIC). By adapting their shape to the warped surface, the piezoelectric transducers restore and maintain proper optical alignment, thereby ensuring efficient fiber-to-PIC coupling despite the presence of package warpage. In one example, a photonic device comprises a PIC, an optical assembly attached to the PIC and comprising a fiber array unit (FAU) and a fiber array attached to the FAU, and a piezoelectric transducer attached to the FAU.

Abstract: Described herein are systems and techniques for providing photonic devices having glass substrates for use in an optical interconnect system. The photonic devices comprise a glass substrate and one or more optoelectronic assemblies coupled through openings of the glass substrate. Waveguides of the optoelectronic assemblies may be optically coupled with waveguides of the glass substrate forming an optical network through the glass substrate. The assembly waveguides may be optically coupled to the glass waveguides through pluggable optical couplers, evanescent coupling, and/or edge coupling.

Abstract: Described herein are fiber-connection structures for photonic integrated circuits (PICs). These fiber connection structures enable efficient optical coupling between integrated waveguides and corresponding optical fibers by facilitating reliable edge coupling. The fiber-connection designs developed by the inventor improve upon conventional approaches by increasing fan-out fiber capability, coupling efficiency and scalability. A photonic package comprises a substrate, a PIC, an application-specific integrated circuit (ASIC) and a glass coupler. The PIC is attached to the substrate and comprises a PIC waveguide having an end adjacent an edge of the PIC. The ASIC is attached to the PIC. The glass coupler is attached to the PIC and comprises a glass waveguide optically coupled to the PIC waveguide.

Abstract: Described herein are glass substrates that include a cavity and glass fingers extending into the cavity. A photonic integrated circuit (PIC) is positioned near the cavity such that a waveguide of the PIC is optically coupled to a waveguide of the glass substrate formed in one of the glass fingers. The structure described herein allows for improved coupling efficiency between the PIC and the glass substrate, and improved access for underfill and outgassing processes. This approach facilitates reliable packaging of large or multi-reticle PICs while maintaining high optical and mechanical performance.

Abstract: Described herein are robust fiber-connection structures for photonic integrated circuits (PICs). These fiber connection structures enable efficient optical coupling between integrated waveguides defined near an edge of a PIC and corresponding optical fibers, thereby facilitating reliable edge coupling. The fiber-connection designs developed by the inventor improve upon conventional approaches by minimizing damage associated die-sawing processes, reducing surface roughness and preventing underfill intrusion into the edge coupling region.

Abstract: Described herein are systems and methods for recovering manufacturing yield of semiconductor electro-optical systems. The methods and techniques leverage Optical Circuit Switching (OCS) to dynamically route connections away from faulty hardware and to maximize usage of the remaining functioning hardware. The OCS may be controlled to route connections based on information indicative of the performance of the optical channels and the electrical processing units of the semiconductor system.

Abstract: Multi-die composite packages including directly bonded IC die and at least one electro-thermo-mechanical die (ETMD). An ETMD is distinguished from an active IC die as an ETMD is a passive die lacking any semiconductor devices, such as transistors. In exemplary embodiments, an ETMD includes a substrate, which may be a crystalline semiconductor material, for example, and one or more through substrate vias (TSVs) passing through a thickness of the substrate. The TSVs may enable a ETMD to electrically interconnect an (active) IC die of a composite package to another IC die of the package or to a package host.

Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques related to multilevel dies, in particular to photonics integrated circuit dies with a thick portion and a thin portion, where the thick portion is placed within a cavity in a substrate and the thin portion serves as an overhang to physically couple with the substrate, to reduce a distance between electrical contacts on the thin portion of the die and electrical contacts on the substrate. Other embodiments may be described and/or claimed.

Abstract: Integrated circuit assemblies can be fabricated on a wafer scale, wherein a base template, having a plurality of openings, may cover a base substrate, such as a die wafer, wherein the base substrate has a plurality of first integrated circuit devices formed therein and wherein at least one second integrated circuit device is electrically attached to a corresponding first integrated circuit device through a respective opening in the base template. Thus, when the base substrate and base template are singulated into individual integrated circuit assemblies, the individual integrated circuit assemblies will each have a first integrated circuit that is edge aligned to a singulated portion of the base template. The singulated portion of the base template can provide an improved thermal path, mechanical strength, and/or electrical paths for the individual integrated circuit assemblies.

Abstract: An electronic device may include a photonic integrated circuit (PIC) coupled with a substrate. The PIC may communicate a photonic signal with one or more optical fibers. The PIC may process the photonic signal into an electronic signal. The PIC may extend between a first end and a second end. An electronic integrated circuit (EIC) may be coupled with the substrate. The EIC may communicate with the PIC. The EIC may transmit the electronic signal to the PIC. The EIC may receive the electronic signal from the PIC. The electronic device may include a lens assembly. The lens assembly may be coupled with the first end of the PIC. In an example, optical interconnects of the PIC are aligned with the lens assembly such that the lens assembly is configured to transmit the photonic signal communicated between PIC and the optical fibers.

Abstract: Embodiments disclosed herein include semiconductor devices. In an embodiment, a die comprises a substrate, where the substrate comprises a semiconductor material. In an embodiment a fiducial is on the substrate. In an embodiment, the fiducial is a cantilever beam that extends out past an edge of the substrate.

Abstract: Embodiments disclosed herein include optical packages. In an embodiment, an optical package comprises a package substrate, and a photonics die coupled to the package substrate. In an embodiment, a compute die is coupled to the package substrate, where the photonics die is communicatively coupled to the compute die by a bridge in the package substrate. In an embodiment, the optical package further comprises an optical waveguide embedded in the package substrate. In an embodiment, a first end of the optical waveguide is below the photonics die, and a second end of the optical waveguide is substantially coplanar with an edge of the package substrate.

Abstract: Ultra-thin, hyper-density semiconductor packages and techniques of forming such packages are described. An exemplary semiconductor package is formed with one or more of: (i) metal pillars having an ultra-fine pitch (e.g., a pitch that is greater than or equal to 150 ?m, etc.); (ii) a large die-to-package ratio (e.g., a ratio that is equal to or greater than 0.85, etc.); and (iii) a thin pitch translation interposer. Another exemplary semiconductor package is formed using coreless substrate technology, die back metallization, and low temperature solder technology for ball grid array (BGA) metallurgy. Other embodiments are described.