Abstract: A method of transmitting data in a system including at least one data channel and a separate clock channel is disclosed. The method involves combining a clock signal to be transmitted on the clock channel with a data signal to generate a combined clock and data signal. In one embodiment, the data signal has been generated from data words using an encoding scheme that shifts an energy spectrum of the data signal away from an energy spectrum of the clock signal. In another embodiment, the clock signal has a plurality of pulses each having a front edge and a back edge, and the data signal is modulated onto the clock signal by moving at least one edge (i.e. front or back or both) of the plurality of pulses, thereby to create a combined clock and data signal.

Abstract: Embodiments of a clock and data recovery method and apparatus include receiving a multi-channel serial digitally encoded signal and converting the received signal to digital data, or set of binary characters. One embodiment includes determining whether a phase of a sampling circuit is appropriate to sample meaningful data from a received signal; if the phase of the sampling circuit is not appropriate, the phase is shifted so that sampling occurs earlier or later for the received signal. The determination is based, in one embodiment, on the order and value of the samples taken, which indicate whether the samples are taken too close to a transition of the received signal.

Abstract: The present invention relates to a tuning circuit, more specifically to a tuning circuit for continuous-time filter capable of making exact the Gm value to minimize the variation of the cutoff frequency due to the variation of process in the Gm-C type of continuous-time filter.

Abstract: The present invention discloses a mixer using a replica voltage-current converter, and more particularly a mixer using the replica voltage-current (V-I) converter of the present invention, which feedbacks the output current of the replica voltage-current converter using an additional amplifier so as to improve the linearity thereof by the gain of the amplifier because the conventional mixer operating at a high speed dissipates a lot of electrical power to have low output impedance.

Abstract: There is disclosed a low frequency filter. A low frequency cutoff filter includes a filter circuit having a capacitor connected between an input terminal and an output terminal and an active resistor connected to the output terminal, having a very large resistance, and a bias circuit having a negative feedback to set a biasing voltage of the active resistor to a desired value, thereby implementing the cutoff filter within a semiconductor chip as one set with the capacitor having a small capacitance. A low frequency pass filter includes an active resistor having a very large resistance, means for setting a biasing voltage of the active resistor to a desired value, and a capacitor connected between the output terminal and the ground. Therefore, the low pass filter can be integrated-circuited using even small capacitor.

Abstract: A double mode modulator, particularly, for a portable telephone, which is adapted to realize both digital and analog modulations and have a low phase noise and a reduced locking time with a device readily integrated in an integrated circuit, including: a frequency synthesizer for synthesizing a particular frequency from an external reference clock signal; a digital modulator for performing a quadrature modulation for an output signal of the frequency synthesizer; and an analog modulator for performing a frequency modulation for the output signal of the frequency synthesizer.

Abstract: This invention relates to a novel 2-hydroxypropionic acid derivative and its manufacturing method. Based on its mechanism to inhibit the CPT I, 2-hydroxypropionic acid derivative of this invention has blood glucose lowering effects so that the derivative may be effectively used as an antidiabetic agent having remarkable antidiabetic activity and fewer side effects.

Abstract: This invention relates to a novel oxirane carboxylic acid derivative and thereof manufacturing method. Based on thereof mechanism to inhibit the CPT I, oxirane carboxylic acid derivative of this invention has blood glucose lowering effects so that the derivative may be effectively used as an antidiabetic agent having remarkable antidiabetic activity and less side effects.

Abstract: A CMOS offset trimming circuit and offset generation circuit for obtaining the corrected optimum offset value for correcting the offset generated in the CMOS analog circuit. An offset trimming circuit comprises a flip-flop for loading a data to be used for obtaining an optimum offset value or a data to be trimmed according to an input clock, a fuse circuit for setting the circuit with a corrected optimum offset value obtained in a corresponding mode by receiving the data loaded on the flip-flop and the mode selection signal as an input signal, and a selection logic circuit for outputting a selected signal as a trimming output signal by selecting one from the group consisting of the data loaded on the flip-flop and the data output from the fuse circuit according to the operation mode.

Abstract: Disclosed is an aqueous organic-inorganic complex coating composition for a thin film which has a good curing characteristic at a low temperature and various good characteristics. The organic-inorganic complex coating composition for a steel sheet comprises about 100 weight parts of a water-soluble acrylic or vinyl modified organic high polymer resin, about 5 to 100 weight parts of a silica-based inorganic compound and about 1 to 50 weight parts of a curing agent based on the solid content of the water-soluble organic high polymer resin. The thin coating layer formed on the steel sheet using the organic-inorganic complex coating composition of the present invention has a good curing characteristic at a low temperature. Moreover, alkaline-resistance, corrosion-resistance, adhesiveness to the material, electrodeposition coating characteristic, anti-powdering characteristic, continuous weldability, and work efficiency of the coating are good.

Abstract: An integrated circuit built-in type power delay circuit which is capable of supplying a stable supply power to each circuit of the integrated circuit by generating a supply power control signal voltage after a predetermined time. The circuit includes a receiving unit for receiving a supply voltage VDD and charging the same, a supplying unit for supplying a current, an inverting unit for inverting an output value from the charging unit, a switching unit controlled in accordance with an output value from the inverting unit for switching an output from the current supply unit, a current regenerating unit for receiving a control of the switching unit and discharging an output value from the charging unit, an electric potential value conversion unit controlled by an output value from the inverting unit for converting an output value from the charging unit into a low level, and a buffering unit for receiving an output value from the inverting unit for buffering the output value and outputting a non-inverted signal.

Abstract: The digital logic level conversion circuit is for converting a small sinusoidal signal or an unbalanced digital signal to a balanced digital signal with 50% duty ratio, and includes an input level shift circuit, two differential amplifiers, an RS flip-flop, a charge-pump circuit, and a bias circuit. The input level shift circuit for AC coupling a sinusoidal wave with a small amplitude (with a minimum of 0.4 Vpp) and converting it into a middle logic level. The two differential amplifiers is used as comparators having hysteresis each other, operates inversely, and outputs digital signals into the RS flip-flop; the bias circuit for controlling a driving current of the differential amplifiers; the RS flip-flop for driving the charge-pump circuit by outputting a digital signal upon receiving outputs from the differential amplifiers; and the charge-pump circuit for generating a reference potential level of the differential amplifiers.

Abstract: A voltage control oscillation circuit for a CMOS which is capable of reducing phase noise and power consumption by adapting a voltage amplitude control loop and a common mode feedback circuit to a conventional LC-tank circuit. The circuit includes an LC-tank oscillation unit for outputting an oscillation voltage, an output common mode feedback unit for receiving an output from the LC-tank oscillation unit and eliminating a common mode noise of the output, and a voltage amplitude control unit for controlling a bias current of the LC-tank oscillation unit in accordance with a voltage difference at both ends of an LC-tank oscillation terminal which voltage is applied thereto through the output common mode feedback unit, for thus controlling the amount of an oscillation voltage.

Abstract: A double-deck videocassette recorder (VCR) requires only one luminance/chrominance signal processor, rather than the two which are conventionally necessary for a double-deck VCR. The first deck has only a pickup head, whereas the second deck has both pickup and record heads. A first switching unit selects playback mode control signals from either the first deck servo or the second deck servo, to be provided to the single to the luminance/chrominance signal processor. The first switching unit also selects playback control signals from either the first deck system controller or the second deck system controller, to be provided to the single to the luminance/chrominance signal processor.

Abstract: A digital-to-analog (D/A) converter of current segmentation is disclosed. A plurality of current sources are connected in parallel to one another and connected to a load resistance through a plurality of first switches. A second switch is connected in parallel to the first switches and operates oppositely to the first switches. An output impedance compensation resistance is connected in series to the second switch.

Abstract: A method for autofocusing a video camera, adjusting the focus by defining the focus range in which the contrast signal is extracted, generating the control clock pulse having higher frequencies than the video signal during the occurrence period of horizontal and vertical synchronizing signals corresponding to the focus range, sampling the video signals obtained in the image pick-up elements by means of the control clock pulses, converting this sampled signal into digital signal, generating the digital differential signal which represents the difference between the values of one control clock pulse earlier one and current one, producing the digital weighted signal by transforming the digital differential signal by means of the nonlinear weight value, integrating the digital weighted signals for one or more fields or frames to obtain the focusing value, and moving the focusing lensd based on the focusing value to the location where the focusing value approximately reaches the maximum.