Patents by Inventor Osamu Fujita

Osamu Fujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113247
    Abstract: An infrared detecting device is provided. The infrared detecting device includes: a semiconductor substrate; a first layer having a first conductivity type on the semiconductor substrate; a light receiving layer on the first layer; and a second layer having a second conductivity type on the light receiving layer. A part of the first layer, the light receiving layer, and the second layer form a mesa structure. The second layer contains AlzIn1-zSb (0.05<z<0.18). The side surfaces and an upper surface of the mesa structure are covered with the protective layer. A part of an upper surface of the second layer that forms an interface between the second layer and the protective layer has an oxide layer made of a constituent material of the second layer. The oxide layer includes an oxide of Al and has no oxide of Sb.
    Type: Application
    Filed: June 8, 2023
    Publication date: April 4, 2024
    Applicant: Asahi Kasei Microdevices Corporation
    Inventors: Osamu MOROHARA, Yoshiki SAKURAI, Hiromi FUJITA, Hirotaka GEKA
  • Patent number: 11935973
    Abstract: Disclosed is an infrared detecting device with a high SNR. The infrared detecting device 100 includes a semiconductor substrate 10; a first layer 20 formed on the semiconductor substrate and having a first conductivity type; a light receiving layer 30 formed on the first layer; and a second layer 40 formed on the light receiving layer and having a second conductivity type. The first layer includes, in the stated order: a layer containing Alx(1)In1-x(1)Sb; a layer having a film thickness ty(1) in nanometers and containing Aly(1)In1-y(1)Sb; and a layer containing Alx(2)In1-x(2)Sb, where ty(1), x(1), x(2), and y(1) satisfy the following relations: for j=1, 2, 0<ty(1)?2360×(y(1)?x(j))?240 (0.11?y(1)?x(j)?0.19), 0<ty(1)??1215×(y(1)?x(j))+427 (0.19<y(1)?x(j)?0.33), and 0<x(j)<0.18.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: March 19, 2024
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Osamu Morohara, Hiromi Fujita, Hirotaka Geka
  • Publication number: 20220238236
    Abstract: Methods and systems to train a global model to estimate numbers of patients treated for each of multiple medical conditions by a medical facility, based on medicines administered by the medical facility. Training of the model may be tailored for a situation in which a first one of the medicines is administered for a plurality of the medical conditions and a second one of the medicines is administered for a subset of the plurality of medical conditions. Where the medicines include a general medicine administered for a plurality of the medical conditions, and one or more exclusive medicines, each administered for a respective one of the plurality of medical conditions, parameters of the model may be modified for the selected medical facility based a ratio at which the selected medical facility administers the general medicine amongst patients of a plurality of the diseases.
    Type: Application
    Filed: March 29, 2021
    Publication date: July 28, 2022
    Inventors: Xiaojun MA, Shuichi BEPPU, Matsuru YAMAZAKI, Osamu FUJITA, Genryou UMITSUKI
  • Patent number: 11393828
    Abstract: A semiconductor device comprises laterally-neighboring word lines having respective word line caps thereon, an active region between the laterally-neighboring word lines and word line caps, an insulating material and a semiconductive material adjacent the word line caps, and a digit line contact between opposing substantially vertical surfaces of the semiconductive material, between opposing substantially vertical surfaces of the insulating material, adjacent to substantially horizontal surfaces of the word line caps, and between opposing substantially vertical surfaces of the word line caps. A transition surface extending between and connecting the substantially horizontal surface and the substantially vertical surface of the respective word line caps projects toward a longitudinal axis extending centrally through the digit line contact. Methods of forming the semiconductor device are also disclosed, as are electronic systems including the semiconductor device.
    Type: Grant
    Filed: August 27, 2020
    Date of Patent: July 19, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Naoyoshi Kobayashi, Osamu Fujita, Katsumi Koge
  • Publication number: 20200395365
    Abstract: A semiconductor device comprises laterally-neighboring word lines having respective word line caps thereon, an active region between the laterally-neighboring word lines and word line caps, an insulating material and a semiconductive material adjacent the word line caps, and a digit line contact between opposing substantially vertical surfaces of the semiconductive material, between opposing substantially vertical surfaces of the insulating material, adjacent to substantially horizontal surfaces of the word line caps, and between opposing substantially vertical surfaces of the word line caps. A transition surface extending between and connecting the substantially horizontal surface and the substantially vertical surface of the respective word line caps projects toward a longitudinal axis extending centrally through the digit line contact. Methods of forming the semiconductor device are also disclosed, as are electronic systems including the semiconductor device.
    Type: Application
    Filed: August 27, 2020
    Publication date: December 17, 2020
    Inventors: Naoyoshi Kobayashi, Osamu Fujita, Katsumi Koge
  • Patent number: 10770466
    Abstract: A semiconductor device comprises laterally-neighboring word lines having respective word line caps thereon, an active region between the laterally-neighboring word lines and word line caps, an insulating material and a semiconductive material adjacent the word line caps, and a digit line contact between opposing substantially vertical surfaces of the semiconductive material, between opposing substantially vertical surfaces of the insulating material, adjacent to substantially horizontal surfaces of the word line caps, and between opposing substantially vertical surfaces of the word line caps. A transition surface extending between and connecting the substantially horizontal surface and the substantially vertical surface of the respective word line caps projects toward a longitudinal axis extending centrally through the digit line contact. Methods of forming the semiconductor device are also disclosed, as are electronic systems including the semiconductor device.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: September 8, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Naoyoshi Kobayashi, Osamu Fujita, Katsumi Koge
  • Publication number: 20200243539
    Abstract: A semiconductor device comprises laterally-neighboring word lines having respective word line caps thereon, an active region between the laterally-neighboring word lines and word line caps, an insulating material and a semiconductive material adjacent the word line caps, and a digit line contact between opposing substantially vertical surfaces of the semiconductive material, between opposing substantially vertical surfaces of the insulating material, adjacent to substantially horizontal surfaces of the word line caps, and between opposing substantially vertical surfaces of the word line caps. A transition surface extending between and connecting the substantially horizontal surface and the substantially vertical surface of the respective word line caps projects toward a longitudinal axis extending centrally through the digit line contact. Methods of forming the semiconductor device are also disclosed, as are electronic systems including the semiconductor device.
    Type: Application
    Filed: January 25, 2019
    Publication date: July 30, 2020
    Inventors: Naoyoshi Kobayashi, Osamu Fujita, Katsumi Koge
  • Patent number: 9443790
    Abstract: A semiconductor device includes a semiconductor substrate having a first surface, a through silicon via (TSV) that is formed so that at least a part thereof penetrates through the semiconductor substrate, and an insulation ring. The insulation ring is formed so as to penetrate through the semiconductor substrate and so as to surround the TSV. The insulation ring includes a tapered portion and a vertical portion. The tapered portion has a sectional area which is gradually decreased from the first surface toward a thickness direction of the semiconductor substrate. The vertical portion has a constant sectional area smaller than the tapered portion.
    Type: Grant
    Filed: January 22, 2014
    Date of Patent: September 13, 2016
    Assignee: PS4 Luxco S.a.r.l.
    Inventor: Osamu Fujita
  • Patent number: 9004029
    Abstract: A variable valve actuating apparatus includes: a first rotary member which includes a rotor fixed to one of the inner cam shaft and the outer cam shaft, and a receiving chamber formed within the first rotary member, and which is arranged to be rotated in an advance angle direction or in a retard angle direction relative to the drive rotary member by a hydraulic pressure selectively supplied to or drained from the advance angle operation chamber and the retard angle operation chamber; and a second rotary member fixed to the other of the inner cam shaft and the outer cam shaft, rotatably received within the receiving chamber of the first rotary member, and arranged to be rotated relative to the first rotary member and the drive rotary member within a predetermined angle range.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: April 14, 2015
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Atsushi Watanabe, Osamu Fujita, Tomoya Tsukada
  • Patent number: 8936948
    Abstract: A hard mask, a protective film, which protects the hard mask film from oxidation, a first mask film and a first organic film are sequentially stacked. The first organic film is processed into a first pattern, and the first mask film is etched using the patterned first organic film as a mask. After the first organic film is removed, a second organic film is formed. The second organic film is processed into a second pattern. The first mask film is secondary etched using the patterned second organic film as a mask so that the surface of the first mask film is exposed but the surface of the protective film is not exposed, thereby selectively patterning only the first mask film. After that, when removing the residual second organic film by ashing, it is possible to ensure the function of the protective film that protects the hard mask film from oxidation.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: January 20, 2015
    Assignee: PS4 Luxco S.A.R.L.
    Inventor: Osamu Fujita
  • Patent number: 8863708
    Abstract: Even if an internal combustion engine is stopped having a lock pin of a vane rotor kept disengaged from a lock recess, subsequent engine starting can instantly move the vane rotor to a desired angular position where the lock member an be engaged with the lock recess. The vane rotor has therein two passage control mechanisms each having a hydraulically actuated valve body. When the valve body is moved to a given position, retarding and advancing hydraulic holes become communicated to each other through an annular groove of the valve body. Due to this ON communication, retarding and advancing operation chambers become communicated, so that reciprocative swing movement of the vane rotor induced by an alternating torque produced at the starting of the engine is effectively made and thus the vane rotor can be quickly turned to the desired angular position for ease of engine starting.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: October 21, 2014
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Atsushi Watanabe, Yasuhide Takada, Osamu Fujita, Tetsuya Shibukawa
  • Patent number: 8847400
    Abstract: A semiconductor device comprises a material layer including a first surface and a trench with an opening in the first surface. The trench is formed in the material layer. The trench comprises a tapered portion and a vertical portion. The tapered portion is in contact with the opening and comprises a scalloping-forming trench. The vertical portion has a substantially vertical sidewall. A width of the scalloping-forming trench is larger than a width of the vertical portion.
    Type: Grant
    Filed: February 29, 2012
    Date of Patent: September 30, 2014
    Assignee: PS4 Luxco S.A.R.L.
    Inventors: Osamu Fujita, Yuki Togashi
  • Publication number: 20140217560
    Abstract: A semiconductor device includes a semiconductor substrate having a first surface, a through silicon via (TSV) that is formed so that at least a part thereof penetrates through the semiconductor substrate, and an insulation ring. The insulation ring is formed so as to penetrate through the semiconductor substrate and so as to surround the TSV. The insulation ring includes a tapered portion and a vertical portion. The tapered portion has a sectional area which is gradually decreased from the first surface toward a thickness direction of the semiconductor substrate. The vertical portion has a constant sectional area smaller than the tapered portion.
    Type: Application
    Filed: January 22, 2014
    Publication date: August 7, 2014
    Applicant: Elpida Memory, Inc.
    Inventor: Osamu FUJITA
  • Patent number: 8659152
    Abstract: A semiconductor device includes a semiconductor substrate having a first surface, a through silicon via (TSV) that is formed so that at least a part thereof penetrates through the semiconductor substrate, and an insulation ring. The insulation ring is formed so as to penetrate through the semiconductor substrate and so as to surround the TSV. The insulation ring includes a tapered portion and a vertical portion. The tapered portion has a sectional area which is gradually decreased from the first surface toward a thickness direction of the semiconductor substrate. The vertical portion has a constant sectional area smaller than the tapered portion.
    Type: Grant
    Filed: September 7, 2011
    Date of Patent: February 25, 2014
    Inventor: Osamu Fujita
  • Publication number: 20130284132
    Abstract: A variable valve actuating apparatus includes: a first rotary member which includes a rotor fixed to one of the inner cam shaft and the outer cam shaft, and a receiving chamber formed within the first rotary member, and which is arranged to be rotated in an advance angle direction or in a retard angle direction relative to the drive rotary member by a hydraulic pressure selectively supplied to or drained from the advance angle operation chamber and the retard angle operation chamber; and a second rotary member fixed to the other of the inner cam shaft and the outer cam shaft, rotatably received within the receiving chamber of the first rotary member, and arranged to be rotated relative to the first rotary member and the drive rotary member within a predetermined angle range.
    Type: Application
    Filed: April 22, 2013
    Publication date: October 31, 2013
    Applicant: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Atsushi WATANABE, Osamu Fujita, Tomoya Tsukada
  • Publication number: 20130233261
    Abstract: Even if an internal combustion engine is stopped having a lock pin of a vane rotor kept disengaged from a lock recess, subsequent engine starting can instantly move the vane rotor to a desired angular position where the lock member an be engaged with the lock recess. The vane rotor has therein two passage control mechanisms each having a hydraulically actuated valve body. When the valve body is moved to a given position, retarding and advancing hydraulic holes become communicated to each other through an annular groove of the valve body. Due to this ON communication, retarding and advancing operation chambers become communicated, so that reciprocative swing movement of the vane rotor induced by an alternating torque produced at the starting of the engine is effectively made and thus the vane rotor can be quickly turned to the desired angular position for ease of engine starting.
    Type: Application
    Filed: September 13, 2012
    Publication date: September 12, 2013
    Inventors: Atsushi WATANABE, Yasuhide TAKADA, Osamu FUJITA, Tetsuya SHIBUKAWA
  • Patent number: 8396691
    Abstract: A controller of a cell phone serving as the position detector reads time-sequentially anteroposterior positional information Pi?1, Pi+1, together with interest positional information Pi that is an object of determination (S103), and calculates, for example, vectors V1 and V2 showing a shift from Pi?1, to Pi and a shift from Pi to Pi+1, respectively (S104, S105), in order to calculate an amplitude of fluctuation representing a direction of change. The amplitude of fluctuation representing a direction of change is expressed by a value of dot product of the calculated vectors V1 and V2 (S106). When the value of dot product is lower than a predetermined value (S107: YES), a position is shown to greatly deviate in the vicinity of the interest positional information Pi. Therefore, the amplitude of fluctuation representing a direction of change is judged to be large, and the positional information is determined to be error (S108).
    Type: Grant
    Filed: January 21, 2008
    Date of Patent: March 12, 2013
    Assignee: Osaka Kyoiku University
    Inventor: Osamu Fujita
  • Publication number: 20130029436
    Abstract: A hard mask made of a material in which the pattern precision is degraded by oxidation, a protective film, which protects the hard mask film from oxidation, a first mask film and a first organic film are sequentially stacked. The first organic film is processed into a first pattern, and the first mask film is firstly etched using the patterned the first organic film as a mask. After the first organic film is removed, a second organic film is formed. The second organic film is processed into a second pattern. The first mask film is secondary etched using the patterned second organic film as a mask so that the surface of the first mask film is exposed but the surface of the protective film is not exposed, thereby selectively patterning only the first mask film. After that, when removing the residual second organic film by ashing, it is possible to ensure the function of the protective film that protects the hard mask film from oxidation.
    Type: Application
    Filed: July 26, 2012
    Publication date: January 31, 2013
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Osamu FUJITA
  • Publication number: 20120199984
    Abstract: A semiconductor device comprises a material layer including a first surface and a trench with an opening in the first surface. The trench is formed in the material layer. The trench comprises a tapered portion and a vertical portion. The tapered portion is in contact with the opening and comprises a scalloping-forming trench. The vertical portion has a substantially vertical sidewall. A width of the scalloping-forming trench is larger than a width of the vertical portion.
    Type: Application
    Filed: February 29, 2012
    Publication date: August 9, 2012
    Applicant: Elpida Memory, Inc.
    Inventors: Osamu FUJITA, Yuki TOGASHI
  • Publication number: 20120070918
    Abstract: A method of manufacturing a semiconductor device may include, but is not limited to the following processes. First and second grooves are formed in a semiconductor substrate having a first surface. The first and second grooves have substantially the same vertical dimension. The first surface has first and second regions surrounded by the first and second grooves, respectively. An actual resistance value of the semiconductor substrate between a first point on the first region and a second point on the second region is measured. The vertical dimension of the first and second grooves is calculated with reference to the actual resistance value.
    Type: Application
    Filed: September 14, 2011
    Publication date: March 22, 2012
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Osamu Fujita