Abstract: A switching output circuit is provided that enables an accurate control of output power. To achieve the objective, a switching output circuit according to an exemplary aspect of the present invention includes eight switching means, two electric storage means, and a control means, wherein the control means controls the switching means and switches a conduction state and a non-conduction state, by which the power supplied from a direct-current power supply is switched and supplied to an inductive load.

Abstract: A pulsed discharge device according to an exemplary aspect of the present invention includes a controller configured to determine an interruption time to a discharge time based on a predetermined time ratio between the discharge time and the interruption time when performing a pulsed discharge to repeat alternately a discharge and a pause in discharging of a chemical battery.

Abstract: A memory apparatus, includes: a memory including memory regions; a table storing a memory address and a number of reading times of data; a first buffer storing first data from another memory apparatus and a first memory address of the first data; a second buffer storing second data to the another memory apparatus and a second memory address of the second data; and a controller configured to store, when a first number of reading times being minimum in the table is smaller than a second number of reading times of the first data, the first data and the first memory address into the first buffer and outputs third data in a memory region of the first number and a third memory address of the third data to the another memory apparatus via the second buffer, and rewrites the third data and memory address with the first data and memory address.

Abstract: A pulsed discharge device according to an exemplary aspect of the present invention includes a controller configured to determine an interruption time to a discharge time based on a predetermined time ratio between the discharge time and the interruption time when performing a pulsed discharge to repeat alternately a discharge and a pause in discharging of a chemical battery.

Abstract: A switching output circuit is provided that enables an accurate control of output power. To achieve the objective, a switching output circuit according to an exemplary aspect of the present invention includes eight switching means, two electric storage means, and a control means, wherein the control means controls the switching means and switches a conduction state and a non-conduction state, by which the power supplied from a direct-current power supply is switched and supplied to an inductive load.

Abstract: A lithium ion secondary battery system allowing a high power efficiency and large effective capacity is provided. The system includes an external power source for charging a lithium ion secondary battery, and a controller for switching output modes including a continuous discharge mode, in which electric power is continuously supplied from the lithium ion secondary battery to the load, and a pulsed charge and discharge mode, in which pulsed electric power is supplied from the lithium ion secondary battery to the load, and pulsed electric power is supplied from the external power source to charge the lithium ion secondary battery during a low-level pulsed discharge period(s), which are periods during which electric power is not supplied to the load, wherein the controller switches the output modes to the pulsed charge and discharge mode when the lithium ion secondary battery has a voltage lower than a predetermined upper switching voltage.

Abstract: A memory device includes a storage unit in which a plurality of semiconductor chips each comprising a plurality of memory blocks respectively arranged in a planar direction and a plurality of redundant blocks respectively arranged in a planar direction are stacked, a detecting unit configured to detect a defect of each of the memory blocks in the storage unit; a checking unit configured to check free capacity in each of the redundant blocks in the storage unit, and a determining unit configured to determine a substitute block to be substituted for the memory block in which the defect has been detected from the redundant blocks having the free capacity.

Abstract: A memory device comprises a memory block including a plurality of cells each including an erase state and a program state, respectively; and a control circuit configured to execute, in response to a program command, program operation of applying a pulse to each cell to charge an electric charge and transferring the cell from the erase state to the program state. The control circuit executes, in response to a diagnostic command, diagnostic operation of applying to a diagnostic target cell the pulse within a range that the diagnostic target cell in the erase state in a memory block including stored data is not shifted to the program state, and checking whether or not a charge speed of the diagnostic target cell is faster than or equal to a charge speed of a slowest-speed cell whose charge speed is the slowest among normal cells.

Abstract: A memory apparatus, includes: a memory including memory regions; a table storing a memory address and a number of reading times of data; a first buffer storing first data from another memory apparatus and a first memory address of the first data; a second buffer storing second data to the another memory apparatus and a second memory address of the second data; and a controller configured to store, when a first number of reading times being minimum in the table is smaller than a second number of reading times of the first data, the first data and the first memory address into the first buffer and outputs third data in a memory region of the first number and a third memory address of the third data to the another memory apparatus via the second buffer, and rewrites the third data and memory address with the first data and memory address.

Abstract: A projector includes an alternately-current-driven light source and a liquid crystal light valve that modulates light output from the light source. The light source and the liquid crystal light valve are driven under a condition that a current drive signal of the light source and a vertical synchronizing signal of the liquid crystal light valve are synchronized, and a synchronization timing of the current drive signal and the vertical synchronizing signal is changed to a different synchronization timing based on accumulated operating time at intervals of each time or a plural times of activation or with the same synchronization timing.

Abstract: A memory device comprises a memory block including a plurality of cells each including an erase state and a program state, respectively; and a control circuit configured to execute, in response to a program command, program operation of applying a pulse to each cell to charge an electric charge and transferring the cell from the erase state to the program state. The control circuit executes, in response to a diagnostic command, diagnostic operation of applying to a diagnostic target cell the pulse within a range that the diagnostic target cell in the erase state in a memory block including stored data is not shifted to the program state, and checking whether or not a charge speed of the diagnostic target cell is faster than or equal to a charge speed of a slowest-speed cell whose charge speed is the slowest among normal cells.

Abstract: A projector includes a screen having a periodic array of color stripes for producing visible light depending on incident light, a light source that remits a light beam, a projection unit that scans an area of the screen where the color stripes are disposed, with the light beam in a direction across the color stripes, to display an image on the screen, a detector that detects the visible light from each of the color stripes as a feedback light pulse, and a controller that adjusts a start-of-emission timing of the light source based on a start-of-detection timing at which the feedback light pulse is detected by the detector and a detection period during which the feedback light pulse is detected by the detector, and controlling the light source to emit the light beam in order to apply light pulses to the color stripes within boundaries thereof.

Abstract: An electronic device includes: a nonvolatile memory; a volatile memory stacked over the nonvolatile memory; and a controller configured to store setting information of the volatile memory in the nonvolatile memory before cutting off power supply to the volatile memory, and to set the setting information stored in the nonvolatile memory to the volatile memory after resuming power supply to the volatile memory.

Abstract: A projection screen includes: phosphor regions arranged cyclically in an in-plane direction of a display region; a plurality of black stripes and reference black stripes that partition the display region into the phosphor regions; and an optical information formation unit that is provided in a specific position within the display region and that generates readable optical information.

Abstract: A semiconductor memory apparatus includes a memory block to include memory cells to hold data; a precharge control unit to control precharging the memory cells; a row decoder to output a row selection signal identifying a row address of the memory cells; an integral circuit to integrate a signal level of the row selection signal for a same row address, and to have an integral characteristic where an integral value of the signal level becomes a predetermined value when the row selection signal for the same row address is consecutively output for a predetermined number of times; and a determination unit to determine whether the integral value of the integral circuit becomes the predetermined value or greater. The precharge control unit turns off precharging the memory cells when the integral value of the integral circuit becomes the predetermined value or greater.

Abstract: A memory device includes a storage unit in which a plurality of semiconductor chips each comprising a plurality of memory blocks respectively arranged in a planar direction and a plurality of redundant blocks respectively arranged in a planar direction are stacked, a detecting unit configured to detect a defect of each of the memory blocks in the storage unit; a checking unit configured to check free capacity in each of the redundant blocks in the storage unit, and a determining unit configured to determine a substitute block to be substituted for the memory block in which the defect has been detected from the redundant blocks having the free capacity.

Abstract: A semiconductor memory apparatus includes a memory block to include memory cells to hold data; a precharge control unit to control precharging the memory cells; a row decoder to output a row selection signal identifying a row address of the memory cells; an integral circuit to integrate a signal level of the row selection signal for a same row address, and to have an integral characteristic where an integral value of the signal level becomes a predetermined value when the row selection signal for the same row address is consecutively output for a predetermined number of times; and a determination unit to determine whether the integral value of the integral circuit becomes the predetermined value or greater. The precharge control unit turns off precharging the memory cells when the integral value of the integral circuit becomes the predetermined value or greater.

Abstract: A memory module includes a plurality of memory chips stacked on top of one another, each of the plurality of memory chips including a memory cell unit that is divided into a plurality of blocks, and an address scrambling circuit that processes an input address signal and that selects a block to be operated.

Abstract: When an address indicating an access destination of a data storing unit, and a command indicating a content of a process for the address are input, block information corresponding to the input address is output from an information holding unit. Whether or not to execute the command for the address is decided on the basis of the output block information and the input command.

Abstract: A projector includes an alternately-current-driven light source and a liquid crystal light valve that modulates light output from the light source. The light source and the liquid crystal light valve are driven under a condition that a current drive signal of the light source and a vertical synchronizing signal of the liquid crystal light valve are synchronized, and a synchronization timing of the current drive signal and the vertical synchronizing signal is changed to a different synchronization timing based on accumulated operating time at intervals of each time or a plural times of activation or with the same synchronization timing.