Abstract: Some embodiments provide a hierarchical routing method that uses diagonal routes. This method routes a net within a particular region of an integrated circuit (“IC”) layout. This net includes several pins in the region. The method initially partitions the particular IC region into a first set of sub-regions. It then identifies a first route that connects a group of first-set sub-regions that contain the net's pins. The identified first route has an edge that is at least partially diagonal. The method next partitions the first-set sub-regions into a second set of smaller sub-regions. It then propagates the first route into the second-set sub-regions.

Abstract: The invention is directed towards routing method and apparatus. Some embodiments provide a routing method that uses diagonal routes. This method routes several nets within a region of a circuit layout. Each net includes a set of pins in the region. The method initially partitions the region into several sub-regions. For each particular net in the region, the method then identifies a route that connects the sub-regions that contains a pin from the set of pins of the particular net. Some of the identified routes have edges that are at least partially diagonal.

Abstract: Some embodiments provide a method of routing nets in a region of an integrated-circuit layout. This method initially identifies a characteristic of the region, and then selects a wiring model from a set of wiring models, based on the identified characteristic. Each wiring models specifies a set of routing directions. The method then routes the nets based on the selected wiring model.