Abstract: A method and apparatus for determining an RC (resistive-capacitive) time constant is disclosed. In one embodiment, a method comprises determining a first period of oscillation when an oscillator is operating in a first configuration. The method further the method further comprises determining a second period of oscillation when the oscillator is operating in a second configuration. A measurement circuit is configured to determine a resistive-capacitive (RC) time constant of the oscillator by determining a mean of the first and second periods.

Abstract: An RF receiver includes an RF signal reception path to process an input signal for the receiver for a first mode of the receiver; an oscillator; and a harmonic generator. The harmonic generator generates a harmonic signal in response to operation of the oscillator to replace the input signal with the harmonic signal for a second mode of the receiver.

Abstract: In an embodiment, a circuit device for coupling to an antenna includes a first impedance matching circuit configured to couple to the antenna and a second impedance matching circuit configured to couple to the antenna. The circuit device further includes a power amplifier coupled to the first impedance matching circuit and includes a low-noise amplifier coupled to the second impedance matching circuit. Additionally, the circuit device includes a selectable impedance adjustment circuit coupled between the low-noise amplifier and the second impedance matching circuit, which selectable impedance adjustment circuit is configured to selectively adjust an impedance associated with the low-noise amplifier when the power amplifier is transmitting a signal through the antenna.

Abstract: Matching network circuits and a method are shown for suppressing a harmonic frequency in a matching network. The circuits and method involve impedance matching first and second differential input nodes to a single ended output node using a first reactive impedance selected to pass a resonant frequency. They also involve suppressing a harmonic frequency of a common mode signal presented at the first and second differential input nodes by providing a series resonance from the first and second differential input nodes to a radio frequency ground potential, where the series resonance is selected to pass the harmonic frequency to the radio frequency ground potential.

Abstract: A system and method is shown for automatic frequency correction in a receiver, where the number of clock cycles in a baseband data signal, such as an I or Q channel of the receiver or an XOR of the I and Q channels, for a “1” state and a “0” state of a received data signal are each determined and the difference between the two is used to calculate a subsequent frequency offset correction value. The subsequent frequency offset correction value is added to a current offset correction value to obtain an actual offset correction value. The actual offset correction value is then used to adjust the frequency of the receiver clock.

Abstract: Matching network circuits and a method are shown for suppressing a harmonic frequency in a matching network. The circuits and method involve impedance matching first and second differential input nodes to a single ended output node using a first reactive impedance selected to pass a resonant frequency. They also involve suppressing a harmonic frequency of a common mode signal presented at the first and second differential input nodes by providing a series resonance from the first and second differential input nodes to a radio frequency ground potential, where the series resonance is selected to pass the harmonic frequency to the radio frequency ground potential.

Abstract: Disclosed is a filter circuit assembly that includes a filter stage with a variable resistor and a resistor/capacitor (RC) oscillator. A controlling output of the RC oscillator controls the value of the variable resistor. The RC oscillator itself also includes a variable resistor. The controlling output of the RC oscillator also controls the value of the variable resistor of the RC oscillator. The structure of the variable resistor of the filter stage is substantially the same as the structure of the variable resistor of the RC oscillator.

Abstract: Disclosed is a circuit and method for automatic tuning of a resonant circuit in a transceiver having a receiver and a transmitter that includes a power amplifier for driving the resonant circuit. During a transmit mode of the transceiver, a resonance voltage of the resonant circuit is compared to an input voltage signal to the power amplifier to determine an error signal that is converted into a control word. The control word drives an adjustable capacitance bank that is part of the resonant circuit. During a receive mode of the transceiver, the control word value is held constant to substantially maintain resonance of the resonant circuit during operation of the receiver.

Abstract: A system and method is shown for automatic frequency correction in a receiver, where the number of clock cycles in a baseband data signal, such as an I or Q channel of the receiver or an XOR of the I and Q channels, for a “1” state and a “0” state of a received data signal are each determined and the difference between the two is used to calculate a subsequent frequency offset correction value. The subsequent frequency offset correction value is added to a current offset correction value to obtain an actual offset correction value. The actual offset correction value is then used to adjust the frequency of the receiver clock.

Abstract: Disclosed is a filter circuit assembly that includes a filter stage with a variable resistor and a resistor/capacitor (RC) oscillator. A controlling output of the RC oscillator controls the value of the variable resistor. The RC oscillator itself also includes a variable resistor. The controlling output of the RC oscillator also controls the value of the variable resistor of the RC oscillator. The structure of the variable resistor of the filter stage is substantially the same as the structure of the variable resistor of the RC oscillator.

Abstract: Shown is a method and circuit for determining a calibration factor between a fast, high accuracy clock signal and a slow, low accuracy clock signal, which can be realised with a minimum number of electronic units, and which obtains the calibration factor in a very short time, thus minimising power consumption of the circuit. The present invention operates by counting the number of cycles of a high accuracy clock signal during a single cycle of a low accuracy clock signal to obtain a first number representing the number of cycles counted and then successively summing the first number until a sum of the first numbers reaches a first predetermined value. The count of the number of summing operations required to reach the first predetermined value is then used to determine the calibration parameter, which is proportional to the number of summing operations.

Abstract: Disclosed is a circuit and method for automatic tuning of a resonant circuit in a transceiver having a receiver and a transmitter that includes a power amplifier for driving the resonant circuit. During a transmit mode of the transceiver, a resonance voltage of the resonant circuit is compared to an input voltage signal to the power amplifier to determine an error signal that is converted into a control word. The control word drives an adjustable capacitance bank that is part of the resonant circuit. During a receive mode of the transceiver, the control word value is held constant to substantially maintain resonance of the resonant circuit during operation of the receiver.