Patents by Inventor Pankaj Sharma

Pankaj Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11960549
    Abstract: Data is collected from a network graph, wherein the collected data is useful for training a machine learning model on a query domain. A domain-specific template corresponding to the query domain is received, the domain-specific template defining one or more classifiers to guide collection of content relevant to the query domain from the network graph. A collection starting point is analyzed based on the one or more classifiers of the domain-specific template to identify one or more relevant instances of the content. The one or more identified relevant instances of the content are added to a contextual protocol package. Each identified relevant instance of the content is analyzed based on the one or more classifiers of the domain-specific template to identify one or more additional relevant instances of the content. The one or more identified additional relevant instances of the content are added to the contextual protocol package.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: April 16, 2024
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Yu Zhang, Pankaj Sharma, Manish Shukla, Grigoriy A Orlov
  • Publication number: 20240074138
    Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes a first data line; a second data line adjacent the first data line and separated from the first data line by a first dielectric structure; and a memory cell formed over the first and second data lines. The memory cell includes a first transistor including a first channel region formed over and coupled to the first data line, and a charge storage structure separated from the first channel region; a second transistor including a second channel region formed over and coupled to the second data line, wherein the charge storage structure is formed over and coupled to the second channel region; and a second dielectric structure between the first channel region and each of the second channel region and the charge storage structure.
    Type: Application
    Filed: August 25, 2023
    Publication date: February 29, 2024
    Inventors: Durai Vishak Nirmal Ramaswamy, Karthik Sarpatwari, Kamal M. Karda, Pankaj Sharma
  • Publication number: 20230349324
    Abstract: A turbofan engine is provided. The turbofan engine includes a fan; a turbomachine operably coupled to the fan for driving the fan, wherein the turbomachine, the fan, or both include an engine component; a heat source; and a heat transfer system configured to reduce ice buildup or ice formation in the engine component, the heat transfer system in communication with the heat source, the heat transfer system comprising: a first heat transfer component in communication with the heat source; and a second heat transfer component that extends from the first heat transfer component to or through the engine component, wherein the first heat transfer component comprises one of a heat pipe or a graphene rod, and wherein the second heat transfer component comprises the other of the heat pipe or the graphene rod.
    Type: Application
    Filed: June 16, 2022
    Publication date: November 2, 2023
    Inventors: Rajani Bhanu Poornima M, Vilas Kawaduji Bokade, Subramani Adhiachari, Sesha Subramanian, Pankaj Sharma, Ashish Sharma, Scott Alan Schimmels
  • Publication number: 20230315792
    Abstract: Data is collected from a network graph, wherein the collected data is useful for training a machine learning model on a query domain. A domain-specific template corresponding to the query domain is received, the domain-specific template defining one or more classifiers to guide collection of content relevant to the query domain from the network graph. A collection starting point is analyzed based on the one or more classifiers of the domain-specific template to identify one or more relevant instances of the content. The one or more identified relevant instances of the content are added to a contextual protocol package. Each identified relevant instance of the content is analyzed based on the one or more classifiers of the domain-specific template to identify one or more additional relevant instances of the content. The one or more identified additional relevant instances of the content are added to the contextual protocol package.
    Type: Application
    Filed: March 29, 2022
    Publication date: October 5, 2023
    Inventors: Yu ZHANG, Pankaj SHARMA, Manish SHUKLA, Grigoriy A. ORLOV
  • Publication number: 20230276624
    Abstract: An electronic device comprises a stack comprising tiers of alternating conductive structures and insulative structures, and pillars vertically extending through the stack. The pillars comprise a tunnel dielectric material, a channel material, and an insulative material substantially surrounded by the channel material. The electronic device comprises a memory material horizontally adjacent to the conductive structures without being horizontally adjacent to the insulative structures. Related memory devices, systems, and methods of forming the electronic devices are also described.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 31, 2023
    Inventors: Pankaj Sharma, Naveen Kaushik, Sidhartha Gupta
  • Publication number: 20230187346
    Abstract: A method of forming a microelectronic device comprises forming a stack structure comprising vertically alternating insulating structures and conductive structures arranged in tiers. Each of the tiers individually comprises one of the insulating structures and one of the conductive structures. A sacrificial material is formed over the stack structure and pillar structures are formed to extend vertically through the stack structure and the sacrificial material. The method comprises forming conductive plug structures within upper portions of the pillar structures, forming slots extending vertically through the stack structure and the sacrificial material, at least partially removing the sacrificial material to form openings horizontally interposed between the conductive plug structures, and forming a low-K dielectric material within the openings. Microelectronic devices, memory devices, and electronic systems are also described.
    Type: Application
    Filed: February 6, 2023
    Publication date: June 15, 2023
    Inventors: Naveen Kaushik, Sidhartha Gupta, Pankaj Sharma, Haitao Liu
  • Patent number: 11605589
    Abstract: A method of forming a microelectronic device comprises forming a stack structure comprising vertically alternating insulating structures and conductive structures arranged in tiers. Each of the tiers individually comprises one of the insulating structures and one of the conductive structures. A sacrificial material is formed over the stack structure and pillar structures are formed to extend vertically through the stack structure and the sacrificial material. The method comprises forming conductive plug structures within upper portions of the pillar structures, forming slots extending vertically through the stack structure and the sacrificial material, at least partially removing the sacrificial material to form openings horizontally interposed between the conductive plug structures, and forming a low-K dielectric material within the openings. Microelectronic devices, memory devices, and electronic systems are also described.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: March 14, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Naveen Kaushik, Sidhartha Gupta, Pankaj Sharma, Haitao Liu
  • Publication number: 20230039621
    Abstract: A method used in forming a memory array comprises forming a stack comprising vertically-alternating insulative tiers and conductive tiers. Channel-material strings of memory-cell strings extend through the insulative and conductive tiers. Conductive vias are formed above and individually electrically coupled to individual of the channel-material strings. Insulating material is laterally-between immediately-adjacent of the conductive vias. At least some of the insulating material is vertically removed to form an upwardly-open void-space that is circumferentially about multiple of the conductive vias. Insulative material is formed laterally-between the immediately-adjacent conductive vias to form a covered void-space from the upwardly-open void-space. Digitlines are formed above that are individually electrically coupled to a plurality of individual of the conductive vias there-below. Other embodiments, including structure independent of method, are disclosed.
    Type: Application
    Filed: August 5, 2021
    Publication date: February 9, 2023
    Applicant: Micron Technology, Inc.
    Inventors: Sidhartha Gupta, Naveen Kaushik, Pankaj Sharma
  • Publication number: 20230043781
    Abstract: Some embodiments include a ferroelectric transistor having an active region which includes a first source/drain region, a second source/drain region vertically offset from the first source/drain region, and a channel region between the first and second source/drain regions. A first conductive gate is operatively adjacent to the channel region of the active region. Insulative material is between the first conductive gate and the channel region. A second conductive gate is adjacent to the first conductive gate. Ferroelectric material is between the first and second conductive gates. Some embodiments include integrated memory. Some embodiments include methods of forming integrated assemblies.
    Type: Application
    Filed: October 10, 2022
    Publication date: February 9, 2023
    Applicant: Micron Technology, Inc.
    Inventor: Pankaj Sharma
  • Patent number: 11520808
    Abstract: The invention provides for a cloud-based solution that saves all the data in the cloud storage. The peer devices synchronize data among each other independent of the operating system since the data is synced via web services. Synchronization of data among peer devices is possible even when cloud service is unavailable via a router, Wi-Fi, Bluetooth, NFC or any other mechanism. The peer devices form a hierarchical structure, which designates a master, and the master communicates with the cloud-based service to synchronize data. The master then synchronizes data with the other peer devices in the hierarchy. New devices can be added to the peer devices and can join the hierarchy.
    Type: Grant
    Filed: February 9, 2019
    Date of Patent: December 6, 2022
    Inventor: Pankaj Sharma
  • Patent number: 11502179
    Abstract: Some embodiments include a ferroelectric transistor having an active region which includes a first source/drain region, a second source/drain region vertically offset from the first source/drain region, and a channel region between the first and second source/drain regions. A first conductive gate is operatively adjacent to the channel region of the active region. Insulative material is between the first conductive gate and the channel region. A second conductive gate is adjacent to the first conductive gate. Ferroelectric material is between the first and second conductive gates. Some embodiments include integrated memory. Some embodiments include methods of forming integrated assemblies.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: November 15, 2022
    Assignee: Micron Technology, Inc.
    Inventor: Pankaj Sharma
  • Publication number: 20220335034
    Abstract: Data services for workloads are often provided with a service level agreement specifying various performance guarantees (e.g., latency, availability, scalability, and consistency). Single-master architectures, in which updates t the data set are constrained to a single server, may limit the fulfillment of some performance guarantees. Presented herein are multi-master architectures, in which the server set is partitioned into at least two masters are permitted to update the data set and at least one non-master that is not permitted to update the data set. Non-masters that receive a request to update the data set forward the request to a master server for application to the data set. A master that receives the request applies it to the data set and propagates the update to other master and non-master servers. Conflicting updates may be resolved through a variety of conflict resolution techniques, optionally designating one master server as a conflict resolution server.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Inventors: Karthik RAMAN, Momin Mahmoud AL-GHOSHIEN, Bhalakumaaran ERODE RANGANATHAN, Madhan GAJENDRAN, Ji HUANG, Atul KATIYAR, Mikhail Mikhailovich KOLTACHEV, Sujit Vattathil KURUVILLA, Digvijaysinh Govindbhai MAKWANA, Subramanyam PATTIPAKA, Ovidiu Constantin PLATON, Ankur Savailal SHAH, Pankaj SHARMA, Dharma SHUKLA, Shreshth SINGHAL, Shireesh Kumar THOTA
  • Publication number: 20220318674
    Abstract: The disclosure herein describes managing artificial intelligence (AI) workloads in a cloud infrastructure platform. A set of distributed infrastructure resources are integrated into the cloud infrastructure platform via native support interfaces. AI workloads are received from a plurality of tenants, wherein the AI workloads include training workloads and inferencing workloads and resource subsets of the set of distributed infrastructure resources are assigned to the received AI workloads. The received AI workloads are scheduled for execution on the assigned resource subsets and based on the scheduling of the AI workloads, they are executed on the assigned resource subsets. The described cloud infrastructure platform provides efficient, secure execution of AI workloads for many different tenants and enables the flexible use of a wide variety of both third-party and first-party infrastructure resources.
    Type: Application
    Filed: June 28, 2021
    Publication date: October 6, 2022
    Inventors: Dharma Kiritkumar SHUKLA, Rimma Vladimirovna NEHME, Pankaj SHARMA, Shreshth SINGHAL, Vipul Arunkant MODI, Muthian SIVATHANU, Atul KATIYAR
  • Publication number: 20220318052
    Abstract: The disclosure herein describes scheduling execution of artificial intelligence (AI) workloads in a cloud infrastructure platform. A global scheduler receives AI workloads associated with resource ticket values. The scheduler distributes the AI workloads to nodes based on balancing resource ticket values. Local schedulers of the nodes schedule AI workloads on resources based on the resource ticket values of the AI workloads. Based on scheduling the AI workloads, coordinator services of the local schedulers execute the distributed AI workloads on the infrastructure resources of the nodes. The disclosure further describes scheduling AI workloads based on priority tiers. A scheduler receives AI workloads, and each AI workload is associated with a priority tier indicative of a preemption priority while being executed. The AI workloads are scheduled for execution on a distributed set of nodes based on the priority tiers and then execute based on the scheduling.
    Type: Application
    Filed: June 28, 2021
    Publication date: October 6, 2022
    Inventors: Muthian SIVATHANU, Atul KATIYAR, Dharma Kiritkumar SHUKLA, Rimma Vladimirovna NEHME, Shreshth SINGHAL, Pankaj SHARMA, Nipun KWATRA, Ramachandran RAMJEE
  • Publication number: 20220308917
    Abstract: The disclosure herein describes platform-level checkpointing for deep learning (DL) jobs. The checkpointing is performed through capturing two kinds of state data: (i) GPU state (device state), and (ii) CPU state (host state). The GPU state includes GPU data (e.g., model parameters, optimizer state, etc.) that is located in the GPU and GPU context (e.g., the default stream in GPU, various handles created by the libraries such as DNN, Blas, etc.). Only a fraction of the GPU memory is copied because the checkpointing is done in a domain-aware manner. The “active” memory contains useful data like model parameters. To be able to capture the useful data, memory management is controlled to identify which parts of the memory are active. Also, to restore the destination GPU to the same context/state, a mechanism is used to capture such state-changing events on an original GPU and replayed on a destination GPU.
    Type: Application
    Filed: June 26, 2021
    Publication date: September 29, 2022
    Inventors: Muthian SIVATHANU, Srinidhi VISWANATHA, Dharma Kiritkumar SHUKLA, Nipun KWATRA, Ramachandran RAMJEE, Rimma Vladimirovna NEHME, Pankaj SHARMA, Bhalakumaaran Erode RANGANATHAN, Vaibhav SHARMA
  • Publication number: 20220270830
    Abstract: Some embodiments include an integrated assembly having a supercapacitor supported by a semiconductor substrate. The supercapacitor includes first and second electrode bases. The first electrode base includes first laterally-projecting regions, and the second electrode base includes second laterally-projecting regions which are interdigitated with the first laterally-projecting regions. A distance between the first and second laterally-projecting regions is less than or equal to about 500 nm. Carbon nanotubes extend upwardly from the first and second electrode bases. The carbon nanotubes are configured as a first membrane structure associated with the first electrode base and as a second membrane structure associated with the second electrode base. Pseudocapacitive material is dispersed throughout the first and second membrane structures. Electrolyte material is within and between the first and second membrane structures. Some embodiments include methods of forming integrated assemblies.
    Type: Application
    Filed: February 19, 2021
    Publication date: August 25, 2022
    Applicant: Micron Technology, Inc.
    Inventors: Pankaj Sharma, Sidhartha Gupta
  • Publication number: 20220248104
    Abstract: Aspects of the subject disclosure may include, for example, identifying unselected video content items and preconfiguring playback views for unselected video content items. During a warm-up phase, access to the unselected video content items is precoordinated individually with a separate video player, manifests and license/key are retrieved in anticipation for possible selection for playback. Subsequent selection of one of the unselected video content items initiates playback responsive to selection without repeating any of the preconfiguring, preauthorizing or fetching. Other embodiments are disclosed.
    Type: Application
    Filed: April 20, 2022
    Publication date: August 4, 2022
    Applicant: AT&T Intellectual Property I, L.P.
    Inventors: Rachit Sharma, Constance Goshgarian, Pankaj Sharma, Emir Halepovic, Albert Chan, Gowrishankar Natarajan, Atanu Basak
  • Publication number: 20220238546
    Abstract: Some embodiments include an integrated assembly having a channel-material-pillar extending vertically through a stack of alternating conductive levels and insulative levels. The channel-material-pillar includes a first semiconductor material. A second semiconductor material is directly against an upper region of the channel-material-pillar. The second semiconductor material has a higher dopant concentration than the first semiconductor material and joins to the first semiconductor along an abrupt interfacial region such that there is little to no mixing of dopant from the second semiconductor material into the first semiconductor material. Some embodiments include methods of forming integrated assemblies.
    Type: Application
    Filed: January 26, 2021
    Publication date: July 28, 2022
    Applicant: Micron Technology, Inc.
    Inventors: Sidhartha Gupta, Naveen Kaushik, Pankaj Sharma, Kyle A. Ritter
  • Publication number: 20220238431
    Abstract: A method of forming a microelectronic device comprises forming a stack structure comprising vertically alternating insulating structures and conductive structures arranged in tiers. Each of the tiers individually comprises one of the insulating structures and one of the conductive structures. A sacrificial material is formed over the stack structure and pillar structures are formed to extend vertically through the stack structure and the sacrificial material. The method comprises forming conductive plug structures within upper portions of the pillar structures, forming slots extending vertically through the stack structure and the sacrificial material, at least partially removing the sacrificial material to form openings horizontally interposed between the conductive plug structures, and forming a low-K dielectric material within the openings. Microelectronic devices, memory devices, and electronic systems are also described.
    Type: Application
    Filed: January 28, 2021
    Publication date: July 28, 2022
    Inventors: Naveen Kaushik, Sidhartha Gupta, Pankaj Sharma, Haitao Liu
  • Patent number: 11397721
    Abstract: A server set for a data set may designate a subset of “master” servers that update the data set in order to reduce data version conflicts involving mutually exclusive updates of the data set. Multi-master configurations may fulfill the performance constraints, and the subset of masters may detect and resolve data version conflicts. However, if multiple masters perform conflict resolution for a particular data version conflict, the resolution may produce inefficiency and redundancy (if the masters reach the same outcome) or additional data version conflicts (if the masters reach different outcomes). Instead, among the masters, a merge master may be identified that applies conflict resolution techniques to data version conflicts and forwards the conflict resolution outcome to the other masters for application to the data set to resolve the data version conflict. The other masters may temporarily store updates in a tentative update set until data version conflicts are resolved.
    Type: Grant
    Filed: December 4, 2018
    Date of Patent: July 26, 2022
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC
    Inventors: Karthik Raman, Momin Mahmoud Al-Ghosien, Bhalakumaaran Erode Ranganathan, Madhan Gajendran, Ji Huang, Atul Katiyar, Mikhail Mikhailovich Koltachev, Sujit Vattathil Kuruvilla, Digvijaysinh Govindbhai Makwana, Subramanyam Pattipaka, Ovidiu Constantin Platon, Ankur Savailal Shah, Pankaj Sharma, Dharma Shukla, Shreshth Singhal, Shireesh Kumar Thota