Patents by Inventor Pao An

Pao An has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240008184
    Abstract: An electronic device is disclosed. The electronic device includes a carrier including a first portion, a second portion over the first portion, and a third portion connecting the first portion and the second portion. The electronic device also includes a first electronic component disposed between the first portion and the second portion. An active surface of the first electronic component faces the second portion. The electronic device also includes a second electronic component disposed over the second portion. The first portion is configured to transmit a first power signal to a backside surface of the first electronic component opposite to the active surface.
    Type: Application
    Filed: July 1, 2022
    Publication date: January 4, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chiung-Ying KUO, Hung-Chun KUO, Pao-Nan LEE, Jung Jui KANG, Chang Chi LEE
  • Patent number: 11862706
    Abstract: Semiconductor devices and methods are provided. A semiconductor device according to the present disclosure includes a first transistor having a first gate dielectric layer, a second transistor having a second gate dielectric layer, and a third transistor having a third gate dielectric layer. The first gate dielectric layer includes a first concentration of a dipole layer material, the second gate dielectric layer includes a second concentration of the dipole layer material, and the third gate dielectric layer includes a third concentration of the dipole layer material. The dipole layer material includes lanthanum oxide, aluminum oxide, or yttrium oxide. The first concentration is greater than the second concentration and the second concentration is greater than the third concentration.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: January 2, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Hao Pao, Chih-Hsuan Chen, Yu-Kuan Lin
  • Publication number: 20230420418
    Abstract: An electronic device is provided. The electronic device includes a first die and a second die. The second die is disposed over the first die. A backside surface of the second die faces a backside surface of the first die. An active surface of the second die is configured to receive a first power. The second die is configured to provide the first die with a second power through the backside surface of the second die and the backside surface of the first die.
    Type: Application
    Filed: June 22, 2022
    Publication date: December 28, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chun-Yen TING, Pao-Nan LEE, Jung Jui KANG, Chang Chi LEE
  • Publication number: 20230418779
    Abstract: An apparatus for synchronous Ethernet comprises a processor, a field programmable gate array, a synchronizer, a physical layer implementor and a media accessing controller, wherein, the processor transmits a control data through a first transmission interface; the field programmable gate array receives the control data, generates a control instruction in accordance with the control data and transmits the control instruction through a second transmission interface; the synchronizer receives the control instruction and generates a synchronous clock in accordance with the control instruction; and each of the physical layer implementor and the media accessing controller receives and works in accordance with the synchronous clock and media accessing control protocol.
    Type: Application
    Filed: March 23, 2023
    Publication date: December 28, 2023
    Inventors: PAO-KANG MO, CHIEN-HUA WANG, CHENG-TAI TIEN, SHIH-FENG TSENG
  • Publication number: 20230411216
    Abstract: A method includes providing a substrate, a dummy fin, and a stack of semiconductor channel layers; forming an interfacial layer wrapping around each of the semiconductor channel layers; depositing a high-k dielectric layer, wherein a first portion of the high-k dielectric layer over the interfacial layer is spaced away from a second portion of the high-k dielectric layer on sidewalls of the dummy fin by a first distance; depositing a first dielectric layer over the dummy fin and over the semiconductor channel layers, wherein a merge-critical-dimension of the first dielectric layer is greater than the first distance thereby causing the first dielectric layer to be deposited in a space between the dummy fin and a topmost layer of the stack of semiconductor channel layers, thereby providing air gaps between adjacent layers of the stack of semiconductor channel layers and between the dummy fin and the stack of semiconductor channel layers.
    Type: Application
    Filed: July 31, 2023
    Publication date: December 21, 2023
    Inventors: Chia-Hao Pao, Chih-Chuan Yang, Shih-Hao Lin, Kian-Long Lim, Chih-Wei Lee, Chien-Yuan Chen, Jo-Chun Hung, Yung-Hsiang Chan, Yu-Kuan Lin, Lien-Jung Hung
  • Publication number: 20230404498
    Abstract: A foldable detection device and an image signal processing method for the foldable detection device are provided. The foldable detection device is used in an unfolded state and a folded state. The foldable detection device includes a first detection panel and a second detection panel. When the foldable detection device is in the unfolded state, the first detection panel and the second detection panel partially overlap in a direction of a top view of the foldable detection device.
    Type: Application
    Filed: May 12, 2023
    Publication date: December 21, 2023
    Applicant: InnoCare Optoelectronics Corporation
    Inventor: Sung-Pao Cheng
  • Publication number: 20230402225
    Abstract: The transformer includes iron core and coils. The iron core includes a first flange, a second flange, and a central column having a first face and a second face. The coils include a first coil and a second coil wound around the central column from the first flange towards the second flange. Within a first layer of coils along the first face, there are sequentially arranged at least a first coil, a first coil, a second coil, a first coil, a second coil, a gap, a second coil, a first coil, and multiple rounds of first coil. Within the first layer along the second face, there are sequentially arranged multiple rounds of the first coil, a first coil, a second coil, a gap, a second coil, a first coil, and multiple rounds of the first coil. Within a second layer there are multiple rounds of the second coil.
    Type: Application
    Filed: June 13, 2022
    Publication date: December 14, 2023
    Inventors: Ming-Yen Hsieh, Pao Lin Shen, Hsiang Chung Yang
  • Patent number: 11842920
    Abstract: The present disclosure provides a semiconductor structure, including a transistor. The transistor includes a semiconductive substrate, a gate structure, a pair of highly doped regions and a dielectric element. The semiconductive substrate has a top surface. The gate structure is over the top surface. The pair of highly doped regions is separated by the gate structure. The dielectric element is embedded in the semiconductive substrate. The dielectric element is laterally and vertically misaligned with the pair of highly doped regions.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: December 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun Hao Liao, Chu Fu Chen, Chun-Wei Hsu, Chia-Cheng Pao
  • Patent number: 11836279
    Abstract: An example device includes a physical storage medium, a wireless power circuit, and a portable sealed housing containing the physical storage medium and the wireless power circuit. The physical storage medium stores a first security protocol to activate the wireless power circuit, and a second security protocol to allow data transfer between the physical storage medium and a host device.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: December 5, 2023
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Chung-Pao Lu, Chien-Hao Lu, Chia Ching Lu, Po-Cheng Liao
  • Patent number: 11834318
    Abstract: An automatic liquid filling system includes a machine assembly, a gripping unit, and a controlling unit. The machine assembly has a filling zone for receiving at least one container. The container has an opening. The machine assembly includes a plurality of filling nozzles in the filling zone. The gripping unit in the machine assembly includes a moving track and a robotic arm. The robotic arm is movably disposed on the moving track. The controlling unit in the machine assembly is electrically connected to the gripping unit. When the container is located in the filling zone, the controlling unit controls the robotic arm to move along the moving track and to pick up one of the filling nozzles to fill the container through the opening of the container. A method of filling liquid is provided herewith.
    Type: Grant
    Filed: May 19, 2022
    Date of Patent: December 5, 2023
    Assignee: TRUSVAL TECHNOLOGY CO., LTD.
    Inventors: Shih-Feng Chen, Shih-Pao Chien
  • Publication number: 20230385125
    Abstract: A graph partitioning compiler partitions an AI program or model for execution on multiple TSP modules configured for accelerating deep learning workloads.
    Type: Application
    Filed: May 30, 2023
    Publication date: November 30, 2023
    Inventors: Kyeong Mo Kang, Yuxi Cai, Naif Tarafdar, Andrew Chaang Ling, Pao-Sheng Chou
  • Patent number: 11829202
    Abstract: A portable electronic apparatus with multiple screens includes a first screen and a second screen movably coupled to the first screen along an arcuate path to be received in the first screen or moved out of the first screen. The first screen and the second screen face a same side of the portable electronic apparatus. The second screen includes a base, a lifting mechanism disposed on the base, and a display unit. The display unit is disposed on the lifting mechanism to be driven by the lifting mechanism to be lifted or lowered relative to the base. When the second screen is moved out of the first screen and a step is provided between a display surface of the display unit and a display surface of the first screen, the display unit is adapted to be lifted relative to the base through the lifting mechanism to compensate the step.
    Type: Grant
    Filed: November 23, 2022
    Date of Patent: November 28, 2023
    Assignee: Acer Incorporated
    Inventors: Hung-Chi Chen, Shun-Bin Chen, Huei-Ting Chuang, Pao-Ching Huang
  • Publication number: 20230376131
    Abstract: The present disclosure provides a wireless communication system including a first host computer, a communication dongle, a second host computer and an input device. The communication dongle is connected to the first host computer via a USB interface, connected to the second host computer via a Bluetooth interface, and connected to the input device via a RF interface. The first host computer has first application software for intercepting the operating signal(s) of the input device and transferring, via the communication dongle, to the second host computer to be executed thereby. The first application software also controls the first host computer to ignore the operating signal(s) during the operating signal(s) is being transferred to the second host computer.
    Type: Application
    Filed: February 22, 2023
    Publication date: November 23, 2023
    Inventors: Ping-Shun ZEUNG, Chung-Han HSIEH, Pao-Wei CHEN, Kun-Yuan LIN
  • Publication number: 20230371225
    Abstract: A memory device includes a memory array having a plurality of memory cells. Each memory cell of the plurality of memory cells is connected to a word line to apply a first signal to select the memory cell to read data from or write the data to the memory cell and a bit line to read the data from the memory cell or provide the data to write to the memory cell upon selecting the memory cell by the word line. A first bit line portion of the bit line connected to a first memory cell of the plurality of memory cells abuts a second bit line portion of the bit line connected to a second memory cell of the plurality of memory cells. The first memory cell is adjacent to the second memory cell.
    Type: Application
    Filed: July 25, 2023
    Publication date: November 16, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Ping-Wei Wang, Lien-Jung Hung, Kuo-Hsiu Hsu, Kian-Long Lim, Yu-Kuan LIN, Chia-Hao Pao, Chih-Chuan Yang, Shih-Hao Lin, Choh Fei Yeap
  • Publication number: 20230352214
    Abstract: A method of manufacturing wire covering materials for prevention of spillover loss during transmission of high frequency or ultra high frequency signals is revealed. First compositing high insulating ceramic materials having flake structure with polymers and then forming a functional dielectric layer with no gap, no micropore, and low dielectric constant by a manufacturing process. Thereby the dielectric layer is used to cover various types of wires, or connector plugs and sockets for prevention of spillover loss during transmission of high frequency or ultra high frequency signals.
    Type: Application
    Filed: April 29, 2022
    Publication date: November 2, 2023
    Inventor: SHIH-PAO CHIEN
  • Publication number: 20230354573
    Abstract: The present disclosure describes a memory structure including a memory cell array. The memory cell array includes memory cells and first n-type wells extending in a first direction. The memory structure also includes a second n-type well formed in a peripheral region of the memory structure. The second n-type well extends in a second direction and is in contact with a first n-type well of the first n-type wells. The memory structure further includes a pick-up region formed in the second n-type well. The pick-up region is electrically coupled to the first n-type well of first n-type wells.
    Type: Application
    Filed: April 28, 2022
    Publication date: November 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Chuan Yang, Chao-Yuan CHANG, Shih-Hao LIN, Chia-Hao PAO, Feng-Ming CHANG, Lien-Jung HUNG, Ping-Wei WANG
  • Patent number: 11803330
    Abstract: The invention introduces a method for handling sudden power off recovery, performed by a processing unit of an electronic apparatus, to include: driving a flash interface to program data sent by a host into pseudo single-level cell (pSLC) blocks of multiple logical unit numbers (LUNs) in a single-level cell (SLC) mode with multiple channels after detecting that the electronic apparatus has suffered a sudden power off (SPO), and driving the flash interface to erase memory cells of all the pSLC blocks when data of all pSLC blocks has been read by the host. The pSLC blocks are reserved from being written to in regular operations until the SPO is detected.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: October 31, 2023
    Assignee: SILICON MOTION, INC.
    Inventors: Jieh-Hsin Chien, Yi-Hua Pao
  • Patent number: 11804189
    Abstract: A method for generating offset current values includes: setting a current setting sequence which includes multiple current setting values; driving a light emitting unit and measuring a current value of the light emitting unit; establishing a recurrent neural network (RNN) including an input layer, a hidden layer and an output layer; and inputting the current value into the hidden layer, inputting the current setting values into the input layer sequentially, and obtaining offset values from the output layer sequentially. The offset values correspond to the current setting values respectively.
    Type: Grant
    Filed: November 23, 2022
    Date of Patent: October 31, 2023
    Assignee: Radiant Opto-Electronics Corporation
    Inventors: Lian-Young Lee, Chun-Yi Sun, Jon-Hong Lin, Peng-Hsiang Wu, Hung-Pao Wu
  • Patent number: 11795352
    Abstract: The present disclosure relates to a (meth)acrylate adhesive composition comprising a (meth)acrylated polymer, a crosslinking agent and a silane copolymer, wherein the silane copolymer comprises 70 to 95 weight parts of an acrylate monomer containing C1-C4 alkyl group and 5 to 30 weight parts of a silane represented by the following formula (I): X—R1—SiR23-a(OR3)a??(I) wherein the weight-average molecular weight of the silane copolymer is ranging from 40,000 to 150,000. The silane copolymer can enhance the initial adhesion strength, rework ability and weather resistance of the (meth)acrylate adhesive composition. Furthermore, the (meth)acrylate adhesive composition can be used in the flexible optical film with a good bending restoring property and adhesion.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: October 24, 2023
    Assignee: BenQ Materials Corporation
    Inventors: Wen-Chun Chen, Yan-Chiuan Liou, Pao-Hsun Wu, Yi-Ting Tseng, Chung-Han Lee
  • Patent number: D1010640
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: January 9, 2024
    Assignee: Acer Incorporated
    Inventors: Wen-Shuo Wen, Pao-Ching Huang