Abstract: A method for processing noise interference in a serial AT Attachment (SATA) interface. The method includes the steps of detecting whether there is an error in CRC (Cyclic Redundancy Check) checksum or whether an R_ERR primitive (reception error primitive) is received, detecting whether a FIS (Frame Information Structure) is a data type if there is any error and returning back to error state detecting step if there is no any error, detecting whether the FIS is a ATAPI packet command CDB (Command Descriptor Block) when the FIS is the data format, and writing a special tag to the CDB and returning back to the error detecting step.

Abstract: A method for accessing a memory having a storage space larger than the addressing capability of a microprocessor. The method comprises storing an interrupt service routine in one of a plurality of memory banks, when an interrupt occurs, pushing a current program counter address onto a stack by an interrupt processing unit, and pushing a bank number of the current memory bank onto the stack. The method further comprises switching the microprocessor to the memory bank storing the interrupt service routine to execute the interrupt service routine, popping the bank number of the memory bank from the stack, restoring the popped bank number in the memory bank selector, popping the program counter address from the stack, and continuing executing the interrupted program.

Abstract: A microcontroller with expandable memory banks has a microprocessor, a plurality of memory banks with only one page for storing interrupt service routines(ISR), a memory bank control circuit connected to the microprocessor, and a multiplexer for connecting the microprocessor with the plurality of memory banks. The memory bank control circuit generates a selection signal according to an interrupt signal and a microprocessor interrupt service routine execution end signal. The multiplexer outputs a page selection signal from the microprocessor or outputs a predetermined page selection signal according to the output signal from the memory bank control circuit.

Abstract: A method for increasing the internal memory in a processor. The method includes providing an extended memory in the processor, adding bits to data addresses and register addresses with an address extender, and adding bits to stack addresses with a stack pointer generator so that the processor is capable of accessing memory addresses larger than the bit width of the command set of the processor. The method also includes carrying over the bits when the stack address exceeds the limit of the conventional memory and accessing the stack data exceeding the limit of the conventional memory in the extended memory.

Abstract: A processor includes a CPU, a data memory, a stack memory, a memory address generator, and a stack pointer generator. The CPU is used to process data and instructions. The data memory is used to store non-stack data. The stack memory is used to store stack data. The memory address generator is used to generate addresses for accessing the data memory. The stack pointer generator is used to generate pointers for accessing the stack memory.