Patents by Inventor Parviz Keshtbod

Parviz Keshtbod has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8330240
    Abstract: A multi-state current-switching magnetic memory element has a magnetic tunneling junction (MTJ), for storing more than one bit of information. The MTJ includes a fixed layer, a barrier layer, and a non-uniform free layer. In one embodiment, having 2 bits per cell, when one of four different levels of current is applied to the memory element, the applied current causes the non-uniform free layer of the MTJ to switch to one of four different magnetic states. The broad switching current distribution of the MTJ is a result of the broad grain size distribution of the non-uniform free layer.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: December 11, 2012
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Patent number: 8313960
    Abstract: A method of manufacturing a magnetic memory element includes the steps of forming a permanent magnetic layer on top a bottom electrode, forming a pinning layer on top the permanent magnetic layer, forming a magnetic tunnel junction (MTJ) including a barrier layer on top of the pinning layer, forming a top electrode on top of the MTJ, forming a hard mask on top of the top electrode, and using the hard mask to perform a series of etching processes to reduce the width of the MTJ and the top electrode to substantially a desired width, where one of these etching processes is stopped when a predetermined material in the pinning layer is detected thereby avoiding deposition of metal onto the barrier layer of the etching process thereby preventing shorting.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: November 20, 2012
    Assignee: Avalanche Technology, Inc.
    Inventors: Ebrahim Abedifard, Parviz Keshtbod
  • Patent number: 8310020
    Abstract: A non-volatile current-switching magnetic memory element includes a bottom electrode, a pinning layer formed on top of the bottom electrode, and a fixed layer formed on top of the pinning layer. The memory element further includes a tunnel layer formed on top of the pinning layer, a first free layer formed on top of the tunnel layer, a granular film layer formed on top of the free layer, a second free layer formed on top of the granular film layer, a cap layer formed on top of the second layer and a top electrode formed on top of the cap layer.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: November 13, 2012
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod
  • Publication number: 20120282711
    Abstract: A method of manufacturing a magnetic memory element includes the steps of forming a permanent magnetic layer on top a bottom electrode, forming a pinning layer on top the permanent magnetic layer, forming a magnetic tunnel junction (MTJ) including a barrier layer on top of the pinning layer, forming a top electrode on top of the MTJ, forming a hard mask on top of the top electrode, and using the hard mask to perform a series of etching processes to reduce the width of the MTJ and the top electrode to substantially a desired width, where one of these etching processes is stopped when a predetermined material in the pinning layer is detected thereby avoiding deposition of metal onto the barrier layer of the etching process thereby preventing shorting.
    Type: Application
    Filed: February 10, 2012
    Publication date: November 8, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Ebrahim Abedifard, Parviz Keshtbod
  • Patent number: 8289757
    Abstract: A magnetic random access memory (MRAM) cell includes an embedded MRAM and an access transistor. The embedded MRAM is formed on a number of metal-interposed-in-interlayer dielectric (ILD) layers, which each include metal dispersed therethrough and are formed on top of the access transistor. An magneto tunnel junction (MTJ) is formed on top of a metal formed in the ILD layers that is in close proximity to a bit line. An MTJ mask is used to pattern the MTJ and is etched to expose the MTJ. Ultimately, metal is formed on top of the bit line and extended to contact the MTJ.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: October 16, 2012
    Assignee: Avalanche Technology, Inc.
    Inventors: Parviz Keshtbod, Ebrahim Abedifard
  • Publication number: 20120230095
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: May 21, 2012
    Publication date: September 13, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Publication number: 20120212998
    Abstract: A non-volatile current-switching magnetic memory element includes a bottom electrode, a pinning layer formed on top of the bottom electrode, and a fixed layer formed on top of the pinning layer. The non-volatile current-switching magnetic memory element further includes a tunnel layer formed on top of the pinning layer, a first free layer with a perpendicular anisotropy that is formed on top of the tunnel layer, a granular film layer formed on top of the free layer, a second free layer formed on top of the granular film layer, a cap layer formed on top of the second layer, and a top electrode formed on top of the cap layer.
    Type: Application
    Filed: April 23, 2012
    Publication date: August 23, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod
  • Publication number: 20120205761
    Abstract: A non-volatile current-switching magnetic memory element includes a bottom electrode, a pinning layer formed on top of the bottom electrode, and a fixed layer formed on top of the pinning layer. The memory element further includes a tunnel layer formed on top of the pinning layer, a first free layer formed on top of the tunnel layer, a granular film layer formed on top of the free layer, a second free layer formed on top of the granular film layer, a cap layer formed on top of the second layer and a top electrode formed on top of the cap layer.
    Type: Application
    Filed: April 23, 2012
    Publication date: August 16, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod
  • Publication number: 20120205763
    Abstract: A non-volatile current-switching magnetic memory element includes a bottom electrode, a pinning layer formed on top of the bottom electrode, and a fixed layer formed on top of the pinning layer. The memory element further includes a tunnel layer formed on top of the pinning layer, a first free layer formed on top of the tunnel layer, a granular film layer formed on top of the free layer, a second free layer formed on top of the granular film layer, a cap layer formed on top of the second layer and a top electrode formed on top of the cap layer.
    Type: Application
    Filed: April 25, 2012
    Publication date: August 16, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod
  • Publication number: 20120170361
    Abstract: A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die. The non-volatile RAM is formed of stacks of magnetic memory cells arranged in three-dimensional form for higher density and lower costs.
    Type: Application
    Filed: January 6, 2012
    Publication date: July 5, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Mahmud ASSAR
  • Patent number: 8183652
    Abstract: A non-volatile current-switching magnetic memory element includes a bottom electrode, a pinning layer formed on top of the bottom electrode, and a fixed layer formed on top of the pinning layer. The memory element further includes a tunnel layer formed on top of the pinning layer, a first free layer formed on top of the tunnel layer, a granular film layer formed on top of the first free layer, a second free layer formed on top of the granular film layer, a cap layer formed on top of the second free layer, and a top electrode formed on top of the cap layer.
    Type: Grant
    Filed: April 24, 2007
    Date of Patent: May 22, 2012
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod
  • Publication number: 20120107964
    Abstract: A method of flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die. The non-volatile RAM is formed of stacks of magnetic memory cells arranged in three-dimensional form for higher density and lower costs.
    Type: Application
    Filed: January 6, 2012
    Publication date: May 3, 2012
    Applicant: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav RANJAN, Parviz KESHTBOD, Mahmud ASSAR
  • Patent number: 8164947
    Abstract: A multi-state low-current-switching magnetic memory element (magnetic memory element) comprising a free layer, two stacks, and a magnetic tunneling junction is disclosed. The stacks and magnetic tunneling junction are disposed upon surfaces of the free layer, with the magnetic tunneling junction located between the stacks. The stacks pin magnetic domains within the free layer, creating a free layer domain wall. A current passed from stack to stack pushes the domain wall, repositioning the domain wall within the free layer. The position of the domain wall relative to the magnetic tunnel junction corresponds to a unique resistance value, and passing current from a stack to the magnetic tunnel junction reads the magnetic memory element's resistance. Thus, unique memory states may be achieved by moving the domain wall.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: April 24, 2012
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Roger Klaus Malmhall, Parviz Keshtbod
  • Patent number: 8148174
    Abstract: A method of manufacturing a magnetic memory element includes the steps of performing a first etching an oxide layer is etched, using a first photo-resist, the oxide layer formed on top of a contact layer that is formed on top of a magneto tunnel junction (MTJ), depositing a second photo-resist and second etching to leave a portion of the contact layer used to suitably connect the MTJ to circuits outside of the magnetic memory element.
    Type: Grant
    Filed: May 3, 2011
    Date of Patent: April 3, 2012
    Assignee: Avalanche Technology, Inc.
    Inventors: Ebrahim Abedifard, Parviz Keshtbod
  • Publication number: 20120069643
    Abstract: A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.
    Type: Application
    Filed: November 28, 2011
    Publication date: March 22, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Petro Estakhri, Mahmud Assar, Parviz Keshtbod
  • Publication number: 20120069649
    Abstract: A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.
    Type: Application
    Filed: November 28, 2011
    Publication date: March 22, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Petro Estakhri, Mahmud Assar, Parviz Keshtbod
  • Publication number: 20120068236
    Abstract: A non-uniform switching based non-volatile magnetic memory element includes a fixed layer, a barrier layer formed on top of the fixed layer, a first free layer formed on top of the barrier layer, a non-uniform switching layer (NSL) formed on top of the first free layer, and a second free layer formed on top of the non-uniform switching layer. Switching current is applied, in a direction that is substantially perpendicular to the fixed layer, barrier layer, first free layer, non-uniform switching layer and the second free layer causing switching between states of the first free layer, second free layer and non-uniform switching layer with substantially reduced switching current.
    Type: Application
    Filed: November 28, 2011
    Publication date: March 22, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Petro Estakhri, Mahmud Assar, Parviz Keshtbod
  • Patent number: 8120949
    Abstract: A flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: February 21, 2012
    Assignee: Avalanche Technology, Inc.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Mahmud Assar
  • Publication number: 20120025338
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: October 5, 2011
    Publication date: February 2, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall
  • Publication number: 20120026785
    Abstract: A non-volatile magnetic memory element includes a number of layers one of which is a free layer which is graded. The graded free layer may include various elements with each element having a different anisotropy or it may include nonmagnetic compounds and magnetic regions with the non-magnetic compounds forming graded contents forming a unique shape such as cone shaped, diamond shaped or other shapes and whose thickness is based on the reactivity of the magnetic compound.
    Type: Application
    Filed: October 5, 2011
    Publication date: February 2, 2012
    Applicant: AVALANCHE TECHNOLOGY, INC.
    Inventors: Rajiv Yadav Ranjan, Parviz Keshtbod, Roger Klas Malmhall