Patents by Inventor Parviz Parto
Parviz Parto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240055360Abstract: A die can be applied to a front conductive layer. Openings can be formed in the conductive layer over contact points on the die. The openings can be filled with a conductive material to electrically couple the conductive layer to the contact points on the die. The front conductive layer can be etched to form a first conductive pattern. Conductive standoffs can be formed on portions of the front conductive layer. An additional front conductive layer can be laminated onto the front side. Openings can be formed in the additional front conductive layer over the standoffs. The openings can be filled with a conductive material to electrically couple the additional conductive layer to the underlying standoffs. The additional conductive layer can be etched to form a second conductive pattern.Type: ApplicationFiled: March 16, 2023Publication date: February 15, 2024Inventors: Martin Standing, Parviz Parto
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Patent number: 11855534Abstract: A power converter can include first, second, third, and fourth power switches, and a driver for operating the drive switches to modify an input voltage. An AC coupling capacitor can be coupled between the first and fourth power switches. Bootstrap capacitors can be used for driving the first and second power switches, which can be high-side switches. In some embodiments, a current sensing circuit can be used to measure current through the third and/or fourth power switches and for determining the current through the power converter. In some embodiments, the power converter can monitor the voltage across the AC coupling capacitor and can determine the current through the power converter based on the monitored voltages. In some embodiments, the AC coupling capacitor can be pre-charged before the power converter begins normal operation.Type: GrantFiled: July 9, 2021Date of Patent: December 26, 2023Assignee: FARADAY SEMI, INC.Inventors: Seungbeom Kevin Kim, Jack Walter Cornish, III, Saurabh Anil Jayawant, Parviz Parto
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Publication number: 20230412079Abstract: A power converter can include first, second, third, and fourth switches, and a driver for operating the drive switches to modify an input voltage and provide an output voltage. An AC coupling capacitor can be coupled between the first and fourth switches. The first, second, third, and fourth switches can control current through two inductors. The power converter can have a fifth switch, which can provide a discharge path for discharging the first inductor, the second inductor, and/or the capacitor. Another capacitor can be between the fifth switch and ground. The power converter can provide an output voltage that is at least about ? of the input voltage. The power converter can include resonance circuitry, such as a third inductor, for soft switching the fifth switch.Type: ApplicationFiled: June 20, 2023Publication date: December 21, 2023Inventors: Parviz Parto, Saurabh Anil Jayawant, Jimmy Lin
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Publication number: 20230268827Abstract: A direct current to direct current (DC-DC) converter can include a chip embedded integrated circuit (IC), one or more switches, and an inductor. The IC can be embedded in a PCB. The IC can include driver, switches, and PWM controller. The IC and/or switches can include eGaN. The inductor can be stacked above the IC and/or switches, reducing an overall footprint. One or more capacitors can also be stacked above the IC and/or switches. Vias can couple the inductor and/or capacitors to the IC (e.g., to the switches). The DC-DC converter can offer better transient performance, have lower ripples, or use fewer capacitors. Parasitic effects that prevent efficient, higher switching speeds are reduced. The inductor size and overall footprint can be reduced. Multiple inductor arrangements can improve performance. Various feedback systems can be used, such as a ripple generator in a constant on or off time modulation circuit.Type: ApplicationFiled: November 23, 2022Publication date: August 24, 2023Inventor: Parviz Parto
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Patent number: 11652062Abstract: One or more chip-embedded integrated voltage regulators (“CEIVR's”) are configured to provide power to a circuit or chip such as a CPU or GPU and meet power delivery specifications. The CEIVR's, circuit or chip, and power delivery pathways can be included within the same package. The CEIVR's can be separate from the circuit or chip.Type: GrantFiled: December 6, 2019Date of Patent: May 16, 2023Assignee: Faraday Semi, Inc.Inventor: Parviz Parto
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Patent number: 11621230Abstract: A die can be applied to a front conductive layer. Openings can be formed in the conductive layer over contact points on the die. The openings can be filled with a conductive material to electrically couple the conductive layer to the contact points on the die. The front conductive layer can be etched to form a first conductive pattern. Conductive standoffs can be formed on portions of the front conductive layer. An additional front conductive layer can be laminated onto the front side. Openings can be formed in the additional front conductive layer over the standoffs. The openings can be filled with a conductive material to electrically couple the additional conductive layer to the underlying standoffs. The additional conductive layer can be etched to form a second conductive pattern.Type: GrantFiled: July 9, 2021Date of Patent: April 4, 2023Assignee: Faraday Semi, Inc.Inventors: Martin Standing, Parviz Parto
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Patent number: 11557962Abstract: A direct current to direct current (DC-DC) converter can include a chip embedded integrated circuit (IC), one or more switches, and an inductor. The IC can be embedded in a PCB. The IC can include driver, switches, and PWM controller. The IC and/or switches can include eGaN. The inductor can be stacked above the IC and/or switches, reducing an overall footprint. One or more capacitors can also be stacked above the IC and/or switches. Vias can couple the inductor and/or capacitors to the IC (e.g., to the switches). The DC-DC converter can offer better transient performance, have lower ripples, or use fewer capacitors. Parasitic effects that prevent efficient, higher switching speeds are reduced. The inductor size and overall footprint can be reduced. Multiple inductor arrangements can improve performance. Various feedback systems can be used, such as a ripple generator in a constant on or off time modulation circuit.Type: GrantFiled: February 11, 2021Date of Patent: January 17, 2023Assignee: Faraday Semi, Inc.Inventor: Parviz Parto
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Publication number: 20220069705Abstract: A power converter can include first, second, third, and fourth power switches, and a driver for operating the drive switches to modify an input voltage. An AC coupling capacitor can be coupled between the first and fourth power switches. Bootstrap capacitors can be used for driving the first and second power switches, which can be high-side switches. In some embodiments, a current sensing circuit can be used to measure current through the third and/or fourth power switches and for determining the current through the power converter. In some embodiments, the power converter can monitor the voltage across the AC coupling capacitor and can determine the current through the power converter based on the monitored voltages. In some embodiments, the AC coupling capacitor can be pre-charged before the power converter begins normal operation.Type: ApplicationFiled: July 9, 2021Publication date: March 3, 2022Inventors: Seungbeom Kevin Kim, Jack Walter Cornish, III, Saurabh Anil Jayawant, Parviz Parto
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Publication number: 20220068823Abstract: A die can be applied to a front conductive layer. Openings can be formed in the conductive layer over contact points on the die. The openings can be filled with a conductive material to electrically couple the conductive layer to the contact points on the die. The front conductive layer can be etched to form a first conductive pattern. Conductive standoffs can be formed on portions of the front conductive layer. An additional front conductive layer can be laminated onto the front side. Openings can be formed in the additional front conductive layer over the standoffs. The openings can be filled with a conductive material to electrically couple the additional conductive layer to the underlying standoffs. The additional conductive layer can be etched to form a second conductive pattern.Type: ApplicationFiled: July 9, 2021Publication date: March 3, 2022Inventors: Martin Standing, Parviz Parto
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Publication number: 20210313881Abstract: A direct current to direct current (DC-DC) converter can include a chip embedded integrated circuit (IC), one or more switches, and an inductor. The IC can be embedded in a PCB. The IC can include driver, switches, and PWM controller. The IC and/or switches can include eGaN. The inductor can be stacked above the IC and/or switches, reducing an overall footprint. One or more capacitors can also be stacked above the IC and/or switches. Vias can couple the inductor and/or capacitors to the IC (e.g., to the switches). The DC-DC converter can offer better transient performance, have lower ripples, or use fewer capacitors. Parasitic effects that prevent efficient, higher switching speeds are reduced. The inductor size and overall footprint can be reduced. Multiple inductor arrangements can improve performance. Various feedback systems can be used, such as a ripple generator in a constant on or off time modulation circuit.Type: ApplicationFiled: February 11, 2021Publication date: October 7, 2021Inventor: Parviz Parto
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Patent number: 11069624Abstract: A die can be applied to a front conductive layer. Openings can be formed in the conductive layer over contact points on the die. The openings can be filled with a conductive material to electrically couple the conductive layer to the contact points on the die. The front conductive layer can be etched to form a first conductive pattern. Conductive standoffs can be formed on portions of the front conductive layer. An additional front conductive layer can be laminated onto the front side. Openings can be formed in the additional front conductive layer over the standoffs. The openings can be filled with a conductive material to electrically couple the additional conductive layer to the underlying standoffs. The additional conductive layer can be etched to form a second conductive pattern.Type: GrantFiled: April 16, 2020Date of Patent: July 20, 2021Assignee: Faraday Semi, Inc.Inventors: Martin Standing, Parviz Parto
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Patent number: 11063516Abstract: A power converter can include first, second, third, and fourth power switches, and a driver for operating the drive switches to modify an input voltage. An AC coupling capacitor can be coupled between the first and fourth power switches. Bootstrap capacitors can be used for driving the first and second power switches, which can be high-side switches. In some embodiments, a current sensing circuit can be used to measure current through the third and/or fourth power switches and for determining the current through the power converter. In some embodiments, the power converter can monitor the voltage across the AC coupling capacitor and can determine the current through the power converter based on the monitored voltages. In some embodiments, the AC coupling capacitor can be pre-charged before the power converter begins normal operation.Type: GrantFiled: July 29, 2020Date of Patent: July 13, 2021Assignee: Faraday Semi, Inc.Inventors: Seungbeom Kevin Kim, Jack Walter Cornish, III, Saurabh Anil Jayawant, Parviz Parto
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Patent number: 10924011Abstract: A direct current to direct current (DC-DC) converter can include a chip embedded integrated circuit (IC), one or more switches, and an inductor. The IC can be embedded in a PCB. The IC can include driver, switches, and PWM controller. The IC and/or switches can include eGaN. The inductor can be stacked above the IC and/or switches, reducing an overall footprint. One or more capacitors can also be stacked above the IC and/or switches. Vias can couple the inductor and/or capacitors to the IC (e.g., to the switches). The DC-DC converter can offer better transient performance, have lower ripples, or use fewer capacitors. Parasitic effects that prevent efficient, higher switching speeds are reduced. The inductor size and overall footprint can be reduced. Multiple inductor arrangements can improve performance. Various feedback systems can be used, such as a ripple generator in a constant on or off time modulation circuit.Type: GrantFiled: January 25, 2019Date of Patent: February 16, 2021Assignee: Faraday Semi, Inc.Inventor: Parviz Parto
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Publication number: 20200350255Abstract: One or more chip-embedded integrated voltage regulators (“CEIVR's”) are configured to provide power to a circuit or chip such as a CPU or GPU and meet power delivery specifications. The CEIVR's, circuit or chip, and power delivery pathways can be included within the same package. The CEIVR's can be separate from the circuit or chip.Type: ApplicationFiled: December 6, 2019Publication date: November 5, 2020Inventor: Parviz Parto
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Publication number: 20200335446Abstract: A die can be applied to a front conductive layer. Openings can be formed in the conductive layer over contact points on the die. The openings can be filled with a conductive material to electrically couple the conductive layer to the contact points on the die. The front conductive layer can be etched to form a first conductive pattern. Conductive standoffs can be formed on portions of the front conductive layer. An additional front conductive layer can be laminated onto the front side. Openings can be formed in the additional front conductive layer over the standoffs. The openings can be filled with a conductive material to electrically couple the additional conductive layer to the underlying standoffs. The additional conductive layer can be etched to form a second conductive pattern.Type: ApplicationFiled: April 16, 2020Publication date: October 22, 2020Inventors: Martin Standing, Parviz Parto
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Patent number: 10504848Abstract: One or more chip-embedded integrated voltage regulators (“CEIVR's”) are configured to provide power to a circuit or chip such as a CPU or GPU and meet power delivery specifications. The CEIVR's, circuit or chip, and power delivery pathways can be included within the same package. The CEIVR's can be separate from the circuit or chip.Type: GrantFiled: February 19, 2019Date of Patent: December 10, 2019Assignee: Faraday Semi, Inc.Inventor: Parviz Parto
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Publication number: 20190229618Abstract: A direct current to direct current (DC-DC) converter can include a chip embedded integrated circuit (IC), one or more switches, and an inductor. The IC can be embedded in a PCB. The IC can include driver, switches, and PWM controller. The IC and/or switches can include eGaN. The inductor can be stacked above the IC and/or switches, reducing an overall footprint. One or more capacitors can also be stacked above the IC and/or switches. Vias can couple the inductor and/or capacitors to the IC (e.g., to the switches). The DC-DC converter can offer better transient performance, have lower ripples, or use fewer capacitors. Parasitic effects that prevent efficient, higher switching speeds are reduced. The inductor size and overall footprint can be reduced. Multiple inductor arrangements can improve performance. Various feedback systems can be used, such as a ripple generator in a constant on or off time modulation circuit.Type: ApplicationFiled: January 25, 2019Publication date: July 25, 2019Inventor: Parviz Parto
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Patent number: 10332825Abstract: In one implementation, a semiconductor package includes an integrated circuit (IC) flip chip mounted on a first patterned conductive carrier, a second patterned conductive carrier situated over the IC, and a magnetic material situated over the second patterned conductive carrier. The semiconductor package also includes a third patterned conductive carrier situated over the magnetic material. The second patterned conductive carrier and the third patterned conductive carrier are electrically coupled so as to form windings of an integrated inductor in the semiconductor package.Type: GrantFiled: May 20, 2016Date of Patent: June 25, 2019Assignee: Infineon Technologies Americas Corp.Inventors: Eung San Cho, Parviz Parto
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Patent number: 10193442Abstract: A direct current to direct current (DC-DC) converter can include a chip embedded integrated circuit (IC), one or more switches, and an inductor. The IC can be embedded in a PCB. The IC can include driver, switches, and PWM controller. The IC and/or switches can include eGaN. The inductor can be stacked above the IC and/or switches, reducing an overall footprint. One or more capacitors can also be stacked above the IC and/or switches. Vias can couple the inductor and/or capacitors to the IC (e.g., to the switches). The DC-DC converter can offer better transient performance, have lower ripples, or use fewer capacitors. Parasitic effects that prevent efficient, higher switching speeds are reduced. The inductor size and overall footprint can be reduced. Multiple inductor arrangements can improve performance. Various feedback systems can be used, such as a ripple generator in a constant on or off time modulation circuit.Type: GrantFiled: August 4, 2017Date of Patent: January 29, 2019Assignee: Faraday Semi, LLCInventor: Parviz Parto
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Publication number: 20170338171Abstract: In one implementation, a semiconductor package includes an integrated circuit (IC) flip chip mounted on a first patterned conductive carrier, a second patterned conductive carrier situated over the IC, and a magnetic material situated over the second patterned conductive carrier. The semiconductor package also includes a third patterned conductive carrier situated over the magnetic material. The second patterned conductive carrier and the third patterned conductive carrier are electrically coupled so as to form windings of an integrated inductor in the semiconductor package.Type: ApplicationFiled: May 20, 2016Publication date: November 23, 2017Inventors: Eung San Cho, Parviz Parto