Patents by Inventor Parviz Parto

Parviz Parto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7777587
    Abstract: The rising edge of a pulse width modulated output signal occurs after an input ramp signal starts to rise. The ramp signal starts to rise after the rising edge of a periodic set signal and before the falling edge of a periodic set signal. A feedback control signal intersects a substantially linear region of the ramp signal to generate a reset signal using a PWM comparator. The periodic set signal and reset signal are input to a latching circuit to generate the pulse width modulated output signal. The minimum pulse width can approach zero while having adequate overdrive to the PWM comparator. Having the rising edge of the reset signal rise before the falling edge of the set signal can allow a zero percent duty cycle without the need for a ramp offset voltage.
    Type: Grant
    Filed: August 6, 2008
    Date of Patent: August 17, 2010
    Assignee: International Rectifier Corporation
    Inventors: Brian Stevenson, Parviz Parto, Yang Chen
  • Publication number: 20100033261
    Abstract: The rising edge of a pulse width modulated output signal occurs after an input ramp signal starts to rise. The ramp signal starts to rise after the rising edge of a periodic set signal and before the falling edge of a periodic set signal. A feedback control signal intersects a substantially linear region of the ramp signal to generate a reset signal using a PWM comparator. The periodic set signal and reset signal are input to a latching circuit to generate the pulse width modulated output signal. The minimum pulse width can approach zero while having adequate overdrive to the PWM comparator. Having the rising edge of the reset signal rise before the falling edge of the set signal can allow a zero percent duty cycle without the need for a ramp offset voltage.
    Type: Application
    Filed: August 6, 2008
    Publication date: February 11, 2010
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventors: Brian Stevenson, Parviz Parto, Yang Chen
  • Patent number: 7482795
    Abstract: A pre-bias protection circuit for a converter circuit including a switching stage having high-and low-side switches connected in series at a switching node and an output stage connected to the switching node having a capacitor having a pre-existing pre-bias voltage at startup of the converter circuit, the pre-bias protection circuit controlling discharge of the pre-bias voltage when the low-side switch is turned ON during a start up of the converter circuit. The pre-bias protection circuit includes a first circuit for providing a first output; a second circuit providing a second output; and a comparator circuit for comparing the first output and the second output and producing a third output comprising a pulse width modulated signal for driving the low side switch such that the pulse width modulated signal starts with a small duty cycle and thereafter increases to a larger duty cycle, thereby to prevent the pre-bias voltage from discharging during startup.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: January 27, 2009
    Assignee: International Rectifier Corporation
    Inventors: Parviz Parto, Yang Chen
  • Publication number: 20080049465
    Abstract: A pre-bias protection circuit for a converter circuit including a switching stage having high-and low-side switches connected in series at a switching node and an output stage connected to the switching node having a capacitor having a pre-existing pre-bias voltage at startup of the converter circuit, the pre-bias protection circuit controlling discharge of the pre-bias voltage when the low-side switch is turned ON during a start up of the converter circuit. The pre-bias protection circuit includes a first circuit for providing a first output; a second circuit providing a second output; and a comparator circuit for comparing the first output and the second output and producing a third output comprising a pulse width modulated signal for driving the low side switch such that the pulse width modulated signal starts with a small duty cycle and thereafter increases to a larger duty cycle, thereby to prevent the pre-bias voltage from discharging during startup.
    Type: Application
    Filed: July 25, 2007
    Publication date: February 28, 2008
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventors: Parviz Parto, Yang Chen