Patents by Inventor Pascal Chevalier
Pascal Chevalier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250120106Abstract: A method of making a bipolar transistor includes: forming a first collector part of a first conductivity type in a semiconductor layer; forming a first insulating region made of a first insulating material on the first collector part; forming a conduction layer intended to form a first doped base part of the second conductivity type on the first insulating region; forming an opening having a first width in the conduction layer that emerges onto the first insulating region; forming an insulating layer on the conduction layer and in the opening; forming a cavity in the insulating layer and in the first insulating region that emerges onto a portion of the first collector part through the opening, the cavity having at the level of the opening a second width smaller than the first width; and forming a second collector part in the cavity on the portion of the first collector part.Type: ApplicationFiled: October 3, 2024Publication date: April 10, 2025Applicant: STMicroelectronics International N.V.Inventors: Arnaud RIVAL, Alexis GAUTHIER, Edoardo BREZZA, Pascal CHEVALIER
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Publication number: 20240404873Abstract: The present description concerns an integrated circuit chip including a semiconductor substrate and a radiofrequency component arranged inside and on top of an active region of the semiconductor substrate. The semiconductor substrate includes an amorphous buried layer in contact, by its upper surface, with a lower surface of the active region of the semiconductor substrate.Type: ApplicationFiled: May 22, 2024Publication date: December 5, 2024Inventors: Pascal Chevalier, Siddhartha Dhar, Frederic Monsieur
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Publication number: 20240404940Abstract: A device includes a bipolar transistor. The bipolar transistor includes: a collector region, a base region, and an emitter region. A first metallization is in contact with the emitter region, a second metallization is in contact with the base region, and a third metallization is in contact with the collector region. A first connection element is coupled to the first metallization and has dimensions, in a plane of the interface between the first metallization and the connection element, greater than dimensions of the first metallization. A second connection element is coupled to the second metallization and passes through spacers, which at least partially cover the second metallization, surrounding the emitter region. A third connection element is coupled to the third metallization and passes through spacers, which at least partially cover the third metallization, surrounding the base region.Type: ApplicationFiled: May 30, 2024Publication date: December 5, 2024Applicant: STMicroelectronics International N.V.Inventor: Pascal CHEVALIER
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Publication number: 20240355913Abstract: An electronic device includes a bipolar transistor. A collector of the bipolar transistor is formed by first and second regions. The second region is located between the first region and a base of the bipolar transistor. A conductive element at least partially surrounds and is insulated from the second region. The conductive element is located between the first region and the base.Type: ApplicationFiled: April 16, 2024Publication date: October 24, 2024Applicant: STMicroelectronics International N.V.Inventors: Pascal CHEVALIER, Nicolas GUITARD
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Patent number: 12125894Abstract: A bipolar transistor includes a collector. The collector is formed by: a first portion of the collector which extends under an insulating trench, and a second portion of the collector which crosses through the insulating trench. The first and second portions of the collector are in physical contact.Type: GrantFiled: October 26, 2023Date of Patent: October 22, 2024Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics FranceInventors: Alexis Gauthier, Pascal Chevalier
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Publication number: 20240332406Abstract: A bipolar transistor includes a first PN junction and a second PN junction. A first gate is located on the first PN junction. A second gate is located on the second PN junction.Type: ApplicationFiled: March 20, 2024Publication date: October 3, 2024Applicant: STMicroelectronics International N.V.Inventors: Alexis GAUTHIER, Pascal CHEVALIER, Olivier WEBER, Franck ARNAUD
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Patent number: 11996465Abstract: A bipolar transistor includes a collector. The collector is produced by a process wherein a first substantially homogeneously doped layer is formed at the bottom of a cavity. A second gradually doped layer is then formed by diffusion of dopants of the first substantially homogeneously doped layer.Type: GrantFiled: September 27, 2021Date of Patent: May 28, 2024Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SAInventors: Alexis Gauthier, Pascal Chevalier
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Publication number: 20240162328Abstract: A bipolar transistor is manufactured by: forming a collector region; forming a first layer made of a material of a base region and an insulating second layer; forming a cavity reaching the collector region; forming a portion of the collector region and a portion of the base region in the cavity; forming an insulating fourth layer made of a same material as the insulating second layer in the periphery of the bottom of the cavity, the insulating fourth layer having a same thickness as the insulating second layer; forming an emitter region; and simultaneously removing the insulating second and a portion of the insulating fourth layer not covered by the emitter region.Type: ApplicationFiled: November 7, 2023Publication date: May 16, 2024Applicant: STMicroelectronics (Crolles 2) SASInventors: Alexis GAUTHIER, Pascal CHEVALIER, Edoardo BREZZA, Nicolas GUITARD, Gregory AVENIER
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Publication number: 20240162329Abstract: An electronic device includes an insulating first layer covering a second layer made of a doped semiconductor material. A cavity is formed to cross through the first layer and reach the second layer. Insulating spacers are forming against lateral walls of the cavity. A first doped semiconductor region fills the cavity. The first doped semiconductor region has a doping concentration decreasing from the second layer.Type: ApplicationFiled: November 6, 2023Publication date: May 16, 2024Applicant: STMicroelectronics (Crolles 2) SASInventors: Alexis GAUTHIER, Pascal CHEVALIER, Edoardo BREZZA, Nicolas GUITARD
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Patent number: 11984360Abstract: A circuit includes at least one bipolar transistor and at least one variable capacitance diode. The circuit is fabricated using a method whereby the bipolar transistor and variable capacitance diode are jointly produced on a common substrate.Type: GrantFiled: April 25, 2022Date of Patent: May 14, 2024Assignee: STMicroelectronics (Crolles 2) SASInventors: Gregory Avenier, Alexis Gauthier, Pascal Chevalier
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Publication number: 20240063290Abstract: A bipolar transistor includes a collector. The collector is formed by: a first portion of the collector which extends under an insulating trench, and a second portion of the collector which crosses through the insulating trench. The first and second portions of the collector are in physical contact.Type: ApplicationFiled: October 26, 2023Publication date: February 22, 2024Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SAInventors: Alexis GAUTHIER, Pascal CHEVALIER
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Patent number: 11837647Abstract: A bipolar transistor includes a collector. The collector is formed by: a first portion of the collector which extends under an insulating trench, and a second portion of the collector which crosses through the insulating trench. The first and second portions of the collector are in physical contact.Type: GrantFiled: March 3, 2022Date of Patent: December 5, 2023Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SAInventors: Alexis Gauthier, Pascal Chevalier
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Publication number: 20230387208Abstract: A lateral bipolar transistor includes an emitter region doped with a first conductivity type, having a first width and a first average doping concentration; a collector region doped with the first conductivity type, having a second width greater than the first width of the emitter region and a second average doping concentration lower than the first average doping concentration ; and a base region positioned between the emitter and collector regions. The emitter, collector and base regions are arranged in a silicon layer on an insulator layer on a substrate. A substrate region that is deprived of the silicon and insulator layers is positioned on a side of the collector region. A bias circuit is coupled, and configured to deliver, to the substrate region a bias voltage. This bias voltage is controlled to modulate an electrostatic doping of the collector region.Type: ApplicationFiled: May 16, 2023Publication date: November 30, 2023Applicant: STMicroelectronics (Crolles 2) SASInventors: Pascal CHEVALIER, Sebastien FREGONESE, Thomas ZIMMER
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Patent number: 11817353Abstract: At least one bipolar transistor and at least one variable capacitance diode are jointly produced by a method on a common substrate.Type: GrantFiled: January 4, 2022Date of Patent: November 14, 2023Assignee: STMicroelectronics (Crolles 2) SASInventors: Pascal Chevalier, Alexis Gauthier, Gregory Avenier
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Patent number: 11804521Abstract: A device including a transistor is fabricated by forming a first part of a first region of the transistor through the implantation of dopants through a first opening. The second region of the transistor is then formed in the first opening by epitaxy.Type: GrantFiled: January 26, 2022Date of Patent: October 31, 2023Assignee: STMicroelectronics (Crolles 2) SASInventors: Alexis Gauthier, Pascal Chevalier, Gregory Avenier
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Patent number: 11776995Abstract: A transistor is produced by forming a first part of a first region of the transistor in a semiconductor substrate by implanting dopants through an opening in an isolating trench formed at an upper surface of the semiconductor substrate. A second region of the transistor in the opening by epitaxy.Type: GrantFiled: May 2, 2022Date of Patent: October 3, 2023Assignee: STMicroelectronics (Crolles 2) SASInventors: Alexis Gauthier, Pascal Chevalier, Gregory Avenier
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Patent number: 11710776Abstract: A bipolar transistor includes a stack of an emitter, a base, and a collector. The base is structured to have a comb shape including fingers oriented in a plane orthogonal to a stacking direction of the stack.Type: GrantFiled: August 13, 2021Date of Patent: July 25, 2023Assignee: STMicroelectronics (Crolles 2) SASInventors: Alexis Gauthier, Edoardo Brezza, Pascal Chevalier
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Patent number: 11417756Abstract: A method of making a bipolar transistor includes forming a stack of a first, second, third and fourth insulating layers on a substrate. An opening is formed in the stack to reach the substrate. An epitaxial process forms the collector of the transistor on the substrate and selectively etches an annular opening in the third layer. The intrinsic part of the base is then formed by epitaxy on the collector, with the intrinsic part being separated from the third layer by the annular opening. The junction between the collector and the intrinsic part of the base is surrounded by the second layer. The emitter is formed on the intrinsic part and the third layer is removed. A selective deposition of a semiconductor layer on the second layer and in direct contact with the intrinsic part forms the extrinsic part of the base.Type: GrantFiled: February 15, 2021Date of Patent: August 16, 2022Assignee: STMicroelectronics (Crolles 2) SASInventors: Edoardo Brezza, Alexis Gauthier, Fabien Deprat, Pascal Chevalier
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Publication number: 20220254686Abstract: A circuit includes at least one bipolar transistor and at least one variable capacitance diode. The circuit is fabricated using a method whereby the bipolar transistor and variable capacitance diode are jointly produced on a common substrate.Type: ApplicationFiled: April 25, 2022Publication date: August 11, 2022Applicant: STMicroelectronics (Crolles 2) SASInventors: Gregory AVENIER, Alexis GAUTHIER, Pascal CHEVALIER
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Publication number: 20220254879Abstract: A transistor is produced by forming a first part of a first region of the transistor in a semiconductor substrate by implanting dopants through an opening in an isolating trench formed at an upper surface of the semiconductor substrate. A second region of the transistor in the opening by epitaxy.Type: ApplicationFiled: May 2, 2022Publication date: August 11, 2022Applicant: STMicroelectronics (Crolles 2) SASInventors: Alexis GAUTHIER, Pascal CHEVALIER, Gregory AVENIER