Patents by Inventor Pascal Chevalier
Pascal Chevalier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9882034Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector contact region. A first epitaxial region forms a collector region of a first conductivity type on the collector contact region. A second epitaxial region forms a base region of a second conductivity type. Deposited semiconductor material forms an emitter region of the first conductivity type. The collector region, base region and emitter region are located within an opening having sidewalls lined with an insulating sheath. A portion of the insulating sheath adjacent the base region is removed and a base contact region is formed by epitaxial material grown from a portion of the base region exposed by removal of the portion of the insulating sheath.Type: GrantFiled: July 27, 2016Date of Patent: January 30, 2018Assignee: STMicroelectronics SAInventor: Pascal Chevalier
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Publication number: 20180025945Abstract: A PNP transistor is manufactured in parallel with the manufacture of NPN, NMOS, and PMOS transistors. A first semiconductor layer is deposited on a P-type doped semiconductor substrate and divided into first, second, and third regions, with the third region forming the base. An insulating well is deeply implanted into the substrate. First and second third wells, respectively of N-type and P-type are formed to extend between the second region and third region and the insulating well. A third well of P-type is formed below the third region to provide the collector. Insulating layers are deposited over the third region and patterned to form an opening. Epitaxial growth of a second P-type doped semiconductor layer is performed in the opening to provide the emitter.Type: ApplicationFiled: March 6, 2017Publication date: January 25, 2018Applicant: STMicroelectronics (Crolles 2) SASInventors: Pascal Chevalier, Gregory Avenier
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Publication number: 20170236923Abstract: A bipolar transistor is supported by a single-crystal silicon substrate including a collector contact region. A first epitaxial region forms a collector region of a first conductivity type on the collector contact region. A second epitaxial region forms a base region of a second conductivity type. Deposited semiconductor material forms an emitter region of the first conductivity type. The collector region, base region and emitter region are located within an opening having sidewalls lined with an insulating sheath. A portion of the insulating sheath adjacent the base region is removed and a base contact region is formed by epitaxial material grown from a portion of the base region exposed by removal of the portion of the insulating sheath.Type: ApplicationFiled: July 27, 2016Publication date: August 17, 2017Applicant: STMicroelectronics SAInventor: Pascal Chevalier
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Patent number: 9704967Abstract: The present disclosure is directed to a method that includes exposing a surface of a silicon substrate in a first region between first and second isolation trenches, etching the silicon substrate in the first region to form a recess between the first and second isolation trenches, and forming a base of a heterojunction bipolar transistor by selective epitaxial growth of a film comprising SiGe in the recess.Type: GrantFiled: September 14, 2015Date of Patent: July 11, 2017Assignee: STMICROELECTRONICS S.A.Inventors: Pascal Chevalier, Didier Celi, Jean-Pierre Blanc, Alain Chantre
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Patent number: 9640631Abstract: A method for manufacturing a bipolar transistor, including the steps of: forming a first surface-doped region of a semiconductor substrate having a semiconductor layer extending thereon with an interposed first insulating layer; forming, at the surface of the device, a stack of a silicon layer and of a second insulating layer; defining a trench crossing the stack and the semiconductor layer opposite to the first doped region, and then an opening in the exposed region of the first insulating layer; forming a single-crystal silicon region in the opening; forming a silicon-germanium region at the surface of single-crystal silicon region, in contact with the remaining regions of the semiconductor layer and of the silicon layer; and forming a second doped region at least in the remaining space of the trench.Type: GrantFiled: December 15, 2015Date of Patent: May 2, 2017Assignee: STMicroelectronics SAInventors: Alain Chantre, Pascal Chevalier, Gregory Avenier
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Patent number: 9362380Abstract: The present disclosure is directed to a method that includes exposing a surface of a silicon substrate in a first region between first and second isolation trenches, etching the silicon substrate in the first region to form a recess between the first and second isolation trenches, =; and forming a base of a heterojunction bipolar transistor by selective epitaxial growth of a film comprising SiGe in the recess.Type: GrantFiled: December 12, 2013Date of Patent: June 7, 2016Assignee: STMICROELECTRONICS S.A.Inventors: Pascal Chevalier, Didier Celi, Jean-Pierre Blanc, Alain Chantre
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Publication number: 20160099334Abstract: A method for manufacturing a bipolar transistor, including the steps of: forming a first surface-doped region of a semiconductor substrate having a semiconductor layer extending thereon with an interposed first insulating layer; forming, at the surface of the device, a stack of a silicon layer and of a second insulating layer; defining a trench crossing the stack and the semiconductor layer opposite to the first doped region, and then an opening in the exposed region of the first insulating layer; forming a single-crystal silicon region in the opening; forming a silicon-germanium region at the surface of single-crystal silicon region, in contact with the remaining regions of the semiconductor layer and of the silicon layer; and forming a second doped region at least in the remaining space of the trench.Type: ApplicationFiled: December 15, 2015Publication date: April 7, 2016Inventors: Alain Chantre, Pascal Chevalier, Gregory Avenier
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Publication number: 20160005836Abstract: The present disclosure is directed to a method that includes exposing a surface of a silicon substrate in a first region between first and second isolation trenches, etching the silicon substrate in the first region to form a recess between the first and second isolation trenches, and forming a base of a heterojunction bipolar transistor by selective epitaxial growth of a film comprising SiGe in the recess.Type: ApplicationFiled: September 14, 2015Publication date: January 7, 2016Inventors: Pascal CHEVALIER, Didier CELI, Jean-Pierre BLANC, Alain CHANTRE
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Publication number: 20150298655Abstract: A system for protecting a motor vehicle including an engine, the system including: a remote server transmitting a server authorization order; a system controlling operation of the engine; an unlocking mechanism unlocking the system for controlling operation of the engine; and a communication mechanism fitted in the vehicle and configured to receive the server authorization order and communicate with the unlocking mechanism. The remote server is configured to transmit the authorization order only if it receives a message including a first identification identifying a user and a second identification identifying a vehicle and if the vehicle identified by the second identification can be attributed to the user identified by the first identification.Type: ApplicationFiled: September 24, 2013Publication date: October 22, 2015Applicant: RENAULT S.A.S.Inventors: Nicolas MONTHEL, Pascal CHEVALIER, Claude BUZO, Olivier SINTES
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Publication number: 20140167116Abstract: The present disclosure is directed to a method that includes exposing a surface of a silicon substrate in a first region between first and second isolation trenches, etching the silicon substrate in the first region to form a recess between the first and second isolation trenches,=; and forming a base of a heterojunction bipolar transistor by selective epitaxial growth of a film comprising SiGe in the recess.Type: ApplicationFiled: December 12, 2013Publication date: June 19, 2014Applicant: STMicroelectronics S.A.Inventors: Pascal Chevalier, Didier Celi, Jean-Pierre Blanc, Alain Chantre
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Patent number: 8693602Abstract: Method and system for separating a plurality of users in a communication system including two transmitter antennas and N receiver antennas, said signals transmitted by said users containing symbols an, x( ) corresponding to the vector of the envelopes of the output signals of the 1 to N receiver antennas after a shaping filtering operation, characterized in that it uses a linear mean square filter extended over an observation vector {tilde over (x)}=[x(2n?1)T x(2n)T x(2n?1)H x(2n)H]T where x(2n?1) and x(2n) correspond to the (N×1) (N?1) observations at the symbol times 2n?1 and 2n.Type: GrantFiled: November 3, 2010Date of Patent: April 8, 2014Assignee: ThalesInventors: Pascal Chevalier, Florian Dupuy
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Publication number: 20130270649Abstract: A method for manufacturing a bipolar transistor, including the steps of: forming a first surface-doped region of a semiconductor substrate having a semiconductor layer extending thereon with an interposed first insulating layer; forming, at the surface of the device, a stack of a silicon layer and of a second insulating layer; defining a trench crossing the stack and the semiconductor layer opposite to the first doped region, and then an opening in the exposed region of the first insulating layer; forming a single-crystal silicon region in the opening; forming a silicon-germanium region at the surface of single-crystal silicon region, in contact with the remaining regions of the semiconductor layer and of the silicon layer; and forming a second doped region at least in the remaining space of the trench.Type: ApplicationFiled: April 9, 2013Publication date: October 17, 2013Applicant: STMicroelectronics SAInventors: Alain Chantre, Pascal Chevalier, Gregory Avenier
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Patent number: 8559491Abstract: A method for measuring certain parameters of the impulse response of a propagation channel involving emitters and reflectors that are fixed or mobile, and for detecting and determining the parameters regarding the position and kinematics of the emitters and reflectors, or for auto-locating the reception system implementing the invention, in a system comprising N sensors receiving signals from the emitters or from the reflection on the reflectors. The method determines an ambiguity function which couples the spatial analysis and the delay-distance/Doppler-kinematic analysis, and determines at least one sufficient statistic ?(l,m,K) corresponding to the correlation between the known signal s(kTe) corresponding to the complex envelope of the signal emitted and the output of a filter w(l,m) where l corresponds to a temporal assumption and m corresponds to a frequency assumption.Type: GrantFiled: August 8, 2008Date of Patent: October 15, 2013Assignee: ThalesInventors: Pascal Chevalier, François Delaveau, François Pipon
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Publication number: 20120300862Abstract: Method and system for separating a plurality of users in a communication system including two transmitter antennas and N receiver antennas, said signals transmitted by said users containing symbols an, x( ) corresponding to the vector of the envelopes of the output signals of the 1 to N receiver antennas after a shaping filtering operation, characterized in that it uses a linear mean square filter extended over an observation vector {tilde over (x)}=[x(2n?1)T x(2n)T x(2n?1)H x(2n)H]T where x(2n?1) and x(2n) correspond to the (N×1) (N?1) observations at the symbol times 2n?1 and 2n.Type: ApplicationFiled: November 3, 2010Publication date: November 29, 2012Applicant: THALESInventors: Pascal Chevalier, Florian Dupuy
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Patent number: 8160119Abstract: A method of fighting interference in a frequency-hopping communication system is disclosed. The system has at least one main sensor and one or more auxiliary sensors. According to at least one embodiment, frequency-hopping signals are received. The frequency-hopping signals are arranged to include useful bands and one or more guard bands inserted between the useful bands, and a ratio of the useful bands to the guard bands being chosen according to a predetermined value of probability of interference interception. Signals of the inserted guard bands having a signal level greater than a predetermined threshold are selected. A set of spatial-filtering weightings are calculated according to a correlation matrix of noise plus jammers alone on the signals selected. Baseband signals of the received frequency-hopping signals are filtered by the set of the calculated spatial-filtering weightings.Type: GrantFiled: April 13, 2007Date of Patent: April 17, 2012Assignee: ThalesInventors: Pascal Chevalier, François Van De Wiele, Christophe Donnet
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Publication number: 20110280293Abstract: Method for measuring certain parameters of the impulse response of a propagation channel involving emitters and reflectors that are fixed or mobile, so as to detect and determine the parameters regarding the position and kinematics of these emitters and reflectors, or to auto-locate the reception system implementing the invention, in a system comprising N sensors receiving signals from said emitters or from the reflection on said reflectors, and comprising at least the following steps: determination of an ambiguity function which couples the spatial analysis and the delay-distance/Doppler-kinematic analysis, determination of at least one sufficient statistic C(l, m, K) corresponding to the correlation between the known signal s(kTe) corresponding to the complex envelope of the signal emitted and the output of a filter w(l,m) where l corresponds to a temporal assumption (delay-distance, temporal ramp, etc.) and m to a frequency assumption (Dopper-kinematic, Doppler ramp, etc.Type: ApplicationFiled: August 8, 2008Publication date: November 17, 2011Applicant: THALESInventors: Pascal Chevalier, François Delaveau, François Pipon
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Patent number: 7969360Abstract: Method of high-resolution direction finding to an arbitrary even order, 2q (q>2), for an array comprising N narrowband antennas each receiving the contribution from P sources characterized in that the algebraic properties of a matrix of cumulants of order 2q, C2q,x(l), whose coefficients are the circular cumulants of order 2q, Cum[xi1(t), . . . , xig(t), xiq+1(t)*, . . . , xi2q(t)*], of the observations received on each antenna, for cumulant rankings indexed by l, are utilized to define a signal subspace and a noise subspace.Type: GrantFiled: March 31, 2006Date of Patent: June 28, 2011Assignee: ThalesInventors: Pascal Chevalier, Anne Ferreol
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Patent number: 7940856Abstract: A method of synchronizing a substantially rectilinear signal being propagated through an unknown channel, in the presence of unknown substantially rectilinear interferences, received by an array of N sensors, in which a known training sequence s(nT) is used comprising K symbols and sampled at the symbol rate T (s(nT), 0?n?{tilde over (K)}1), characterized in that, based on observations x((n+l/p)T) over the duration of the training sequence, where p=T/Te is an integer and Te the sampling period, a virtual observation vector X((n+l/p)T)=[x((n+l/p)T)T, x((n+l/p)T)†]T is defined, as well as a decision criterion or decision statistic taking into account the second-order non-circular nature of the interferences, by using the first and second correlation matrices of the virtual observation vector X((n+l/p)T).Type: GrantFiled: February 20, 2006Date of Patent: May 10, 2011Assignee: ThalesInventors: Pascal Chevalier, Pipon Francois, François Delaveau
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Patent number: 7824978Abstract: A bipolar transistor with very high dynamic performance, usable in an integrated circuit. The bipolar transistor has a single-crystal silicon emitter region with a thickness smaller than 50 nm. The base of the bipolar transistor is made of an SiGe alloy.Type: GrantFiled: September 6, 2006Date of Patent: November 2, 2010Assignee: STMicroelectronics S.A.Inventors: Alain Chantre, Bertrand Martinet, Michel Marty, Pascal Chevalier
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Publication number: 20100061425Abstract: A method for fighting interference in a communication system is disclosed where the links are of frequency-hopping type. The signal has several frequency time slots. The system has at least one main sensor and one or more auxiliary sensors, one or more guard band are inserted between the useful bands of the frequency-hopping signal. The total area of the inserted guard bands is chosen so as to satisfy a chosen value of probability of interference interception. The signals of the inserted guard bands are selected whose level is greater than a given threshold. A set of spatial-filtering weightings are determined, for each time slot of the signal, by taking account of the correlation matrix of the noise plus jammers alone on the signals selected. The baseband signals of the assemblage of extended blocks are filtered by the set of calculated weightings of the time slot so as to generate extended blocks devoid of interference.Type: ApplicationFiled: April 13, 2007Publication date: March 11, 2010Applicant: ThalesInventors: Pascal Chevalier, Francois Van De Wiele, Christophe Donnet