Abstract: Systems and methods for improving data communication over less than perfect power lines or transmission lines are described. The systems and methods allow for pushing out electrically any null within a frequency range of interest and/or for lossless transmission by providing impedance matching between communication devices and the transmission line. This is achieved by implementing line equalizing modules within the transceivers, at the transmitter side and/or the receiver side, or by plugging, as a stand-alone module, into an electrical outlet within a building. The line equalizing module includes multiple inductor-capacitor cells coupled in cascade where multiple switches allow for selective and concurrent connection between the inductor-capacitor cells. In another embodiment, the line equalizing module includes variable inductor-capacitor cells. The line equalizing module provides a variable propagation delay that allows for stretching electrically the transmission line.

Abstract: A logarithmic detector amplifying (LDA) system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The LDA system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency.

Abstract: A logarithmic detector amplifying (LDA) system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The LDA system may include an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to generate a series of modulated pulses, and one or more resonant circuits including at least one variable capacitor, coupled with the amplifying circuit and configured to establish a frequency of operation and generate an output signal having a second frequency being substantially the same as the first frequency, with the operating frequency being adjustable in response to baseband information received from the system via the one or more variable capacitors.

Abstract: A wireless coupling method is suitable for use in calibration and testing of a radiofrequency device under test (DUT). The DUT includes a printed circuit board having one or more integral antennas. The wireless coupling method comprises the use of a test fixture to position the DUT a prescribed distance from a reference unit comprising a second printed circuit board with one or more similar integral antenna(s). Each antenna of the reference unit is aligned optimally to a corresponding antenna of the DUT for transmitting or receiving RF signals in one or more frequency channels in accordance with a test procedure script. Test equipment is coupled to the antennas and is used for measuring or generating each test of the test procedure and saving the measurements in memory.

Abstract: A logarithmic detector amplifying (LDA) system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The LDA system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency.

Abstract: A logarithmic detector amplifying (LDA) system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The LDA system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more resonant circuits coupled with the amplifying circuit and configured to establish a frequency of operation and to generate an output signal having a second frequency, the second frequency being substantially the same as the first frequency.

Abstract: The arrangement includes two basic shift registers (1, 3) which are arranged as multipliers whose initial content is predetermined by an internal key, and which are fed back to each other via a modifying member inserted in the loop. The modifying member (5) is an AND-gate controlled by a signal obtained from an OR-gate (8) to whose two inputs the bits which each come from two shift registers (33, 34) which are independent of the two first registers, are applied. These independent registers are modified one by the other, and this modification is effected by inserted bistable counters (10, 11). In addition, the two basic registers (1, 3) are linearly modified by insertion of bits originating from a source (28, 33, 34) which is external to the register to be modified. Each modifier bit is obtained more specifically from an AND-gate (21-25) to whose inputs the bits coming from the two above-mentioned independent registers (33, 34) are conveyed.