Patents by Inventor Patrick B. Halahan

Patrick B. Halahan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10779484
    Abstract: Embodiments of the present disclosure include systems and methods for downloading and installing software updates upon an irrigation control unit (ICU). Some of the disclosed embodiments include error checking and integrity verification procedures which help ensure that the new software is properly installed. In some embodiments the update is coordinated in conjunction with the ICU's regular contact with a control server.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: September 22, 2020
    Assignee: ET Water Systems, Inc.
    Inventors: Patrick B. Halahan, Peter Bice, Mark Elliot
  • Patent number: 9986696
    Abstract: Embodiments of the present disclosure include systems and methods for downloading and installing software updates upon an irrigation control unit (ICU). Some of the disclosed embodiments include error checking and integrity verification procedures which help ensure that the new software is properly installed. In some embodiments the update is coordinated in conjunction with the ICU's regular contact with a control server.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: June 5, 2018
    Assignee: ET Water Systems, Inc.
    Inventors: Patrick B. Halahan, Peter Bice, Mark Elliot
  • Publication number: 20180139912
    Abstract: Embodiments of the present disclosure include systems and methods for downloading and installing software updates upon an irrigation control unit (ICU). Some of the disclosed embodiments include error checking and integrity verification procedures which help ensure that the new software is properly installed. In some embodiments the update is coordinated in conjunction with the ICU's regular contact with a control server.
    Type: Application
    Filed: January 4, 2018
    Publication date: May 24, 2018
    Inventors: Patrick B. Halahan, Peter Bice, Mark Elliot
  • Patent number: 9414552
    Abstract: A smart irrigation system for an irrigation controller associated with an irrigation site is described herein. The smart irrigation system comprises a central control system having a user interface and a smart scheduler. The central control system is configured to receive a landscape information associated with the irrigation site. The landscape information is provided by a user via the user interface. The central control system is further configured to receive an environmental information associated with the irrigation site. The central control system is further configured to derive an irrigation schedule for the irrigation site based on the landscape information and the environmental information. The central control system being further configured to send the irrigation schedule. The smart scheduler comprises a data receiver, a processor, and a signal interface. The data receiver is configured to receive the irrigation schedule.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: August 16, 2016
    Assignee: ET WATER SYSTEMS, INC.
    Inventors: Patrick B. Halahan, J. Patrick McIntyre, Mark Coopersmith, Mark Puckett
  • Publication number: 20150313098
    Abstract: A smart irrigation system for an irrigation controller associated with an irrigation site is described herein. The smart irrigation system comprises a central control system having a user interface and a smart scheduler. The central control system is configured to receive a landscape information associated with the irrigation site. The landscape information is provided by a user via the user interface. The central control system is further configured to receive an environmental information associated with the irrigation site. The central control system is further configured to derive an irrigation schedule for the irrigation site based on the landscape information and the environmental information. The central control system being further configured to send the irrigation schedule. The smart scheduler comprises a data receiver, a processor, and a signal interface. The data receiver is configured to receive the irrigation schedule.
    Type: Application
    Filed: February 2, 2015
    Publication date: November 5, 2015
    Inventors: Patrick B. Halahan, J. Patrick McIntyre, Mark Coopersmith, Mark Puckett
  • Publication number: 20150057818
    Abstract: Embodiments of the present disclosure include systems and methods for downloading and installing software updates upon an irrigation control unit (ICU). Some of the disclosed embodiments include error checking and integrity verification procedures which help ensure that the new software is properly installed. In some embodiments the update is coordinated in conjunction with the ICU's regular contact with a control server.
    Type: Application
    Filed: August 26, 2014
    Publication date: February 26, 2015
    Inventors: Patrick B. Halahan, Peter Bice, Mark Elliot
  • Patent number: 8948921
    Abstract: A smart irrigation system for an irrigation controller associated with an irrigation site is described herein. The smart irrigation system comprises a central control system having a user interface and a smart scheduler. The central control system is configured to derive and send an irrigation schedule for the irrigation. The smart scheduler comprises a data receiver, a processor, and a signal interface. The data receiver is configured to receive the irrigation schedule. The processor is configured to convert the irrigation schedule to a series of control signals that the irrigation controller recognizes. The signal interface is configured to connect to the irrigation controller and to send the series of control signals to the irrigation controller. The system uses weather data and irrigation site-specific information to automatically apply the optimal irrigation schedule. User are able to remotely control the irrigation via networks such as Internet.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: February 3, 2015
    Assignee: ET Water Systems, Inc.
    Inventors: Patrick B. Halahan, J. Patrick McIntyre, Mark Coopersmith, Mark Puckett
  • Publication number: 20120303168
    Abstract: A smart irrigation system for an irrigation controller associated with an irrigation site is described herein. The smart irrigation system comprises a central control system having a user interface and a smart scheduler. The central control system is configured to derive and send an irrigation schedule for the irrigation site. The smart scheduler comprises a data receiver, a processor, and a signal interface. The data receiver is configured to receive the irrigation schedule. The processor is configured to convert the irrigation schedule to a series of control signals that the irrigation controller recognizes. The signal interface is configured to connect to the irrigation controller and to send the series of control signals to the irrigation controller. The system uses weather data and irrigation site-specific information to automatically apply the optimal irrigation schedule. Users are able to remotely control the irrigation via networks such as Internet.
    Type: Application
    Filed: November 21, 2011
    Publication date: November 29, 2012
    Applicant: ET Water Systems, Inc.
    Inventors: Patrick B. Halahan, J. Patrick McIntyre, Mark Coopersmith, Mark Puckett
  • Patent number: 7186586
    Abstract: A packaging substrate (310) includes a semiconductor interposer (120) and at least one other intermediate substrate (110), e.g. a BT substrate. The semiconductor interposer has first contact pads (136C) attachable to dies (124) above the interposer, and second contact pads (340) attachable to circuitry below the interposer. Through vias (330) are made in the semiconductor substrate (140) of the interposer (120). Conductive paths going through the through vias connect the first contact pads (136C) to the second contact pads (340). The second contact pads (340) protrude on the bottom surface of the interposer. These protruding contact pads (340) are inserted into vias (920) formed in the top surface of the BT substrate. The vias provide a strong mechanical connection and facilitate the interposer handling, especially if the interposer is thin. In some embodiments, an interposer or a die (124.1) has vias in the top surface. Protruding contact pads (340.1, 340.2) of another die (124.1, 124.
    Type: Grant
    Filed: October 19, 2005
    Date of Patent: March 6, 2007
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Sergey Savastiouk, Patrick B. Halahan, Sam Kao
  • Patent number: 7060601
    Abstract: A packaging substrate (310) includes a semiconductor interposer (120) and at least one other intermediate substrate (110), e.g. a BT substrate. The semiconductor interposer has first contact pads (136C) attachable to dies (124) above the interposer, and second contact pads (340) attachable to circuitry below the interposer. Through vias (330) are made in the semiconductor substrate (140) of the interposer (120). Conductive paths going through the through vias connect the first contact pads (136C) to the second contact pads (340). The dies (124) are attached to the interposer after the attachment of the interposer to the BT substrate. In sequential soldering operations, the solder hierarchy is maintained by dissolving some material (e.g. copper) in the solder during soldering to raise the solder's melting temperature.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: June 13, 2006
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Sergey Savastiouk, Patrick B. Halahan, Sam Kao
  • Patent number: 7049170
    Abstract: A packaging substrate (310) includes a semiconductor interposer (120) and at least one other intermediate substrate (110), e.g. a BT substrate. The semiconductor interposer has first contact pads (136C) attachable to dies (124) above the interposer, and second contact pads (340) attachable to circuitry below the interposer. Through vias (330) are made in the semiconductor substrate (140) of the interposer (120). Conductive paths going through the through vias connect the first contact pads (136C) to the second contact pads (340). The second contact pads (340) protrude on the bottom surface of the interposer. These protruding contact pads (340) are inserted into vias (920) formed in the top surface of the BT substrate. The vias provide a strong mechanical connection and facilitate the interposer handling, especially if the interposer is thin. In some embodiments, an interposer or a die (124.1) has vias in the top surface. Protruding contact pads (340.1, 340.2) of another die (124.1, 124.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: May 23, 2006
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Sergey Savastiouk, Patrick B. Halahan, Sam Kao
  • Patent number: 7034401
    Abstract: A packaging substrate (310) includes a semiconductor interposer (120) and at least one other intermediate substrate (110), e.g. a BT substrate. The semiconductor interposer has first contact pads (136C) attachable to dies (124) above the interposer, and second contact pads (340) attachable to circuitry below the interposer. Through vias (330) are made in the semiconductor substrate (140) of the interposer (120). Conductive paths going through the through vias connect the first contact pads (136C) to the second contact pads (340). The dies (124) are attached to the interposer after the attachment of the interposer to the BT substrate. In sequential soldering operations, the solder hierarchy is maintained by dissolving some material (e.g. copper) in the solder during soldering to raise the solder's melting temperature.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: April 25, 2006
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Sergey Savastiouk, Patrick B. Halahan, Sam Kao
  • Patent number: 7001825
    Abstract: In some embodiments, a circuit structure comprises a semiconductor substrate, an opening passing through the substrate between a first side of the substrate and a second side of the substrate, and a plurality of conductive layers in the opening. In some embodiments, one conductive layer provides an electromagnetic shield that shields the substrate from AC signals carried by a contact pad made from another conductive layer on a backside of the substrate. The conductive layers can also be used to form capacitor/rectifier networks. Manufacturing methods also provided.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: February 21, 2006
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Patrick B. Halahan, Oleg Siniaguine
  • Patent number: 6844241
    Abstract: In some embodiments, a circuit structure comprises a semiconductor substrate, an opening passing through the substrate between a first side of the substrate and a second side of the substrate, and a plurality of conductive layers in the opening. In some embodiments, one conductive layer provides an electromagnetic shield that shields the substrate from AC signals carried by a contact pad made from another conductive layer on a backside of the substrate. The conductive layers can also be used to form capacitor/rectifier networks. Manufacturing methods also provided.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: January 18, 2005
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Patrick B. Halahan, Oleg Siniaguine
  • Patent number: 6787916
    Abstract: Semiconductor dies are bonded to contact pads formed in a substrate's cavity. Vias through the substrate open into the cavity. Conductive lines passing through the vias connect the contact pads in the cavity to contact pads on another side of the substrate. A passage in the substrate opens into the cavity and provides an escape or pressure relief path for material filling the cavity. The passage can also be used to introduce material into the cavity.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: September 7, 2004
    Assignee: Tru-Si Technologies, Inc.
    Inventor: Patrick B. Halahan
  • Patent number: 6753205
    Abstract: Semiconductor dies are bonded to contact pads formed in a substrate's cavity. Vias through the substrate open into the cavity. Conductive lines passing through the vias connect the contact pads in the cavity to contact pads on another side of the substrate. A passage in the substrate opens into the cavity and provides an escape or pressure relief path for material filling the cavity. The passage can also be used to introduce material into the cavity.
    Type: Grant
    Filed: January 27, 2003
    Date of Patent: June 22, 2004
    Assignee: Tru-Si Technologies, Inc.
    Inventor: Patrick B. Halahan
  • Publication number: 20030148552
    Abstract: Semiconductor dies are bonded to contact pads formed in a substrate's cavity. Vias through the substrate open into the cavity. Conductive lines passing through the vias connect the contact pads in the cavity to contact pads on another side of the substrate. A passage in the substrate opens into the cavity and provides an escape or pressure relief path for material filling the cavity. The passage can also be used to introduce material into the cavity.
    Type: Application
    Filed: January 27, 2003
    Publication date: August 7, 2003
    Inventor: Patrick B. Halahan
  • Publication number: 20030047798
    Abstract: Semiconductor dies are bonded to contact pads formed in a substrate's cavity. Vias through the substrate open into the cavity. Conductive lines passing through the vias connect the contact pads in the cavity to contact pads on another side of the substrate. A passage in the substrate opens into the cavity and provides an escape or pressure relief path for material filling the cavity. The passage can also be used to introduce material into the cavity.
    Type: Application
    Filed: September 13, 2001
    Publication date: March 13, 2003
    Inventor: Patrick B. Halahan
  • Patent number: 6498074
    Abstract: A semiconductor wafer is diced before thinning. The wafer is diced only part of the way through, to form grooves which are at least as deep as the final thickness of each chip to be obtained from the wafer. Then the wafer backside is etched with a dry etch, for example, atmospheric pressure plasma etch. The wafer is thinned until the grooves are exposed from the backside. The dry etch leaves the chip's backside smooth. After the grooves have been exposed, the dry etch is continued to remove damage from the chip sidewalls and to round the chips' bottom edges and corners. The grooves' aspect ratio is large to reduce the lateral etch rate of the chip sidewalls and thus allow more area for on-chip circuitry.
    Type: Grant
    Filed: June 6, 2001
    Date of Patent: December 24, 2002
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Oleg Siniaguine, Patrick B. Halahan, Sergey Savastiouk
  • Patent number: 6498381
    Abstract: In some embodiments, a circuit structure comprises a semiconductor substrate, an opening passing through the substrate between a first side of the substrate and a second side of the substrate, and a plurality of conductive layers in the opening. In some embodiments, one conductive layer provides an electromagnetic shield that shields the substrate from AC signals carried by a contact pad made from another conductive layer on a backside of the substrate. The conductive layers can also be used to form capacitor/rectifier networks. Manufacturing methods are also provided.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: December 24, 2002
    Assignee: Tru-Si Technologies, Inc.
    Inventors: Patrick B. Halahan, Oleg Siniaguine