Patents by Inventor Patrick Clement

Patrick Clement has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6856266
    Abstract: A Multi-Rate Analog-to-Digital Converter (19) is coupled to a single crystal oscillator (17) as a reference clock and has at least two separate channels arranged to sample and convert input data at two differing clock rates. Each channel derives a clock signal from the reference clock. Associated with each of the channels is a Sigma-Delta converter (10a, 10b) comprising a modulator (12), a filter (14) and a resampler (18). The modulator (12) receives input data and provides a data signal to the filter (14), which itself provides a filtered data signal to the associated data resampler. The data resampler resamples the data and provides a digital output signal. As there is sampling in the digital domain the advantages associated with signal processing, speed and low noise injection are obtained. Similarly as the output of the modulator (12) is in digital form, it can be manipulated and processed readily and with the existing software.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: February 15, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Patrick Clement, Nadim Khlat, Daniel B Schwartz
  • Publication number: 20050001748
    Abstract: A Multi-Rate Analog-to-Digital Converter (19) is coupled to a single crystal oscillator (17) as a reference clock and has at least two separate channels arranged to sample and convert input data at two differing clock rates. Each channel derives a clock signal from the reference clock. Associated with each of the channels is a Sigma-Delta converter (10a, 10b) comprising a modulator (12), a filter (14) and a resampler (18). The modulator (12) receives input data and provides a data signal to the filter (14), which itself provides a filtered data signal to the associated data resampler. The data resampler resamples the data and provides a digital output signal. As there is sampling in the digital domain the advantages associated with signal processing, speed and low noise injection are obtained. Similarly as the output of the modulator (12) is in digital form, it can be manipulated and processed readily and with existing software.
    Type: Application
    Filed: September 9, 2002
    Publication date: January 6, 2005
    Inventors: Patrick Clement, Nadim Khlat, Daniel Schwartz
  • Publication number: 20040233091
    Abstract: An analog to digital converter comprising a plurality of comparators arranged to periodically sample an analog signal; a calculator arranged to predict a change in signal magnitude of the analog signal between one sample of the analog signal and another sample of the analog signal based upon predetermined criteria of the analog signal; and a controller for varying an operational parameter of one or more of the comparators based upon the predicted change in the signal magnitude of the analog signal.
    Type: Application
    Filed: May 21, 2004
    Publication date: November 25, 2004
    Inventors: Patrick Clement, Laurent Loup, Abdessalem Turki
  • Patent number: 6713100
    Abstract: A novel, nutritious confectionery product with a taste, texture and color that is particularly appealing to children is disclosed. The food product includes non-cereal vegetable solids and solid fat characterized in that the non-cereal vegetable solids are present in the form of particles in an amount of at least about 15% by weight of the total weight of the confectionery product. These particles are surrounded by the fat. The non-cereal vegetable solids are added and mixed into a continuous phase of fat to provide a shaped fat-based product upon setting.
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: March 30, 2004
    Assignee: Nestec S.A.
    Inventors: Daniel Schmoutz, Patrick Clement
  • Publication number: 20040038652
    Abstract: A multipath wideband communications receiver (100) having a plurality of RF signal paths (116, 136) covering different but overlapping frequency bands and a plurality of baseband signal paths (140, 150, 160, 170, 180, 190), the paths being re-configurable for sharing of the first and second paths in different ways in order to facilitate processing of received signals in different modes.
    Type: Application
    Filed: June 6, 2003
    Publication date: February 26, 2004
    Inventors: Nadim Khlat, Patrick Clement
  • Patent number: 6678340
    Abstract: Apparatus 20,30,40,50 for receiving and processing a wanted Radio Frequency signal comprises a radio frequency to intermediate frequency down-conversion stage 20 for receiving the wanted radio frequency signal and out-putting a complex intermediate frequency signal; an analogue to digital converter 30 for converting the complex intermediate frequency signal to a digital complex intermediate signal; an intermediate frequency to base-band down-conversion stage 40 for receiving the digital complex intermediate frequency signal and out-putting a digital complex base-band signal; and a complex notch filter 50 for receiving the digital complex base-band signal and out-putting a notch filtered digital complex base-band signal wherein the complex notch filter 50 substantially filters out a small portion of the base-band signal centred about a first, non-zero, frequency while substantially passing a corresponding portion of the base-band signal centred about a second frequency having the same magnitude but opposite si
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: January 13, 2004
    Assignee: Motorola, Inc.
    Inventors: Nadim Khlat, Patrick Clement
  • Patent number: 6597748
    Abstract: Apparatus 20, 30, 50, 60 for receiving a carrier signal modulated by a wanted signal, the modulated carrier signal occupying one of a plurality of channels whose central frequencies are separated from one another by a fixed frequency referred to as the channel spacing, the apparatus including a local oscillator 28 for generating first and second signals at a frequency which is not an integral multiple of half the channel spacing whereby when the received carrier signal is mixed with the first and second signals, a complex, digital Very Low Intermediate Frequency (VLIF) signal is generated in which the wanted signal is centred about a VLIF which is slightly larger than half the channel spacing.
    Type: Grant
    Filed: November 28, 2001
    Date of Patent: July 22, 2003
    Assignee: Motorola, Inc.
    Inventors: Alex Hietala, Nadim Khlat, Patrick Clement
  • Patent number: 6356594
    Abstract: An analogue to digital or digital to analogue data converter 1 for converting between a first digital signal 101,102 at a first sampling rate fo and a first analogue signal 171,172, comprises a first conversion stage 11,12,21,22,31,32 for converting an input signal 101,102 into an intermediate digital signal 131,132 at a second sampling rate fsm which is greater than the first over-sampling rate fo; a processing stage 30,41,42,43,44,51,52 for performing digital signal processing on the intermediate digital signal to generate a processed intermediate digital signal 151,152; and a second conversion stage 61,62,71,72 for converting the processed intermediate digital signal into an output signal 171,172, wherein the input and output signals comprise the first analogue signal and the first digital signal or vice versa depending on whether the data converter is performing analogue to digital or digital to analogue conversion.
    Type: Grant
    Filed: November 2, 1999
    Date of Patent: March 12, 2002
    Assignee: Motorola, Inc.
    Inventors: Patrick Clement, Nadim Khlat
  • Patent number: 4744095
    Abstract: An arrangement ensuring the change-over of two channels through which the same digital information is conveyed with automatic data alignment over a .+-.3.5 bit range comprises for each channel an array of buffer stores operating at a write rate H.sub.i /N.sub.i (where i=1, 2), an oscillator operating at a rate H which provides reading of the buffer stores at the rate H/N and being synchronized in phase-opposition with one or the other of the write rates, and a logic comparator controlling the write rates H.sub.i /N.sub.i, the routing of the write rates to the input of the oscillator, as well as a change-over switch for the data.In the buffer store of the channel assumed to be the one whose quality degrades, the data are converted into N parallel streams at the rate H.sub.2 /N and are read at the rate H/N of the oscillator. In the other channel, the write rate of the buffer store is forced to the rate H.sub.
    Type: Grant
    Filed: August 11, 1986
    Date of Patent: May 10, 1988
    Assignee: Telecommunications Radioelectriques et Telephoniques T.R.T.
    Inventors: Jean-Francois R. Cornet, Patrick Clement
  • Patent number: 3933273
    Abstract: The contents of a collapsible tube are expelled by placing the tube in a close-fitting sleeve having a removable cap with an orifice fitting over the discharge nozzle of the tube and a plunger which engages the other end of the tube and has a diametral groove to receive the crimped closed end of the tube. Movement of the plunger towards the cap causes the wall of the tube to concertina.
    Type: Grant
    Filed: February 13, 1974
    Date of Patent: January 20, 1976
    Inventor: Patrick Clement Cox