Abstract: A method of reducing surface roughness of a resist feature disposed on a substrate includes generating a plasma having a plasma sheath and ions therein. A shape of the boundary between the plasma and plasma sheath is modified using a plasma sheath modifier, so that a portion of the boundary facing the substrate is not parallel to a plane defined by the substrate. During a first exposure, the resist feature is exposed to electromagnetic radiation having a desired wavelength and the ions are accelerated across the boundary having the modified shape toward the resist features over an angular range.

Abstract: A method of reducing roughness in an opening in a surface of a resist material disposed on a substrate, comprises generating a plasma having a plasma sheath and ions therein. The method also includes modifying a shape of a boundary defined between the plasma and the plasma sheath with a plasma sheath modifier so that a portion of the boundary facing the resist material is not parallel to a plane defined by the surface of the substrate. The method also includes providing a first exposure of ions while the substrate is in a first position, the first exposure comprising ions accelerated across the boundary having the modified shape toward the resist material over an angular range with respect to the surface of the substrate.

Abstract: A method of treating a photoresist relief feature having an initial line roughness and an initial critical dimension. The method may include directing ions toward the photoresist in a first exposure at a first angular range and first dose rate and a that is configured to reduce the initial line roughness to a second line roughness. The method may also include directing ions toward the photoresist relief feature in a second exposure at a second ion dose rate greater than the first dose rate, wherein the second ion dose rate is configured to swell the photoresist relief feature.

Abstract: A method of treating a photoresist relief feature having an initial line roughness and an initial critical dimension. The method may include directing ions toward the photoresist in a first exposure at a first angular range and first dose rate and a that is configured to reduce the initial line roughness to a second line roughness. The method may also include directing ions toward the photoresist relief feature in a second exposure at a second ion dose rate greater than the first dose rate, wherein the second ion dose rate is configured to swell the photoresist relief feature.

Abstract: A method of patterning a substrate, comprises providing a set of patterned features on the substrate, exposing the set of patterned features to a dose of ions incident on the substrate over multiple angles, and selectively etching exposed portions of the patterned features.

Abstract: A boundary between a plasma and a plasma sheath is controlled such that a portion of the shape is not parallel to a plane defined by a front surface of the workpiece facing the plasma. Ions in the plasma are directed toward the workpiece. These ions can either seal pores or clean a material from a structure on the workpiece. This structure may, for example, have multiple sidewalls. A process that both cleans a material and seals pores in the structure may be performed.

Abstract: A template used for printing is implanted to change the properties of the materials it is composed of. This template may have multiple surfaces that define indentations. The ion species that is implanted may be C, N, H, F, He, Ar, B, As, P, Ge, Ga, Si, Zn, and Al and is configured to render the implanted regions hydrophobic in one instance. This will reduce adhesion of a polymer to the template during a printing process. The implant may be at a plurality of angles so all surfaces of the template are implanted. In other instances, a film on the surface of the template is knocked in or hardened using the ion species.

Abstract: A method of reducing the roughness profile in a plurality of patterned resist features. Each patterned resist feature includes a first sidewall and a second sidewall opposite the first sidewall, wherein each patterned resist feature comprises a mid frequency line width roughness and a low frequency linewidth roughness. A plurality of ion exposure cycles are performed, wherein each ion exposure cycle comprises providing ions at a tilt angle of about five degrees or larger upon the first sidewall, and providing ions at a tilt angle of about five degrees or larger upon the second sidewall. Upon the performing of the plurality of ion exposure cycles the mid frequency and low frequency linewidth roughness are reduced.

Abstract: A method of reducing surface roughness of a resist feature disposed on a substrate includes generating a plasma having a plasma sheath and ions therein. A shape of the boundary between the plasma and plasma sheath is modified using a plasma sheath modifier, so that a portion of the boundary facing the substrate is not parallel to a plane defined by the substrate. During a first exposure, the resist feature is exposed to electromagnetic radiation having a desired wavelength and the ions are accelerated across the boundary having the modified shape toward the resist features over an angular range.

Abstract: A method of reducing the roughness profile in a plurality of patterned resist features. Each patterned resist feature includes a first sidewall and a second sidewall opposite the first sidewall, wherein each patterned resist feature comprises a mid frequency line width roughness and a low frequency linewidth roughness. A plurality of ion exposure cycles are performed, wherein each ion exposure cycle comprises providing ions at a tilt angle of about five degrees or larger upon the first sidewall, and providing ions at a tilt angle of about five degrees or larger upon the second sidewall. Upon the performing of the plurality of ion exposure cycles the mid frequency and low frequency linewidth roughness are reduced.

Abstract: A method of patterning a substrate comprises providing an array of resist features defined by a first pitch and a first gap width between adjacent resist features. Particles are introduced into the array of resist features, wherein the array of resist features becomes hardened. The introduction of particles may cause a reduction in critical dimension of the resist features. Sidewalls are provided on side portions of hardened resist features. Subsequent to the formation of the sidewalls, the hardened resist features are removed, leaving an array of isolated sidewalls disposed on the substrate. The sidewall array provides a mask for double patterning of features in the substrate layers disposed below the sidewalls, wherein an array of features formed in the substrate has a second pitch equal to half that of the first pitch.

Abstract: A method of treating resist features comprises positioning, in a process chamber, a substrate having a set of patterned resist features on a first side of the substrate and generating a plasma in the process chamber having a plasma sheath adjacent to the first side of the substrate. The method may further comprise modifying a shape of a boundary between the plasma and the plasma sheath with a plasma sheath modifier so that a portion of the shape of the boundary is not parallel to a plane defined by a front surface of the substrate facing the plasma, wherein ions from the plasma impinge on the patterned resist features over a wide angular range during a first exposure.

Abstract: The present invention is directed to a batch system for managing and analyzing batch runs of a batch process in a process cell. The batch system includes a computer readable medium, a plurality of batch management routines and a plurality of batch analysis routines stored on the computer readable medium and adapted to be executed by the at least one processor. The batch management routines are operable to schedule batch runs and create and edit recipes for the batch process. The batch analysis routines include a batch filter routine, a golden batch routine, a cycle time analysis routine, and a report wizard routine.

Abstract: The present invention is directed to a batch system for managing and analyzing batch runs of a batch process in a process cell. The batch system includes a computer readable medium, a plurality of batch management routines and a plurality of batch analysis routines stored on the computer readable medium and adapted to be executed by the at least one processor. The batch management routines are operable to schedule batch runs and create and edit recipes for the batch process. The batch analysis routines include a batch filter routine, a golden batch routine, a cycle time analysis routine, and a report wizard routine.

Abstract: The present invention generally relates, to optical lithography and more particularly relates to the fabrication of transparent or semitransparent phase shifting masks used in the manufacture of semiconductor devices. In particular, the present invention utilizes an internal etch stop layer and either a deposited substantially transparent layer, deposited partially transparent layer or deposited opaque thereon in an otherwise conventional photomask. The photomask of the present invention is used to make semiconductor devices or integrated circuits.

Abstract: A semiconductor device includes conductor regions 24 and 26 on a layer of the semiconductor device; a first insulator layer 28 over and between the conductor regions 24 and 26; polyimide regions 30, 32, and 34 over the first insulator layer 28 in gaps between the conductor regions 24 and 26; and a second insulator layer 38 over the first insulator layer 28 and over the polyimide regions 30, 32, and 34. A surface of the second insulator layer 38 is substantially planar.

Abstract: A method for planarizing the surface of a layer in a semiconductor device includes forming conductor regions 24, 26, and 28 on a layer of the semiconductor device; forming first insulator regions 30, 32, and 34 in gaps between the conductor regions 24, 26, and 28; and forming an insulator layer 40 over the first insulator regions 30, 32, and 34, and over the conductor regions 24, 26, and 28 such that a surface of the insulator layer 40 will be substantially planar.

Abstract: A time delayed cash dispenser is interconnected with a node processor which interfaces with an EFT system. The node processor emulates an ATM to access and perform transactions through the EFT system and activates a printer to issue scrip representative of authorized cash disbursements. The node processor also generates electronic commands to activate the cash dispenser upon manual entry of a transaction code to disburse cash in redemption for the scrip.