Patents by Inventor Patrick Martin McGuinness
Patrick Martin McGuinness has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20190195825Abstract: An electrochemical sensor is provided which may be formed using micromachining techniques commonly used in the manufacture of integrated circuits. This is achieved by forming microcapillaries in a silicon substrate and forming an opening in an insulating layer to allow environmental gases to reach through to the top side of the substrate. A porous electrode is printed on the top side of the insulating layer such that the electrode is formed in the opening in the insulating layer. The sensor also comprises at least one additional electrode. The electrolyte is then formed on top of the electrodes. A cap is formed over the electrodes and electrolyte. This arrangement may easily be produced using micromachining techniques.Type: ApplicationFiled: August 29, 2017Publication date: June 27, 2019Applicant: ANALOG DEVICES GLOBALInventors: Alfonso Berduque, Helen Berney, William Allan Lane, Raymond J. Speer, Brendan Cawley, Donal McAuliffe, Patrick Martin McGuinness
-
Patent number: 10288582Abstract: An integrated ion-sensitive probe is provided. In an example, an ion-sensitive probe can include a semiconductor substrate and a first passive electrode attached to the semiconductor substrate. The first passive electrode can be configured to contact a solution and to provide a first electrical voltage as function of a concentration of an ion within the solution. In certain examples, a passive reference electrode can be co-located on the semiconductor substrate. In some examples, processing electronics can be integrated on the semiconductor substrate.Type: GrantFiled: January 12, 2016Date of Patent: May 14, 2019Assignee: Analog Devices GlobalInventors: Helen Berney, William Allan Lane, Patrick Martin McGuinness, Thomas G. O'Dwyer
-
Publication number: 20190128939Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.Type: ApplicationFiled: November 1, 2017Publication date: May 2, 2019Inventors: Alan J. O'Donnell, David Aherne, Javier Alejandro Salcedo, David J. Clarke, John A. Cleary, Patrick Martin McGuinness, Albert C. O'Grady
-
Patent number: 10148263Abstract: A combined isolator and power switch is disclosed. Such devices are useful in isolating low voltage components such as control compilers from motors or generators working at high voltages. The combined isolator and power switch includes circuits to transfer internal power from its low voltage side to the switch driver circuits on the high voltage side. The combined isolator and switch is compact and easy to use.Type: GrantFiled: July 21, 2016Date of Patent: December 4, 2018Assignee: Analog Devices Global Unlimited CompanyInventors: Edward John Coyne, Patrick Martin McGuinness, William Allan Lane, Laurence O'Sullivan
-
Patent number: 10043792Abstract: An apparatus including an electrostatic discharge (ESD) protection device comprising a semiconductor having first, second and third regions arranged to form a transistor, wherein the first region is doped with a first impurity of a first conductivity type and is separated from the second region which is doped with a second impurity of a second conductivity type opposite the first type, and wherein a dimensional constraint of the regions defines an operational threshold of the ESD protection device. In one example, the separation between a collector and an emitter of a bipolar transistor defines a trigger voltage to cause the electrostatic discharge protection device to become conducting. In another example, a width of a bipolar transistor base controls a holding voltage of the electrostatic discharge protection device.Type: GrantFiled: November 8, 2016Date of Patent: August 7, 2018Assignee: Analog Devices, Inc.Inventors: Edward John Coyne, Patrick Martin McGuinness, Paul Malachy Daly, Bernard Patrick Stenson, David J. Clarke, Andrew David Bain, William Allan Lane
-
Publication number: 20180059044Abstract: An electrochemical sensor is provided which may be formed using micromachining techniques commonly used in the manufacture of integrated circuits. This is achieved by forming microcapillaries in a silicon substrate and forming an opening in an insulating layer to allow environmental gases to reach through to the top side of the substrate. A porous electrode is printed on the top side of the insulating layer such that the electrode is formed in the opening in the insulating layer. The sensor also comprises at least one additional electrode. The electrolyte is then formed on top of the electrodes. A cap is formed over the electrodes and electrolyte. This arrangement may easily be produced using micromachining techniques.Type: ApplicationFiled: August 30, 2016Publication date: March 1, 2018Inventors: Alfonso Berduque, Helen Berney, William Allan Lane, Raymond J. Speer, Brendan Cawley, Donal Mcauliffe, Patrick Martin McGuinness
-
Patent number: 9871373Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.Type: GrantFiled: March 27, 2015Date of Patent: January 16, 2018Assignee: Analog Devices GlobalInventors: Alan J. O'Donnell, David Aherne, Javier Alejandro Salcedo, David J. Clarke, John A. Cleary, Patrick Martin McGuinness, Albert C. O'Grady
-
Publication number: 20170279444Abstract: A combined isolator and power switch is disclosed. Such devices are useful in isolating low voltage components such as control compilers from motors or generators working at high voltages. The combined isolator and power switch includes circuits to transfer internal power from its low voltage side to the switch driver circuits on the high voltage side. The combined isolator and switch is compact and easy to use.Type: ApplicationFiled: July 21, 2016Publication date: September 28, 2017Inventors: Edward John Coyne, Patrick Martin McGuinness, William Allan Lane, Lawrence O'Sullivan
-
Publication number: 20170199148Abstract: An integrated ion-sensitive probe is provided. In an example, an ion-sensitive probe can include a semiconductor substrate and a first passive electrode attached to the semiconductor substrate. The first passive electrode can be configured to contact a solution and to provide a first electrical voltage as function of a concentration of an ion within the solution. In certain examples, a passive reference electrode can be co-located on the semiconductor substrate. In some examples, processing electronics can be integrated on the semiconductor substrate.Type: ApplicationFiled: January 12, 2016Publication date: July 13, 2017Inventors: Helen Berney, William Allan Lane, Patrick Martin McGuinness, Thomas G. O'Dwyer
-
Publication number: 20170117266Abstract: An apparatus including an electrostatic discharge (ESD) protection device comprising a semiconductor having first, second and third regions arranged to form a transistor, wherein the first region is doped with a first impurity of a first conductivity type and is separated from the second region which is doped with a second impurity of a second conductivity type opposite the first type, and wherein a dimensional constraint of the regions defines an operational threshold of the ESD protection device. In one example, the separation between a collector and an emitter of a bipolar transistor defines a trigger voltage to cause the electrostatic discharge protection device to become conducting. In another example, a width of a bipolar transistor base controls a holding voltage of the electrostatic discharge protection device.Type: ApplicationFiled: November 8, 2016Publication date: April 27, 2017Inventors: Edward John Coyne, Patrick Martin McGuinness, Paul Malachy Daly, Bernard Patrick Stenson, David J. Clarke, Andrew David Bain, William Allan Lane
-
Patent number: 9520486Abstract: An apparatus including an electrostatic discharge (ESD) protection device comprising a semiconductor having first, second and third regions arranged to form a transistor, wherein the first region is doped with a first impurity of a first conductivity type and is separated from the second region which is doped with a second impurity of a second conductivity type opposite the first type, and wherein a dimensional constraint of the regions defines an operational threshold of the ESD protection device. In one example, the separation between a collector and an emitter of a bipolar transistor defines a trigger voltage to cause the electrostatic discharge protection device to become conducting. In another example, a width of a bipolar transistor base controls a holding voltage of the electrostatic discharge protection device.Type: GrantFiled: November 4, 2009Date of Patent: December 13, 2016Assignee: Analog Devices, Inc.Inventors: Edward John Coyne, Patrick Martin McGuinness, Paul Malachy Daly, Bernard Patrick Stenson, David J. Clarke, Andrew David Bain, William Allan Lane
-
Patent number: 9484739Abstract: A protection device is provided that exhibits a turn on time of order of one nanosecond or less. Such a device provides enhanced protection for integrated circuits against electrostatic discharge events. This in turn reduces the risk of device failure in use. The protection device can include a bipolar transistor structure connected between a node to be protected and a discharge path.Type: GrantFiled: September 25, 2014Date of Patent: November 1, 2016Assignee: ANALOG DEVICES GLOBALInventors: Edward John Coyne, John Twomey, Seamus P. Whiston, David J. Clarke, Donal P. McAuliffe, William Allan Lane, Stephen Denis Heffernan, Brian A. Moane, Brian Michael Sweeney, Patrick Martin McGuinness
-
Patent number: 9484136Abstract: A magnetic core is provided for an integrated circuit, the magnetic core comprising: a plurality of layers of magnetically functional material; a plurality of layers of a first insulating material; and at least one layer of an secondary insulating material; wherein layers of the first insulating material are interposed between layers of the magnetically functional material to form subsections of the magnetic core, and the at least one layer of second insulating material is interposed between adjacent subsections.Type: GrantFiled: June 26, 2013Date of Patent: November 1, 2016Assignee: Analog Devices GlobalInventors: Michael Noel Morrissey, Jan Kubik, Shane Patrick Geary, Patrick Martin McGuinness, Catriona Marie O'Sullivan
-
Publication number: 20160285255Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.Type: ApplicationFiled: March 27, 2015Publication date: September 29, 2016Inventors: Alan J. O'Donnell, David Aherne, Javier Alejandro Salcedo, David J. Clarke, John A. Cleary, Patrick Martin McGuinness, Albert C. O'Grady
-
Publication number: 20160094026Abstract: A protection device is provided that exhibits a turn on time of order of one nanosecond or less. Such a device provides enhanced protection for integrated circuits against electrostatic discharge events. This in turn reduces the risk of device failure in use. The protection device can include a bipolar transistor structure connected between a node to be protected and a discharge path.Type: ApplicationFiled: September 25, 2014Publication date: March 31, 2016Inventors: Edward John Coyne, John Twomey, Seamus P. Whiston, David J. Clarke, Donal P. McAuliffe, William Allan Lane, Stephen Denis Heffernan, Brian A. Moane, Brian Michael Sweeney, Patrick Martin McGuinness
-
Publication number: 20140062646Abstract: A magnetic core is provided for an integrated circuit, the magnetic core comprising: a plurality of layers of magnetically functional material; a plurality of layers of a first insulating material; and at least one layer of an secondary insulating material; wherein layers of the first insulating material are interposed between layers of the magnetically functional material to form subsections of the magnetic core, and the at least one layer of second insulating material is interposed between adjacent subsections.Type: ApplicationFiled: June 26, 2013Publication date: March 6, 2014Inventors: Michael Noel Morrissey, Jan Kubik, Shane Patrick Geary, Patrick Martin McGuinness, Catriona Marie O'Sullivan
-
Patent number: 8513713Abstract: A junction field effect transistor having a drain and a source, each defined by regions of a first type of semiconductor interconnected by a channel, and in which a dopant profile at a side of the drain facing the channel is modified so as to provide a region of reduced doping compared to a body region of the drain. The region of reduced doping and the body region can be defined by the same mask and doping step, but the mask is shaped to provide a lesser amount and thus less depth of doping for the region of reduced doping.Type: GrantFiled: May 10, 2012Date of Patent: August 20, 2013Assignee: Analog Devices, Inc.Inventors: Paul Malachy Daly, Andrew David Bain, Derek Frederick Bowers, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuinness, Bernard Patrick Stenson, William Allan Lane
-
Patent number: 8476684Abstract: Transistors having improved breakdown voltages and methods of forming the same are provided herein. In one embodiment, a method of forming a transistor comprises the steps of: forming a drain and a source by doping a semiconductor with a first dopant type to form a first type of semiconductor, the drain and source being separated from one another, wherein the drain comprises a first drain region of a first dopant concentration adjacent a second drain region, such that at least a portion of the second drain region is positioned between the first drain region and the source, and further comprising forming an intermediate region by doping the semiconductor so as to form a second type of semiconductor intermediate the drain and source, the intermediate region spaced apart from the second drain region.Type: GrantFiled: September 29, 2010Date of Patent: July 2, 2013Assignee: Analog Devices, Inc.Inventors: Edward John Coyne, Paul Malachy Daly, Jagar Singh, Seamus Whiston, Patrick Martin McGuinness, William Allan Lane
-
Patent number: 8390039Abstract: A field effect transistor having a drain, a gate and a source, where the drain and source are formed by semiconductor regions of a first type, and in which a further doped region is provided intermediate the gate and the drain. Field gradients around the drain are thereby reduced.Type: GrantFiled: November 2, 2009Date of Patent: March 5, 2013Assignee: Analog Devices, Inc.Inventors: Derek Frederick Bowers, Andrew David Bain, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuinness, Bernard Patrick Stenson, William Allan Lane
-
Patent number: 8357985Abstract: A bipolar transistor comprising an emitter region, a base region and a collector region, and a guard region spaced from and surrounding the base. The guard region can be formed in the same steps that form the base, and can serve to spread out the depletion layer in operation.Type: GrantFiled: January 13, 2012Date of Patent: January 22, 2013Assignee: Analog Devices, Inc.Inventors: William Allan Lane, Andrew David Bain, Derek Frederick Bowers, Paul Malachy Daly, Anne Maria Deignan, Michael Thomas Dunbar, Patrick Martin McGuinness, Bernard Patrick Stenson