Abstract: A method of fabricating an organic electronic device is provided. The organic electronic device has a structure including an upper conductive layer and an underlying layer immediately beneath said upper conducting layer and having at least one solution processable semiconducting layer. The upper conducting layer preferably has a thickness of between 10 nm and 200 nm. The method includes patterning said upper conductive layer of said structure by: laser ablating said upper conductive layer using a pulsed laser to remove regions of upper conductive layer from said underlying layer for said patterning; and wherein said laser ablating uses a single pulse of said laser to substantially completely remove a said region of said upper conductive layer to expose said underlying layer beneath.

Abstract: A method of fabricating an organic electronic device is provided. The organic electronic device has a structure including an upper conductive layer and an underlying layer immediately beneath said upper conducting layer and having at least one solution process able semiconducting layer. The upper conducting layer preferably has a thickness of between 10 nm and 200 nm. The method includes patterning said upper conductive layer of said structure by: laser ablating said upper conductive layer using a pulsed laser to remove regions of upper conductive layer from said underlying layer for said patterning; and wherein said laser ablating uses a single pulse of said laser to substantially completely remove a said region of said upper conductive layer to expose said underlying layer beneath.

Abstract: An electronic device comprising an optically transparent substrate, a first electrode structure incorporating a channel, said channel being optically transparent and said electrode structure being optically opaque, at least one intermediate layer, and a photosensitive dielectric layer disposed above the at least one intermediate layer, the photosensitive dielectric layer incorporating a trench in a region essentially over said channel, the electronic device further comprising a further electrode, wherein the further electrode is located partially in the trench and partially beyond the trench such that portions of the further electrode that extend beyond the trench are separated from the at least one intermediate layer by the photosensitive dielectric layer.

Abstract: An electronic device including at least first and second transistors integrated together on a substrate and each including an organic semiconductor region, wherein the first and second transistors are either both n-type or both p-type but wherein one of the first and second transistors is a normally-ON transistor and the other of the first and second transistors is a normally-OFF transistor.

Abstract: An electronic device comprising an optically transparent substrate, a first electrode structure incorporating a channel, said channel being optically transparent and said electrode structure being optically opaque, at least one intermediate layer, and a photosensitive dielectric layer disposed above the at least one intermediate layer, the photosensitive dielectric layer incorporating a trench in a region essentially over said channel, the electronic device further comprising a further electrode, wherein the further electrode is located partially in the trench and partially beyond the trench such that portions of the further electrode that extend beyond the trench are separated from the at least one intermediate layer by the photosensitive dielectric layer.

Abstract: A method of manufacturing an integrated circuit (IC) for driving a flexible display includes depositing a pattern of spatially non-repetitive features in a first layer on a flexible substrate, said pattern of spatially non-repetitive features not substantially regularly repeating in both of two orthogonal directions (x,y) in the plane of the substrate; depositing a pattern of spatially repetitive features in a second layer on said first layer; aligning said second layer and said first layer so as to allow electrical coupling between said non-repetitive features and said repetitive features, wherein distortion compensation is applied during deposition of said repetitive features to enable said alignment.

Abstract: We describe a method of displaying a document page with a predetermined size using a display device having edges defining lateral dimensions not substantially larger than said predetermined size and having a central re-writable display portion and a non-re-writable border, said document page comprising a central, foreground portion bearing one or both of text and graphics, a background having a background color and at least one margin having said background color, the method comprising: inputting page data defining a page for display; processing said page data to crop margins of said page such that, when displayed on said re-writable display portion, said non-re-writable border gives the appearance of said cropped margins, said processing generating cropped page data; and outputting said cropped page data for display on said re-writable display portion of said display.

Abstract: A method of selectively eliminating electrical shorts and other electrical defects from specific layers of a multilayer electronic device without damaging underlying layers. The method is based on a combination of an automated detection of the defects and selective laser ablation patterning (SLAP).

Abstract: An electronic device comprising an optically transparent substrate, a first electrode structure incorporating a channel, said channel being optically transparent and said electrode structure being optically opaque, at least one intermediate layer, and a photosensitive dielectric layer disposed above the at least one intermediate layer, the photosensitive dielectric layer incorporating a trench in a region essentially over said channel, the electronic device further comprising a further electrode, wherein the further electrode is located partially in the trench and partially beyond the trench such that portions of the further electrode that extend beyond the trench are separated from the at least one intermediate layer by the photosensitive dielectric layer.

Abstract: A method of producing a plurality of transistors each including a source/drain electrode pair comprising a conductor material and a channel comprising semiconductor material between the source and drain electrodes of said source/drain electrode pair; the method comprising (i) forming over a substrate at least a first layer of said conductor material or a precursor thereto and a second layer of said semiconductor material or a precursor thereto; and (ii) thereafter removing selected portions of at least said first and second layers so as to define at least two adjacent source/drain electrode pairs that are unconnected to each other within said first and second layers.

Abstract: A method of producing an array of electronic devices, the method including the steps of: forming one or more first conductive elements of a first electronic device on a substrate and one or more second conductive elements of a second electronic device on said substrate; and forming a layer of channel material over the substrate and the first and second conductive elements to provide a first channel for, in use, the movement of charge carriers between conductive elements of said first electronic device and a second channel for, in use, the movement of charge carriers between conductive elements of said second electronic device; wherein the method also includes the step (a) of using an irradiative technique to decrease in a single step the conductivity of one or more selected portions of the layer of channel material in one or more regions between the first and second conductive elements.

Abstract: A rectifying diode comprising a semiconducting layer, a first electrode, and a second electrode, wherein the width of the region of closest contact between the two electrodes is on the order of the thickness of the semiconducting layer.

Abstract: A method of selectively eliminating electrical shorts and other electrical defects from specific layers of a multilayer electronic device without damaging underlying layers. The method is based on a combination of an automated detection of the defects and selective laser ablation patterning (SLAP).

Abstract: A process for fabricating an electronic device comprising the step of patterning a metallic electrode to the electronic device by laser ablation followed by electroless plating, wherein the process of fabricating the electronic device comprises at least one other laser patterning step over the area of the metallic electrode performed after said step of patterning the metallic electrode.

Abstract: The present invention relates to methods of fabricating electronic devices using laser ablation and to devices fabricated thereby. Embodiments of the methods are particularly suitable for defining electrodes within thin film transistor (TFT) structures using laser ablation in a step-and-repeat mode.

Abstract: A method of fabricating an organic electronic device is provided. The organic electronic device has a structure including an upper conductive layer and an underlying layer immediately beneath said upper conducting layer and having at least one solution process able semiconducting layer. The upper conducting layer preferably has a thickness of between 10 nm and 200 nm.

Abstract: This invention relates to the fabrication of electronic devices, such as thin-film transistors, in particular thin-film transistors in which patterning techniques are used for definition of electrode patterns that need to be accurately aligned with respect to underlying electrodes. The fabrication technique is applicable to various patterning techniques, such as laser ablation patterning or solution-based, direct-write printing techniques which are not capable of forming structures with a small linewidth, and/or that cannot be positioned very accurately with respect to previously deposited patterns. We thus describe self-aligned gate techniques which are applicable for both gate patterning by a subtractive technique, in particular selective laser ablation patterning, and gate patterning by an additive technique such as printing. The techniques facilitate the use of low-resolution gate patterning.

Abstract: We describe a display device for displaying an electronic document page comprising a central rewritable portion, a non-rewritable border with external lateral physical dimensions defined by the display edges, wherein said border is coloured to substantially match a background colour of said central rewritable portion such that when a foreground part of said document page is displayed on said central rewritable portion the appearance of margins of said document page is provided by said background coloured border whereby in use said displayed electronic document page appears to extend up to said display edges, and wherein the surface of the display is substantially flat over the lateral physical dimensions from the central rewritable portion across the border to the display edges.

Abstract: We describe a method of displaying a document page with a predetermined size using a display device having edges defining lateral dimensions not substantially larger than said predetermined size and having a central re-writable display portion and a non-re-writable border, said document page comprising a central, foreground portion bearing one or both of text and graphics, a background having a background colour and at least one margin having said background colour, the method comprising: inputting page data defining a page for display; processing said page data to crop margins of said page such that, when displayed on said re-writable display portion, said non-re-writable border gives the appearance of said cropped margins, said processing generating cropped page data; and outputting said cropped page data for display on said re-writable display portion of said display.

Abstract: A method of fabricating an electronic device, the device including a plurality of layers on a substrate, the layers including an upper conductive layer and at least one patterned underlying layer between said conductive layer and said substrate. The method includes patterning said underlying layer, and patterning said upper conductive layer by laser ablation using a stepwise process in which successive areas of said upper conductive layer are ablated by successively applied laser patterns. The successively applied laser patterns overlap one another in an overlap region. The method further includes configuring a said laser pattern and said patterned underlying layer with respect to one another such that in a said overlap region said patterned underlying layer is substantially undamaged by said stepwise laser ablation.