Abstract: A cooling apparatus and method of fabrication are provided for facilitating removal of heat from a heat-generating electronic device. The method of fabrication includes: obtaining a solder material; disposing the solder material on a surface to be cooled; and reflowing and shaping the solder material disposed on the surface to be cooled to configure the solder material as a base with a plurality of fins extending therefrom. In addition to being in situ-configured on the surface to be cooled, the base is simultaneously metallurgically bonded to the surface to be cooled. The solder material, configured as the base with a plurality of fins extending therefrom, is a single, monolithic structure thermally attached to the surface to be cooled via the metallurgical bonding thereof to the surface to be cooled.

Abstract: A flexible unitary mask has a plurality of through holes. A substrate has a plurality of wettable pads in recessed regions defining volumes. The through holes are aligned with the wettable pads. Molten solder is directly injected through the through holes of the flexible unitary mask into the volumes with the wettable pads, such that the through holes and the volumes with the wettable pads are filled with solder. The solder is allowed to solidify, forming a plurality of solder structures adhered to the wettable pads. The flexible unitary mask is peeled from the substrate after the solder has solidified.

Abstract: The present invention relates generally to thermally-conductive pastes for use with integrated circuits, and particularly, but not by way of limitation, to self-orienting microplates of graphite.

Abstract: The present invention is a patterned metal thermal interface. In one embodiment a system for dissipating heat from a heat-generating device includes a heat sink having a first surface adapted for thermal coupling to a first surface of the heat generating device and a thermal interface having at least one patterned surface, the thermal interface being adapted to thermally couple the first surface of the heat sink to the first surface of the heat generating device. The patterned surface of the thermal interface allows the thermal interface to deform under compression between the heat sink and the heat generating device, leading to better conformity of the thermal interface to the surfaces of the heat sink and the heat generating device.

Abstract: An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting metallurgy including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

Abstract: An interposer having one or more hollow electrical contact buttons disposed in a carrier. The interposer is formed by disposing sacrificial posts in vias of the carrier. The electrical contact buttons are formed on the sacrificial posts by a metallizing process in desired pattern using a mask. The sacrificial posts are made of a material that thermally decomposes upon application of heat without altering the carrier or the electrical contact buttons.

Abstract: A cooling apparatus and method of fabrication are provided for facilitating removal of heat from a heat-generating electronic device. The method of fabrication includes: obtaining a solder material; disposing the solder material on a surface to be cooled; and reflowing and shaping the solder material disposed on the surface to be cooled to configure the solder material as a base with a plurality of fins extending therefrom. In addition to being in situ-configured on the surface to be cooled, the base is simultaneously metallurgically bonded to the surface to be cooled. The solder material, configured as the base with a plurality of fins extending therefrom, is a single, monolithic structure thermally attached to the surface to be cooled via the metallurgical bonding thereof to the surface to be cooled.

Abstract: Improved interconnects are produced by injection molded solder which fills mold arrays with molten solder so that columns that have much greater height to width aspect ratios greater than one are formed, rather than conventional flip chip bumps. The columns may have filler particles or reinforcing conductors therein. In the interconnect structures produced, the cost and time of a subsequent underfill step is reduced or avoided. The problem of incompatibility with optical interconnects between chips because underfills require high loading of silica fillers which scatter light, is solved, thus allowing flip chips to incorporate optical interconnects.

Abstract: An interposer having one or more hollow electrical contact buttons disposed in a carrier. The interposer is formed by disposing sacrificial posts in vias of the carrier. The electrical contact buttons are formed on the sacrificial posts by a metallizing process in desired pattern using a mask. The sacrificial posts are made of a material that thermally decomposes upon application of heat without altering the carrier or the electrical contact buttons.

Abstract: Methods for fabricating Land Grid Array (LGA) interposer contacts that are both conducting and elastic. Also provided are LGA interposer contacts as produced by the inventive methods. Provided is LGA type which utilizes a pure unfilled elastomer button core that is covered with an electrically-conductive material that is continuous from the top surface to the bottom surface of the button structure. In order to obviate the disadvantages and drawbacks which are presently encountered in the technology pertaining to the fabrication and structure of land grid arrays using electrically-conductive interposer contacts, there is provided both methods and structure for molding elastomer buttons into premetallized LGA carrier sheets, and wherein the non-conductive elastomer buttons are surface-metallized in order to convert them into conductive electrical contacts.

Abstract: Methods for fabricating Land Grid Array (LGA) interposer contacts that are both conducting and elastic. Also provided are LGA interposer contacts as produced by the inventive methods. Provided is LGA type which utilizes a pure unfilled elastomer button core that is covered with an electrically-conductive material that is continuous from the top surface to the bottom surface of the button structure. In order to obviate the disadvantages and drawbacks which are presently encountered in the technology pertaining to the fabrication and structure of land grid arrays using electrically-conductive interposer contacts, there is provided both methods and structure for molding elastomer buttons into premetallized LGA carrier sheets, and wherein the non-conductive elastomer buttons are surface-metallized in order to convert them into conductive electrical contacts.

Abstract: Assemblies for dissipating heat from integrated circuits and circuit chips are disclosed. The assemblies include a low melt solder as a thermal interface material (TIM) for the transfer of heat from a chip to a heat sink (HS), wherein the low melt solder has a melting point below the maximum operating temperature of the chip. Methods for making the assemblies are also disclosed.

Abstract: An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

Abstract: An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

Abstract: The present invention relates generally to thermally-conductive pastes for use with integrated circuits, and particularly, but not by way of limitation, to self-orienting microplates of graphite.

Abstract: An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

Abstract: An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting composition including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

Abstract: The present invention is a patterned metal thermal interface. In one embodiment a system for dissipating heat from a heat-generating device includes a heat sink having a first surface adapted for thermal coupling to a first surface of the heat generating device and a thermal interface having at least one patterned surface, the thermal interface being adapted to thermally couple the first surface of the heat sink to the first surface of the heat generating device. The patterned surface of the thermal interface allows the thermal interface to deform under compression between the heat sink and the heat generating device, leading to better conformity of the thermal interface to the surfaces of the heat sink and the heat generating device.

Abstract: An interconnection structure suitable for flip-chip attachment of microelectronic device chips to packages, comprising a two, three or four layer ball-limiting metallurgy including an adhesion/reaction barrier layer, and having a solder wettable layer reactive with components of a tin-containing lead free solder, so that the solderable layer can be totally consumed during soldering, but a barrier layer remains after being placed in contact with the lead free solder during soldering. One or more lead-free solder balls is selectively situated on the solder wetting layer, the lead-free solder balls comprising tin as a predominant component and one or more alloying components.

Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.