Abstract: A method and apparatus for writing to solid-state memory is provided herein. In particular, a controller is provided that monitors operating parameters of each die within the system. In order to enable fast, real-time write operations, feedback from each die is analyzed and compared with a stored set of operating parameters. Based on this comparison, a particular die is chosen for write operations such that system performance is optimized.

Abstract: An organic semiconductor product state monitor attached to a product receives a product usefulness input, which, along with the product predetermined usefulness limit, is used to determine an indicator command to indicate a state of usefulness of the product. An organic circuit is formed and placed on a product with a power supply to control the circuit operation.

Abstract: A wafer (10) having integrated circuit elements formed therein is thinned and a first carrier (41) is adhered thereto. The first carrier (41) facilitates handling of the thinned wafer (30). A second carrier (51) is then adhered as well and the various integrated circuits are singulated to yield a plurality of thinned die (81). Once the thinned die is mounted to a desired substrate (91), the first carrier (41) is readily removed. In one embodiment, the first carrier (41) has an adhesive that becomes less adherent when exposed to a predetermined stimulus (such as a given temperature range or a given frequency range of photonic energy). Such thinned die (or modules containing such die) are readily amenable to stacking in order to achieve significantly increased circuit densities.

Abstract: Organic field effect transistors (OFETs) can be created rapidly and at low cost on organic films by using a multilayer film (202) that has an electrically conducting layer (204, 206) on each side of a dielectric core. The electrically conducting layer is patterned to form gate electrodes (214), and a polymer film (223) is attached onto the gate electrode side of the multilayer dielectric film, using heat and pressure (225) or an adhesive layer (228). A source electrode and a drain electrode (236) are then fashioned on the remaining side of the multilayer dielectric film, and an organic semiconductor (247) is deposited over the source and drain electrodes, so as to fill the gap between the source and drain electrodes and touch a portion of the dielectric film to create an organic field effect transistor.

Abstract: A wafer (10) having integrated circuit elements formed therein is thinned and a first carrier (41) is adhered thereto. The first carrier (41) facilitates handling of the thinned wafer (30). A second carrier (51) is then adhered as well and the various integrated circuits are singulated to yield a plurality of thinned die (81). Once the thinned die is mounted to a desired substrate (91), the first carrier (41) is readily removed. In one embodiment, the first carrier (41) has an adhesive that becomes less adherent when exposed to a predetermined stimulus (such as a given temperature range or a given frequency range of photonic energy). Such thinned die (or modules containing such die) are readily amenable to stacking in order to achieve significantly increased circuit densities.

Abstract: An organic field effect transistor utilizes a bifunctional contact-enhancing agent at various interfaces to improve carrier mobility through the organic semiconductor layer, to improve carrier injection, and to enhance adhesion via a bifunctional mechanism. The contact-enhancing agent can be situated between the gate electrode (2) and the dielectric layer (3) to form a chemical or physical bond between the gate electrode and the dielectric layer. It can also be situated between the dielectric layer and the organic semiconducting layer (4), or between the source and drain electrodes (5, 6) and the organic semiconducting layer.

Abstract: An integrated circuit (100, 200, 300, 400) that includes a field effect transistor (102, 202, 302, 402) is fabricated by forming an organic semiconductor channel (112, 216, 308, 418) on one substrate (106, 204), forming device electrodes (114, 116, 110, 208, 210, 212) on one or more other substrates (104, 108, 206), and subsequently laminating the substrates together. In one embodiment, a dielectric patch (214) that functions as a gate dielectric is formed on one of the substrates (204, 206) prior to performing the lamination. Lamination provides a low cost route to device assembly, allows for separate fabrication of different device structures on different substrates, and thins various device layers resulting in improved performance.