Patents by Inventor Paul Bridger

Paul Bridger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070077714
    Abstract: A method of fabricating a HI-nitride power semiconductor device that includes growing a transition layer over a substrate using at least two distinct and different growth methods.
    Type: Application
    Filed: September 25, 2006
    Publication date: April 5, 2007
    Applicant: International Rectifier Corporation
    Inventors: Robert Beach, Paul Bridger, Michael Briere
  • Publication number: 20070056506
    Abstract: A method for fabricating a III-nitride semiconductor body that includes high temperature and low temperature growth steps.
    Type: Application
    Filed: September 13, 2006
    Publication date: March 15, 2007
    Inventors: Paul Bridger, Robert Beach
  • Patent number: 7166867
    Abstract: A III-nitride power device for controlling high currents as an interdigitated electrode pattern for increasing device rating while decreasing device dimensions. Fingers of the interdigitated electrode pattern have tips with smaller dimensions than the remainder of the fingers. The tapered finger design balances current flow in the electrode fingers to reduce device resistance while permitting a more compact construction.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: January 23, 2007
    Assignee: International Rectifier Corporation
    Inventors: Robert Beach, Paul Bridger
  • Publication number: 20060281279
    Abstract: III-nitride materials are used to form isolation structures in high voltage ICs to isolate low voltage and high voltage functions on a monolithic power IC. Critical performance parameters are improved using III-nitride materials, due to the improved breakdown performance and thermal performance available in III-nitride semiconductor materials. An isolation structure may include a dielectric layer that is epitaxially grown using a III-nitride material to provide a simplified manufacturing process. The process permits the use of planar manufacturing technology to avoid additional manufacturing costs. High voltage power ICs have improved performance in a smaller package in comparison to corresponding silicon structures.
    Type: Application
    Filed: August 22, 2006
    Publication date: December 14, 2006
    Inventors: Robert Beach, Paul Bridger
  • Patent number: 7135753
    Abstract: III-nitride materials are used to form isolation structures in high voltage ICs to isolate low voltage and high voltage functions on a monolithic power IC. Critical performance parameters are improved using III-nitride materials, due to the improved breakdown performance and thermal performance available in III-nitride semiconductor materials. An isolation structure may include a dielectric layer that is epitaxially grown using a III-nitride material to provide a simplified manufacturing process. The process permits the use of planar manufacturing technology to avoid additional manufacturing costs. High voltage power ICs have improved performance in a smaller package in comparison to corresponding silicon structures.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: November 14, 2006
    Assignee: International Rectifier Corporation
    Inventors: Robert Beach, Paul Bridger
  • Publication number: 20060223275
    Abstract: Isolation of III-nitride devices may be performed with a dopant selective etch that provides a smooth profile with little crystal damage in comparison to previously used isolation techniques. The dopant selective etch may be an electro-chemical or photo-electro-chemical etch. The desired isolation area may be identified by changing the conductivity type of the semiconductor material to be etched. The etch process can remove a conductive layer to isolate a device atop the conductive layer. The etch process can be self stopping, where the process automatically terminates when the selectively doped semiconductor material is removed.
    Type: Application
    Filed: May 19, 2006
    Publication date: October 5, 2006
    Inventor: Paul Bridger
  • Publication number: 20060081985
    Abstract: A III-nitride power semiconductor device that includes a current sense electrode.
    Type: Application
    Filed: September 30, 2005
    Publication date: April 20, 2006
    Inventors: Robert Beach, Paul Bridger, Daniel Kinzer
  • Publication number: 20050191821
    Abstract: A semiconductor device composed of III-nitride materials is produced with epitaxial growth that permits vertical and lateral growth geometries to improve device characteristics. The resulting device has a greater breakdown voltage due to the greater integrity of the semiconductor material structure since no ion implantation processes are used. The epitaxially grown layers also exhibit greater thermal conductivity for improved operation with power semiconductor devices. The device may include a laterally grown charge compensated area to form a superjunction device. The resulting device may be bidirectional and have improved breakdown voltage in addition to higher current capacity for a given voltage rating.
    Type: Application
    Filed: December 3, 2004
    Publication date: September 1, 2005
    Inventors: Robert Beach, Paul Bridger
  • Publication number: 20050180231
    Abstract: A semiconductor device which includes a laterally extending stack of laterally adjacent conductive semiconductor regions formed over a support surface of a substrate, and a method for fabricating the device.
    Type: Application
    Filed: February 11, 2005
    Publication date: August 18, 2005
    Inventors: Robert Beach, Paul Bridger
  • Publication number: 20050179096
    Abstract: A semiconductor device and a method for manufacturing the device are disclosed in which the semiconductor device includes ohmic contacts on different planes and the method for manufacturing the device includes etching a semiconductor stack of different conductivity semiconductor layers in successive steps to create a first opening of a first width in a first semiconductor layer to expose another semiconductor layer, and then a second opening of a narrower width in the another layer, whereby a portion of the another layer remains exposed for receiving an ohmic contact.
    Type: Application
    Filed: February 11, 2005
    Publication date: August 18, 2005
    Inventors: Robert Beach, Paul Bridger
  • Publication number: 20050145883
    Abstract: A III-nitride trench device has a vertical conduction region with an interrupted conduction channel when the device is not on, providing an enhancement mode device. The trench structure may be used in a vertical conduction or horizontal conduction device. A gate dielectric provides improved performance for the device by being capable of withstanding higher electric field or manipulating the charge in the conduction channel. A passivation of the III-nitride material decouples the dielectric from the device to permit lower dielectric constant materials to be used in high power applications.
    Type: Application
    Filed: December 3, 2004
    Publication date: July 7, 2005
    Inventors: Robert Beach, Paul Bridger
  • Publication number: 20050142810
    Abstract: Isolation of III-nitride devices may be performed with a dopant selective etch that provides a smooth profile with little crystal damage in comparison to previously used isolation techniques. The dopant selective etch may be an electro-chemical or photo-electro-chemical etch. The desired isolation area may be identified by changing the conductivity type of the semiconductor material to be etched. The etch process can remove a conductive layer to isolate a device atop the conductive layer. The etch process can be self stopping, where the process automatically terminates when the selectively doped semiconductor material is removed.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 30, 2005
    Inventor: Paul Bridger
  • Publication number: 20050139891
    Abstract: A III-nitride power device for controlling high currents as an interdigitated electrode pattern for increasing device rating while decreasing device dimensions. Fingers of the interdigitated electrode pattern have tips with smaller dimensions than the remainder of the fingers. The tapered finger design balances current flow in the electrode fingers to reduce device resistance while permitting a more compact construction.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 30, 2005
    Inventors: Robert Beach, Paul Bridger
  • Publication number: 20050121729
    Abstract: III-nitride materials are used to form isolation structures in high voltage ICs to isolate low voltage and high voltage functions on a monolithic power IC. Critical performance parameters are improved using III-nitride materials, due to the improved breakdown performance and thermal performance available in III-nitride semiconductor materials. An isolation structure may include a dielectric layer that is epitaxially grown using a III-nitride material to provide a simplified manufacturing process. The process permits the use of planar manufacturing technology to avoid additional manufacturing costs. High voltage power ICs have improved performance in a smaller package in comparison to corresponding silicon structures.
    Type: Application
    Filed: December 3, 2004
    Publication date: June 9, 2005
    Inventors: Robert Beach, Paul Bridger