Patents by Inventor Paul Cheng

Paul Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040032758
    Abstract: A content addressable memory (CAM)(10, 102) and method having a data-in sub-circuit (44), memory cells (16, 18), a match-high line (36), a match-low line (38), and pre-charge devices (40, 42). Input lines (30, 32, 48, 50) from the data-in sub-circuit (44) are not necessarily discharged to ground in every cycle of a clock signal (62) used by the memory cells (16, 18). Further, the pre-charge devices (40, 42) may be operated at one half of the rate of the clock signal (62). Yet further, the CAM (10, 102) may be selectively configured to operate in either binary or ternary mode.
    Type: Application
    Filed: August 15, 2002
    Publication date: February 19, 2004
    Applicant: Integrated Silicon Solution, Inc.
    Inventors: Paul Cheng, Nelson L. Chow
  • Publication number: 20030236955
    Abstract: A fast aging system (10) which may work with a memory (12) in which data words (16) having aging words (18) are stored. An aging address counter (20) selects an aging word (18) for updating based on a state change in a linear feedback shift register (LFSR) (24). Optionally, in the aging word (18) a zero value (52) may represent a permanent data words (16), a predefined non-zero value (56) may represent data words (16) which are available for replacement, and other zero values may represent data words (16) which are in various stages of valid lifetimes and which should not be replaced yet.
    Type: Application
    Filed: June 20, 2002
    Publication date: December 25, 2003
    Applicant: Integrated Silicon Solution, Inc.
    Inventors: Paul Cheng, Nelson L. Chow
  • Publication number: 20030037055
    Abstract: A hash-CAM (H-CAM) which may work with a controller and a memory containing a database of either search values and associate content or associate content by itself The H-CAM includes at least one set of paired hash units and CAM units and at least one logic unit. The CAM units hold values known to cause hash collisions in the respectively paired hash units, and the logic unit prioritizes the hash and CAM unit outputs to a single address value usable to access the memory and obtain a search result at the controller that is not the result of a hash collision. The H-CAM may optionally include a search data storage to store the search values, so that they need not be stored in the memory, and a comparator to determine and handle newly determined hash collisions.
    Type: Application
    Filed: August 9, 2001
    Publication date: February 20, 2003
    Inventors: Paul Cheng, Nelson L. Chow, Fangli Chien
  • Publication number: 20030033293
    Abstract: A search engine (100) having a controller (112), a memory (114), and a hash pointer unit (110). The memory (114) includes a database of search data and associate content, and the controller (112) uses individual search values to access the memory (114) to obtain individual search results. The controller (112) includes a hash function (116) that generates a hash value from a, typically large, search value into a, typically smaller, hash value that may be a hash collision. The controller (112) converts the hash value into a hash address which is communicated to the hash pointer unit (110), which receives the hash address and provides a hash pointer that is communicated to and used by the memory to look up respective search results. In this manner hash collisions are avoided and the size of the memory (114) is not a function of the degree of multi-way set-associativity used.
    Type: Application
    Filed: September 30, 2002
    Publication date: February 13, 2003
    Applicant: Integrated Silicon Solution, Inc.
    Inventors: Paul Cheng, Nelson L. Chow, Fangli Chien
  • Publication number: 20030033276
    Abstract: A search engine having a controller, a memory, and at least one hash-CAM (H-CAM). The memory includes a database of search values and associate content or just associate content. The controller uses search values to access the memory to obtain the search results. The H-CAM includes at least one set of paired hash units and CAM units and at least one logic unit. The CAM units hold values known to cause hash collisions in the paired hash units, and the logic unit prioritizes the hash and CAM unit outputs to address values usable to access the memory and obtain a search result at the controller that is not the result of a hash collision. The H-CAM may optionally include a search data storage to store the search values, so that they need not be stored in the memory, and a comparator to determine and handle new search data based hash collisions. The H-CAM may optionally also be cascaded.
    Type: Application
    Filed: September 30, 2002
    Publication date: February 13, 2003
    Applicant: Integrated Silicon Solution, Inc.
    Inventors: Paul Cheng, Nelson L. Chow, Fangli Chien
  • Publication number: 20020107944
    Abstract: The techniques described employ a cooperative organization of network service providers to provide improved distributed network services. The network service providers that are constituent to the cooperative organization represent various perspectives within the overall Internet content distribution network, and may include network owners, telecommunications carriers, network access providers, hosting providers and distribution network owners, the latter being an entity that caches content at a plurality of locations distributed on the network. Aspects include managing content caches by receiving control signals specifying actions related to cached content that is distributed on a network, such as the Internet, and forwarding the control signals through to the caching locations to implement the actions represented by the control signals, thus providing content publishers the capability of refreshing their content regardless of where it is cached.
    Type: Application
    Filed: October 30, 2001
    Publication date: August 8, 2002
    Inventors: Joseph J. Bai, Robert Carney, Paul Cheng, Jonathan C. Crane
  • Publication number: 20020047931
    Abstract: A single chip system including a first input channel for receiving digital video input data, a second channel for receiving computer graphics data, means for synchronizing the two channels to one another utilizing timing signals which may be selected to provide the most accurate timing available, means for changing the rate of presentation of the computer graphics signals to match the rate of presentation of the video signals, means for adjusting the format in which the computer graphics signals are presented to the same format as the format in which the video signals are presented, and means for selectively blending the computer graphics and video signals furnished as video input data without modification for presentation on a single output display.
    Type: Application
    Filed: March 26, 1999
    Publication date: April 25, 2002
    Inventors: JHI-CHUNG KUO, JOHN FRANCIS MCNALLY, JEFF JANG-FANG SUEN, HENRY CHOY, PAUL CHENG, LIN LIANG
  • Patent number: 5957083
    Abstract: A poultry feeder which includes a feeding tube secured to a delivery pipe of a feed delivery system by a retainer cap, a feed carrier holder suspended from the feeding tube, a feed carrier plate vertically adjustably coupled to the feed carrier holder by a coupling ring to receive feed from the feeding tube, an adjustment socket mounted around the feeding tube and vertically adjustably secured to the holder to control output flow rate of feed from the feeding tube.
    Type: Grant
    Filed: January 15, 1998
    Date of Patent: September 28, 1999
    Assignee: Almin Enterprise Co., Ltd.
    Inventor: Paul Cheng
  • Patent number: 5862343
    Abstract: A network-to-CPU interface circuit interfaces an isochronous physical layer to an ISA bus such that a host CPU connected to the ISA bus can communicate with the isochronous physical layer. Inbound B-channel interface circuity is connectable to receive, from the isochronous physical layer, an inbound data stream which includes a plurality of B-channels time division multiplexed into time division multiplexed (TDM) frames. The TDM frames have a predetermined format that defines at least one logical stream such that each logical stream comprises those B-channels that are time division multiplexed into corresponding predetermined locations within the TDM frames. An inbound buffer portion of a memory is provided to hold the received inbound data stream, and an outbound buffer portion of the memory is provided for holding an outbound data stream which, like the inbound data stream, includes a plurality of B-channels time division multiplexed into time division multiplexed (TDM) frames.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: January 19, 1999
    Assignee: National Semiconductor Corporation
    Inventors: Mark Landguth, Paul Cheng
  • Patent number: 5590869
    Abstract: An adjustable buffer device is disposed between one end of the rear stay and the central portion of a cross bar. The adjustable buffer device has a hollow main body, a seal ring, a shaft cover, a shaft, a spring, and an adjustable valve. A cover seat is disposed on the upper portion of the main body. A valve seat is disposed beneath the cover seat. The adjustable valve which is inserted in the inner chamber of the valve seat controls the amount of oil in the passage between the oil hole and the communicating hole.
    Type: Grant
    Filed: December 19, 1995
    Date of Patent: January 7, 1997
    Assignee: Taiwan Hodaka Industrial Co., Ltd.
    Inventor: Paul Cheng
  • Patent number: 5582395
    Abstract: A buffer assembly for front forks has an oil-cylinder type buffer device disposed in one stay and a spring type buffer device disposed in the other stay. The oil-cylinder type buffer device has an adjustable screw, an adjusting rod, an adjusting device, an oil cylinder, elastic members, padding members, a shaft, a hollow seat, a spring, and a lower stay. The spring type buffer device has an adjustable bolt, an upper stay, an upper rod, an upper seat, soft pads, hard pads, a lower seat and a lower rod.
    Type: Grant
    Filed: December 19, 1995
    Date of Patent: December 10, 1996
    Assignee: Taiwan Hodaka Industrial Co., Ltd.
    Inventor: Paul Cheng
  • Patent number: 5580034
    Abstract: A shock absorbing oil cylinder has a main body, a seal ring, a shaft cover, and a shaft. The main body has a circular recess thereon and a cover seat on its top. An adjustable seat ring is passed through the main body beneath the cover seat. A seal ring is in the cover seat. The outer rim of the seal ring is covered by a glued rubber. An oil inlet is in the center of the seal ring. A soft pad is in the seal ring. A leak prevention ring is on the oil inlet. A bolt is inserted into the soft pad. A shaft cover covers the cover seat. A shaft is in the main body and is inserted in a piston. The damper rings are disposed on the piston and beneath the piston. A shaft ring is inserted in the valve seat. A retaining ring is inserted in the circular recess. The cushion ring is beneath the main body. A spring is located between the adjustable seat ring and the shaft seat ring.
    Type: Grant
    Filed: August 1, 1995
    Date of Patent: December 3, 1996
    Assignee: Taiwan Hodaka Industrial Co., Ltd.
    Inventor: Paul Cheng