Patents by Inventor Paul E. McKenney

Paul E. McKenney has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160335183
    Abstract: A grace period detection technique for a preemptible read-copy update (RCU) implementation that uses a combining tree for quiescent state tracking. When a leaf level bitmask indicating online/offline CPUs is fully cleared due to all of its assigned CPUs going offline as a result of hotplugging operations, the bitmask state is not immediately propagated to the root level of the combining tree as in prior art RCU implementations. Instead, propagation is deferred until all tasks are removed from an associated leaf level task list tracking tasks that were preempted inside an RCU read-side critical section. Deferring bitmask propagation obviates the need to migrate the task list to the combining tree root level in order to prevent premature grace period termination. The task list can remain at the leaf level. In this way, CPU hotplugging is accommodated while avoiding excessive degradation of real-time latency stemming from the now-eliminated task list migration.
    Type: Application
    Filed: May 11, 2015
    Publication date: November 17, 2016
    Inventor: Paul E. McKenney
  • Publication number: 20160335133
    Abstract: A TASKS_RCU grace period is detected whose quiescent states comprise a task undergoing a voluntary context switch, a task running in user mode, and a task running in idle-mode. A list of all runnable tasks is built. The runnable task list is scanned in one or more scan passes. Each scan pass through the runnable task list searches to identify tasks that have passed through a quiescent state by either performing a voluntary context switch, running in user mode, or running in idle-mode. If found, such quiescent state tasks are removed from the runnable task list. Searching performed during a scan pass includes identifying quiescent state tickless user mode tasks that have been running continuously in user mode on tickless CPUs that have not received a scheduling clock interrupt since commencement of the TASKS_RCU grace period. If the runnable task list is empty, the TASKS_RCU grace period is ended.
    Type: Application
    Filed: August 21, 2015
    Publication date: November 17, 2016
    Inventor: Paul E. McKenney
  • Publication number: 20160335137
    Abstract: A grace period detection technique for a preemptible read-copy update (RCU) implementation that uses a combining tree for quiescent state tracking. When a leaf level bitmask indicating online/offline CPUs is fully cleared due to all of its assigned CPUs going offline as a result of hotplugging operations, the bitmask state is not immediately propagated to the root level of the combining tree as in prior art RCU implementations. Instead, propagation is deferred until all tasks are removed from an associated leaf level task list tracking tasks that were preempted inside an RCU read-side critical section. Deferring bitmask propagation obviates the need to migrate the task list to the combining tree root level in order to prevent premature grace period termination. The task list can remain at the leaf level. In this way, CPU hotplugging is accommodated while avoiding excessive degradation of real-time latency stemming from the now-eliminated task list migration.
    Type: Application
    Filed: August 21, 2015
    Publication date: November 17, 2016
    Inventor: Paul E. McKenney
  • Patent number: 9459963
    Abstract: A technique for safely rolling back transactional memory transactions without impacting concurrent readers of the uncommitted transaction data. An updater uses a transactional memory technique to perform an data update on data that is shared with a reader. The update is implemented as a transaction in which the updated data is initially uncommitted due to the transaction being subject to roll back. The reader is allowed to perform a data read on the uncommitted data during the transaction. Upon a rollback of the transaction, reclamation of memory locations used by the uncommitted data is deferred until a grace period has elapsed after which the reader can no longer be referencing the uncommitted data.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: October 4, 2016
    Assignee: International Business Machines Corporation
    Inventors: Paul E. McKenney, Joshua A. Triplett
  • Publication number: 20160224583
    Abstract: A data element of a linked data structure is atomically moved without delaying lockless readers. A status-indicating entity is allocated, associated with the data element, and indicates validity of the data element with respect to the first linked data structure. A copy element, or a pointer thereto, is created from the data element. The status-indicating entity is associated with the copy element and indicates no validity of the copy element with respect to a second linked data structure. The copy element is linked to the second linked data structure. The status-indicating entity is atomically updated to indicate no validity of the data element with respect to the first linked data structure and validity of the copy element with respect to the second linked data structure. The data element is deleted and the status-indicating entity is disassociated from the copy element. Both structures may be deallocated in a deferred reader-friendly manner.
    Type: Application
    Filed: August 20, 2015
    Publication date: August 4, 2016
    Inventor: Paul E. McKenney
  • Publication number: 20160224608
    Abstract: A data element of a linked data structure is atomically moved without delaying lockless readers. A status-indicating entity is allocated, associated with the data element, and indicates validity of the data element with respect to the first linked data structure. A copy element, or a pointer thereto, is created from the data element. The status-indicating entity is associated with the copy element and indicates no validity of the copy element with respect to a second linked data structure. The copy element is linked to the second linked data structure. The status-indicating entity is atomically updated to indicate no validity of the data element with respect to the first linked data structure and validity of the copy element with respect to the second linked data structure. The data element is deleted and the status-indicating entity is disassociated from the copy element. Both structures may be deallocated in a deferred reader-friendly manner.
    Type: Application
    Filed: January 29, 2015
    Publication date: August 4, 2016
    Inventor: Paul E. McKenney
  • Patent number: 9400818
    Abstract: A tree-based trylock technique for reducing contention on a root trylock includes attempting to acquire a trylock at each node of a tree-based hierarchical node structure while following a traversal path that begins at a leaf node, passes through one or more of internal nodes, and ends at a root node having the root trylock. The trylock acquisition operation succeeds if each trylock on the traversal path is acquired, and fails if any trylock on the traversal path cannot be acquired. A trylock housekeeping operation releases all non-root trylocks visited by the trylock acquisition operation, such that if the trylock acquisition operation succeeds, only the root trylock will be remain acquired at the end of the operation, and if the trylock acquisition operation fails, none of the trylocks will be remain acquired at the end of the operation.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: July 26, 2016
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9396226
    Abstract: A tree-based trylock technique for reducing contention on a root trylock includes attempting to acquire a trylock at each node of a tree-based hierarchical node structure while following a traversal path that begins at a leaf node, passes through one or more of internal nodes, and ends at a root node having the root trylock. The trylock acquisition operation succeeds if each trylock on the traversal path is acquired, and fails if any trylock on the traversal path cannot be acquired. A trylock housekeeping operation releases all non-root trylocks visited by the trylock acquisition operation, such that if the trylock acquisition operation succeeds, only the root trylock will be remain acquired at the end of the operation, and if the trylock acquisition operation fails, none of the trylocks will be remain acquired at the end of the operation.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: July 19, 2016
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9389925
    Abstract: A technique for achieving low grace-period latencies in an energy efficient environment in which processors with Read-Copy Update (RCU) callbacks are allowed to enter low power states. In an example embodiment, for each processor that has RCU callbacks, different grace period numbers are assigned to different groups of the processor's RCU callbacks. New grace periods are periodically started and old grace periods are periodically ended. As old grace periods end, groups of RCU callbacks having corresponding assigned grace period numbers are invoked.
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: July 12, 2016
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9348765
    Abstract: A technique for supporting user mode specification of Read-Copy Update (RCU) grace period latency to an operating system kernel-level RCU implementation. Non-expedited and expedited RCU grace period mechanisms are provided for invocation by RCU updaters performing RCU update operations to respectively initiate non-expedited and expedited grace periods. An expedited grace period indicator in a kernel memory space is provided for indicating whether a non-expedited RCU grace period or an expedited RCU grace period should be invoked. The non-expedited RCU grace period mechanism is adapted to check the expedited grace period indicator, and if an expedited RCU grace period is indicated, to invoke the expedited grace period mechanism. A communication mechanism is provided for use by a user mode application executing in a user memory space to manipulate the expedited grace period indicator in the kernel memory space, and thereby control whether an expedited or non-expedited RCU grace period should be used.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 24, 2016
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Publication number: 20160085549
    Abstract: A technique for suspending transactional memory transactions without stack corruption. A first function that begins a transactional memory transaction is allocated a stack frame on a default program stack, then returns. Prior to suspending the transaction, or after suspending the transaction but prior to allocating any suspended mode stack frames, either of the following operations is performed: (1) switch from the default program stack to an alternative program stack, or (2) switch from a default region of the default program stack where the first function's stack frame was allocated to an alternative region of the default program stack. Prior to resuming the transaction, or after resuming the transaction but prior to allocating any transaction mode stack frames, either of the following operations is performed: (1) switch from the alternative program stack to the default program stack, or (2) switch from the alternative stack region to the default stack region.
    Type: Application
    Filed: October 11, 2014
    Publication date: March 24, 2016
    Inventor: Paul E. McKenney
  • Publication number: 20160085548
    Abstract: A technique for suspending transactional memory transactions without stack corruption. A first function that begins a transactional memory transaction is allocated a stack frame on a default program stack, then returns. Prior to suspending the transaction, or after suspending the transaction but prior to allocating any suspended mode stack frames, either of the following operations is performed: (1) switch from the default program stack to an alternative program stack, or (2) switch from a default region of the default program stack where the first function's stack frame was allocated to an alternative region of the default program stack. Prior to resuming the transaction, or after resuming the transaction but prior to allocating any transaction mode stack frames, either of the following operations is performed: (1) switch from the alternative program stack to the default program stack, or (2) switch from the alternative stack region to the default stack region.
    Type: Application
    Filed: September 22, 2014
    Publication date: March 24, 2016
    Inventor: Paul E. McKenney
  • Patent number: 9262234
    Abstract: A technique for expediting the unloading of an operating system kernel module that executes read-copy update (RCU) callback processing code in a computing system having one or more processors. According to embodiments of the disclosed technique, an RCU callback is enqueued so that it can be processed by the kernel module's callback processing code following completion of a grace period in which each of the one or more processors has passed through a quiescent state. An expediting operation is performed to expedite processing of the RCU callback. The RCU callback is then processed and the kernel module is unloaded.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: February 16, 2016
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9256476
    Abstract: A technique for expediting the unloading of an operating system kernel module that executes read-copy update (RCU) callback processing code in a computing system having one or more processors. According to embodiments of the disclosed technique, an RCU callback is enqueued so that it can be processed by the kernel module's callback processing code following completion of a grace period in which each of the one or more processors has passed through a quiescent state. An expediting operation is performed to expedite processing of the RCU callback. The RCU callback is then processed and the kernel module is unloaded.
    Type: Grant
    Filed: December 10, 2011
    Date of Patent: February 9, 2016
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9250979
    Abstract: A technique for implementing user-level read-copy update (RCU) with support for asynchronous grace periods. In an example embodiment, a user-level RCU subsystem is established that executes within threads of a user-level multithreaded application. The multithreaded application may comprise one or more reader threads that read RCU-protected data elements in a shared memory. The multithreaded application may further comprise one or more updater threads that perform updates to the RCU-protected data elements in the shared memory and register callbacks to be executed following a grace period in order to free stale data resulting from the updates. The RCU subsystem may implement two or more helper threads (helpers) that are created or selected as needed to track grace periods and execute the callbacks on behalf of the updaters instead of the updaters performing such work themselves.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: February 2, 2016
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9251074
    Abstract: A technique for enabling hardware transactional memory (HTM) to work more efficiently with readers that can tolerate stale data. In an embodiment, a pre-transaction load request is received from one of the readers, the pre-transaction load request signifying that the reader can tolerate pre-transaction data. A determination is made whether the pre-transaction load request comprises data that has been designated for update by a concurrent HTM transaction. If so, a cache line containing the data is marked as pre-transaction data. The concurrent HTM transaction proceeds without aborting notwithstanding the pre-transaction load request.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: February 2, 2016
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9250978
    Abstract: A technique for implementing user-level read-copy update (RCU) with support for asynchronous grace periods. In an example embodiment, a user-level RCU subsystem is established that executes within threads of a user-level multithreaded application. The multithreaded application may comprise one or more reader threads that read RCU-protected data elements in a shared memory. The multithreaded application may further comprise one or more updater threads that perform updates to the RCU-protected data elements in the shared memory and register callbacks to be executed following a grace period in order to free stale data resulting from the updates. The RCU subsystem may implement two or more helper threads (helpers) that are created or selected as needed to track grace periods and execute the callbacks on behalf of the updaters instead of the updaters performing such work themselves.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: February 2, 2016
    Inventor: Paul E. McKenney
  • Patent number: 9244844
    Abstract: A technique for enabling hardware transactional memory (HTM) to work more efficiently with readers that can tolerate stale data. In an embodiment, a pre-transaction load request is received from one of the readers, the pre-transaction load request signifying that the reader can tolerate pre-transaction data. A determination is made whether the pre-transaction load request comprises data that has been designated for update by a concurrent HTM transaction. If so, a cache line containing the data is marked as pre-transaction data. The concurrent HTM transaction proceeds without aborting notwithstanding the pre-transaction load request.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: January 26, 2016
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9218305
    Abstract: Data writers desiring to update data without unduly impacting concurrent readers perform a synchronization operation with respect to plural processors or execution threads. The synchronization operation is parallelized using a hierarchical tree having a root node, one or more levels of internal nodes and as many leaf nodes as there are processors or threads. The tree is traversed from the root node to a lowest level of the internal nodes and the following node processing is performed for each node: (1) check the node's children, (2) if the children are leaf nodes, perform the synchronization operation relative to each leaf node's associated processor or thread, and (3) if the children are internal nodes, fan out and repeat the node processing with each internal node representing a new root node. The foregoing node processing is continued until all processors or threads associated with the leaf nodes have performed the synchronization operation.
    Type: Grant
    Filed: November 30, 2011
    Date of Patent: December 22, 2015
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney
  • Patent number: 9218307
    Abstract: Data writers desiring to update data without unduly impacting concurrent readers perform a synchronization operation with respect to plural processors or execution threads. The synchronization operation is parallelized using a hierarchical tree having a root node, one or more levels of internal nodes and as many leaf nodes as there are processors or threads. The tree is traversed from the root node to a lowest level of the internal nodes and the following node processing is performed for each node: (1) check the node's children, (2) if the children are leaf nodes, perform the synchronization operation relative to each leaf node's associated processor or thread, and (3) if the children are internal nodes, fan out and repeat the node processing with each internal node representing a new root node. The foregoing node processing is continued until all processors or threads associated with the leaf nodes have performed the synchronization operation.
    Type: Grant
    Filed: November 30, 2013
    Date of Patent: December 22, 2015
    Assignee: International Business Machines Corporation
    Inventor: Paul E. McKenney