Patents by Inventor Paul Gee

Paul Gee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7825038
    Abstract: Methods of depositing a silicon oxide layer on a substrate are described. The methods may include the steps of providing a substrate to a deposition chamber, generating an atomic oxygen precursor outside the deposition chamber, and introducing the atomic oxygen precursor into the chamber. The methods may also include introducing a silicon precursor to the deposition chamber, where the silicon precursor and the atomic oxygen precursor are first mixed in the chamber. The silicon precursor and the atomic oxygen precursor react to form the silicon oxide layer on the substrate, and the deposited silicon oxide layer may be annealed. Systems to deposit a silicon oxide layer on a substrate are also described.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: November 2, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Nitin K. Ingle, Zheng Yuan, Paul Gee, Kedar Sapre
  • Publication number: 20090031953
    Abstract: Methods of depositing a silicon oxide layer on a substrate are described. The methods may include the steps of providing a substrate to a deposition chamber, generating an atomic oxygen precursor outside the deposition chamber, and introducing the atomic oxygen precursor into the chamber. The methods may also include introducing a silicon precursor to the deposition chamber, where the silicon precursor and the atomic oxygen precursor are first mixed in the chamber. The silicon precursor and the atomic oxygen precursor react to form the silicon oxide layer on the substrate, and the deposited silicon oxide layer may be annealed. Systems to deposit a silicon oxide layer on a substrate are also described.
    Type: Application
    Filed: October 10, 2008
    Publication date: February 5, 2009
    Applicant: Applied Materials, Inc.
    Inventors: Nitin K. Ingle, Zheng Yuan, Paul Gee, Kedar Sapre
  • Publication number: 20070281496
    Abstract: Methods of depositing a silicon oxide layer on a substrate are described. The methods may include the steps of providing a substrate to a deposition chamber, generating an atomic oxygen precursor outside the deposition chamber, and introducing the atomic oxygen precursor into the chamber. The methods may also include introducing a silicon precursor to the deposition chamber, where the silicon precursor and the atomic oxygen precursor are first mixed in the chamber. The silicon precursor and the atomic oxygen precursor react to form the silicon oxide layer on the substrate, and the deposited silicon oxide layer may be annealed. Systems to deposit a silicon oxide layer on a substrate are also described.
    Type: Application
    Filed: May 29, 2007
    Publication date: December 6, 2007
    Applicant: Applied Materials, Inc.
    Inventors: Nitin Ingle, Zheng Yuan, Paul Gee, Kedar Sapre
  • Publication number: 20060009479
    Abstract: There is described a method for converting oripavine to hydromorphone or a physiologically acceptable salt thereof such as hydromorphone hydrochloride involving generation of 8,14-dihydrooripavine utilising diimine.
    Type: Application
    Filed: July 11, 2005
    Publication date: January 12, 2006
    Inventors: Timothy Bailey, Paul Gee, Robert Rezaie
  • Patent number: 6599574
    Abstract: The present invention relates to the deposition of dielectric layers, and more specifically to a method and apparatus for forming dielectric layers such as borophosphosilicate glass (BPSG) having improved film uniformity, higher deposition rate, superior gap fill/reflow capability, and smoother surface morphology. The method forms a dielectric layer with a process using helium carrier gas that produces substantially less downstream residue than conventional methods and apparatus, thereby reducing the need for chamber cleaning and increasing throughput of processed wafers. The present invention utilizes helium instead of nitrogen as carrier gas in a process for forming a dielectric layer such as BPSG to provide various unexpected benefits. According to one aspect, the present invention forms a dielectric film on a substrate, and prolongs a period between chamber cleanings in a system by using helium which produces substantially less downstream and upstream residue than a process using nitrogen.
    Type: Grant
    Filed: April 4, 1996
    Date of Patent: July 29, 2003
    Assignee: Applied Materials Inc.
    Inventors: Ellie Yieh, Paul Gee, Li-Qun Xia, Francimar Campana, Shankar Venkataranan, Dana Tribula, Bang Nguyen
  • Patent number: 6153540
    Abstract: A method and apparatus for controlling the wet-etch rate and thickness uniformity of a dielectric layer, such as a phosphosilicate glass layer (PSG) layer. The method is based upon the discovery that the atmospheric pressure at which a PSG layer is deposited affects the wet-etch rate of the same, during a subsequent processing step, as well as the layer's thickness uniformity. As a result, the method of the present invention includes the step of pressurizing the atmospheric pressure of a semiconductor process chamber within a predetermined range after the substrate is deposited therein. Flowed into the deposition zone is a process gas comprising a silicon source, all oxygen source, and a phosphorous source; and maintaining the deposition zone at process conditions suitable for depositing a phosphosilicate glass layer on the substrate.
    Type: Grant
    Filed: March 4, 1998
    Date of Patent: November 28, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Ishing Lou, Cary Ching, Peter W. Lee, Rong Pan, Paul Gee, Francimar Campana
  • Patent number: 6099647
    Abstract: The present invention provides systems, methods and apparatus for high temperature (at least about 500-800.degree. C.) processing of semiconductor wafers. The systems, methods and apparatus of the present invention allow multiple process steps to be performed in situ in the same chamber to reduce total processing time and to ensure high quality processing for high aspect ratio devices. Performing multiple process steps in the same chamber also increases the control of the process parameters and reduces device damage. In particular, the present invention can provide high temperature deposition, heating and efficient cleaning for forming dielectric films having thickness uniformity, good gap fill capability, high density, low moisture, and other desired characteristics.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: August 8, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Ellie Yieh, Li-Qun Xia, Paul Gee, Bang Nguyen
  • Patent number: 5994209
    Abstract: The present invention provides systems, methods and apparatus for high temperature (at least about 500-800.degree. C.) processing of semiconductor wafers. The systems, methods and apparatus of the present invention allow multiple process steps to be performed in situ in the same chamber to reduce total processing time and to ensure high quality processing for high aspect ratio devices. Performing multiple process steps in the same chamber also increases the control of the process parameters and reduces device damage. In particular, the present invention can provide high temperature deposition, heating and efficient cleaning for forming dielectric films having thickness uniformity, good gap fill capability, high density, low moisture, and other desired characteristics.
    Type: Grant
    Filed: November 13, 1996
    Date of Patent: November 30, 1999
    Assignee: Applied Materials, Inc.
    Inventors: Ellie Yieh, Li-Qun Xia, Paul Gee, Bang Nguyen