Patents by Inventor Paul H. Townsend

Paul H. Townsend has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9788446
    Abstract: Mobile vibration isolation devices and methods for reducing vibration transfer to electrical or electronic devices are provided. One such mobile vibration isolation device includes an array of two or more vibration isolation elements, and one or more flexible elements. The array of vibration isolation elements is connected by said one or more flexible elements. Preferably, the vibration isolation elements have at least a portion thereof of a cross linked polymer foam. More preferably, the vibration isolation elements have at least a portion thereof of SORBOTHANE®. A method for reducing vibration transfer to electrical or electronic devices includes the steps of providing a mobile vibration isolation device, and interposing the mobile vibration isolation device between the electrical or electronic device and a vibrating surface, thereby reducing vibration transfer to the electrical or electronic device.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: October 10, 2017
    Inventor: Paul H. Townsend
  • Patent number: 7898179
    Abstract: A lamp (100) comprises an outer envelope (120) having first and second electrical lead-ins (140, 160) sealed into a base (180) of the envelope (120). A ceramic arc tube (200) is operatively mounted within the envelope (120), the arc tube (200) having at least one electrode (220) therein. A tubular, niobium feed-through (240) is connected to the at least one electrode (220) and sealed to the ceramic body (120) at a joint (260) that can comprise a glass frit (260a). A stainless steel rod (280) is electrically connected between the electrical lead-in (140) and the tubular niobium feed-through (240), the stainless steel rod (280) being the only electrical connection between the lead-in (140) and the niobium feed-through (240).
    Type: Grant
    Filed: April 16, 2008
    Date of Patent: March 1, 2011
    Assignee: OSRAM SYLVANIA Inc.
    Inventors: Matthew A. Bourgery, Paul H. Townsend, Chung-Yao Chao
  • Publication number: 20090261729
    Abstract: A lamp (100) comprises an outer envelope (120) having first and second electrical lead-ins (140, 160) sealed into a base (180) of the envelope (120). A ceramic arc tube (200) is operatively mounted within the envelope (120), the arc tube (200) having at least one electrode (220) therein. A tubular, niobium feed-through (240) is connected to the at least one electrode (220) and sealed to the ceramic body (120) at a joint (260) that can comprise a glass frit (260a). A stainless steel rod (280) is electrically connected between the electrical lead-in (140) and the tubular niobium feed-through (240), the stainless steel rod (280) being the only electrical connection between the lead-in (140) and the niobium feed-through (240).
    Type: Application
    Filed: April 16, 2008
    Publication date: October 22, 2009
    Inventors: Matthew A. Bourgery, Paul H. Townsend, Chung-Yao Chao
  • Patent number: 7268200
    Abstract: This invention is directed to a method of making a composition in which a silane having an unsaturated group and a silane having an aromatic group are hydrolyzed. In this method the more highly reactive silane is continuously added during the hydrolysis reaction of the less reactive silane. The composition can be used in the fabrication of microelectronic devices, particularly as hardmasks or etchstops.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: September 11, 2007
    Assignee: Dow Global Technologies Inc.
    Inventors: Paul H. Townsend, III, Lynne K. Mills, Sheila Gombar-Fetner
  • Patent number: 7115531
    Abstract: This invention is a method comprising providing a substrate, forming a first layer on the substrate, wherein the first layer has a dielectric constant of less than 3.0 and comprises an organic polymer, applying an organosilicate resin over the first layer, removing a portion of the organosilicate resin to expose a portion of the first layer, and removing the exposed portions of the first layer. The invention is also an integrated circuit article comprising an active substrate containing transistors and an electrical interconnect structure containing a pattern of metal lines separated, at least partially, by layers or regions of an organic polymeric material having a dielectric constant of less than 3.0 and further comprising a layer of an organosilicate resin above at least one layer of the organic polymer material.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: October 3, 2006
    Assignee: Dow Global Technologies Inc.
    Inventors: Edward O. Shaffer, II, Kevin E. Howard, Joost J. M. Waeterloos, Jack E. Hetzner, Paul H. Townsend, III, Lynne K. Mills, Sheila Gombar-Fetner, Larry R. Wilson
  • Patent number: 7109249
    Abstract: A suitable cross-linkable matrix precursor and a poragen can be treated to form a porous cross-linked matrix having a Tg of greater than 300° C. The porous matrix material has a lower dielectric constant than the corresponding non-porous matrix material, making the porous matrix material particularly attractive for a variety of electronic applications including integrated circuits, multichip modules, and flat panel display devices.
    Type: Grant
    Filed: July 16, 2004
    Date of Patent: September 19, 2006
    Assignee: Dow Global Technologies Inc.
    Inventors: Kenneth J. Bruza, James P. Godschalx, Edward O. Shaffer, II, Dennis W. Smith, Jr., Paul H. Townsend, III, Kevin J. Bouck, Qing Shan J. Niu
  • Patent number: 6946382
    Abstract: A method of forming at least a partial air gap within a semiconducting device and the resulting devices, said method comprising the steps of: (a) depositing a sacrificial polymeric composition in one or more layers of the device during its formation; (b) coating the device with one or more layers of a relatively non-porous, organic, polymeric, insulating dielectric material (hardmask) having a density less than 2.2 g/cm3; and (c) decomposing the sacrificial polymeric composition such that the decomposition products permeate at least partially through the one or more hardmask layers, thereby forming at least a partial air gap within the device.
    Type: Grant
    Filed: April 1, 2003
    Date of Patent: September 20, 2005
    Assignee: Dow Global Technologies Inc.
    Inventors: Paul H. Townsend, III, Kenneth L. Foster
  • Patent number: 6887910
    Abstract: A suitable cross-linkable matrix precursor and a poragen can be treated to form a porous cross-linked matrix having a Tg of greater than 300° C. The porous matrix material has a lower dielectric constant than the corresponding non-porous matrix material, making the porous matrix material particularly attractive for a variety of electronic applications including integrated circuits, multichip modules, and flat panel display devices.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: May 3, 2005
    Assignee: Dow Global Technologies Inc.
    Inventors: Kenneth J. Bruza, James P. Godschalx, Edward O. Shaffer, II, Dennis W. Smith, Jr., Paul H. Townsend, III, Kevin J. Bouck, Qing Shan J. Niu
  • Patent number: 6815333
    Abstract: This invention relates to a method of dual damascene integration for manufacture of integrating circuits using three top hard mask layers having alternating etch selectivity characteristics.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: November 9, 2004
    Assignee: Dow Global Technologies Inc.
    Inventors: Paul H. Townsend, III, Lynne K. Mills, Joost J. M. Waeterloos, Richard J. Strittmatter
  • Patent number: 6790792
    Abstract: A cured polyphenylene polymer having a glass transition temperature no greater than 465° C. An integrated circuit article having a fracture toughness as determined by the modified edge liftoff test of at least 0.3 MPa-m1/2.
    Type: Grant
    Filed: April 29, 2002
    Date of Patent: September 14, 2004
    Assignee: Dow Global Technologies Inc.
    Inventors: Edward O. Shaffer, II, Kevin E. Howard, James P. Godschalx, Paul H. Townsend, III
  • Publication number: 20030219973
    Abstract: This invention relates to a method of dual damascene integration for manufacture of integrating circuits using three top hard mask layers having alternating etch selectivity characteristics.
    Type: Application
    Filed: March 28, 2003
    Publication date: November 27, 2003
    Inventors: Paul H. Townsend, Lynne K. Mills, Joost J. M. Waeterloos, Richard J. Strittmatter
  • Patent number: 6653358
    Abstract: A suitable cross-linkable matrix precursor and a poragen can be treated to form a porous cross-linked matrix having a Tg of greater than 300° C. The porous matrix material has a lower dielectric constant than the corresponding non-porous matrix material, making the porous matrix material particularly attractive for a variety of electronic applications including integrated circuits, multichip modules, and flat panel display devices.
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: November 25, 2003
    Assignee: Dow Global Technologies Inc.
    Inventors: Kenneth J. Bruza, James P. Godschalx, Edward O. Shaffer, II, Dennis W. Smith, Jr., Paul H. Townsend, III, Kevin J. Bouck, Qing Shan J. Niu
  • Patent number: 6646081
    Abstract: This invention is a polyarylene composition in which resin does not undergo a significant drop in modulus at temperatures above 300° C. during cure. This feature enables one to form porous films by avoiding pore collapse and/or using a wider variety of poragen materials.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: November 11, 2003
    Assignee: Dow Global Technologies Inc.
    Inventors: James P. Godschalx, Qing Shan J. Niu, Kenneth J. Bruza, Clark H. Cummins, Paul H. Townsend, III
  • Patent number: 6630520
    Abstract: A suitable cross-linkable matrix precursor and a poragen can be treated to form a porous cross-linked matrix having a Tg of greater than 300° C. The porous matrix material has a lower dielectric constant than the corresponding non-porous matrix material, making the porous matrix material particularly attractive for a variety of electronic applications including integrated circuits, multichip modules, and flat panel display devices.
    Type: Grant
    Filed: November 22, 1999
    Date of Patent: October 7, 2003
    Assignee: Dow Global Technologies Inc.
    Inventors: Kenneth J. Bruza, James P. Godschalx, Edward O. Shaffer, II, Dennis W. Smith, Jr., Paul H. Townsend, III, Kevin J. Bouck, Qing Shan J. Niu
  • Publication number: 20030165625
    Abstract: Applicants found that selection of reactive nanoparticles as poragens when combined with monomeric precusors to organic, particularly polyarylene or polyarylene ether, matrix materials are effective in obtaining very small pore sizes.
    Type: Application
    Filed: February 15, 2002
    Publication date: September 4, 2003
    Inventors: Ying Hung So, Q. Jason Niu, Paul H. Townsend, Steve J. Martin, Thomas H. Kalantar, James Peter Godschalx, Kennethus J. Bruza, Kevin J. Bouck
  • Publication number: 20030092785
    Abstract: A suitable cross-linkable matrix precursor and a poragen can be treated to form a porous cross-linked matrix having a Tg of greater than 300° C. The porous matrix material has a lower dielectric constant than the corresponding non-porous matrix material, making the porous matrix material particularly attractive for a variety of electronic applications including integrated circuits, multichip modules, and flat panel display devices.
    Type: Application
    Filed: October 29, 2002
    Publication date: May 15, 2003
    Inventors: Kenneth J. Bruza, James P. Godschalx, Edward O. Shaffer, Dennis W. Smith, Paul H. Townsend, Kevin J. Bouck, Qing Shan J. Niu
  • Publication number: 20030083392
    Abstract: A suitable cross-linkable matrix precursor and a poragen can be treated to form a porous cross-linked matrix having a Tg of greater than 300° C. The porous matrix material has a lower dielectric constant than the corresponding non-porous matrix material, making the porous matrix material particularly attractive for a variety of electronic applications including integrated circuits, multichip modules, and flat panel display devices.
    Type: Application
    Filed: October 29, 2002
    Publication date: May 1, 2003
    Inventors: Kenneth J. Bruza, James P. Godschalx, Edward O. Shaffer, Dennis W. Smith, Paul H. Townsend, Kevin J. Bouck, Qing Shan J. Niu
  • Publication number: 20020177291
    Abstract: A cured polyphenylene polymer having a glass transition temperature no greater than 465° C. An integrated circuit article having a fracture toughness as determined by the modified edge liftoff test of at least 0.3 MPa-m1/2.
    Type: Application
    Filed: April 29, 2002
    Publication date: November 28, 2002
    Inventors: Edward O. Shaffer, Kevin E. Howard, James P. Godschalx, Paul H. Townsend
  • Publication number: 20020099158
    Abstract: This invention is a polyarylene composition in which resin does not undergo a significant drop in modulus at temperatures above 300° C. during cure. This feature enables one to form porous films by avoiding pore collapse and/or using a wider variety of poragen materials.
    Type: Application
    Filed: January 11, 2002
    Publication date: July 25, 2002
    Inventors: James P. Godschalx, Qing Shan J. Niu, Kenneth J. Bruza, Clark H. Cummins, Paul H. Townsend
  • Publication number: 20020052125
    Abstract: This invention is a method comprising providing a substrate, forming a first layer on the substrate, wherein the first layer has a dielectric constant of less than 3.0 and comprises an organic polymer, applying an organosilicate resin over the first layer, removing a portion of the organosilicate resin to expose a portion of the first layer, and removing the exposed portions of the first layer. The invention is also an integrated circuit article comprising an active substrate containing transistors and an electrical interconnect structure containing a pattern of metal lines separated, at least partially, by layers or regions of an organic polymeric material having a dielectric constant of less than 3.0 and further comprising a layer of an organosilicate resin above at least one layer of the organic polymer material.
    Type: Application
    Filed: August 20, 2001
    Publication date: May 2, 2002
    Inventors: Edward O. Shaffer, Kevin E. Howard, Joost J.M. Waeterloos, Jack E. Hetzner, Paul H. Townsend, Lynne K. Mills, Sheila Gombar-Fetner, Larry R. Wilson