Abstract: A data processing system having multiple independent paths for communication between a host and a plurality of storage devices where each path has its own queue for servicing requests generated by the host for accessing the storage devices. Each request is assigned a unique sequential ID before it is stored, along with its unique ID, in all the queues. Each storage device has a "mailbox" register where the ID and the status of the latest request being carried out is stored. Queues are serviced and their status updated based on the content of the mailbox in each storage device. The combination of assigning a unique task ID to each request and a "mailbox" register in each storage device allows the queue in each path to be completely out of sync with each of the queues in the other paths without causing data integrity problems, duplication of requests at the device level, or a need for complex locking schemes to keep the queues in sync with each other.

Abstract: A data storage system including a controller and a string of multiple DASDs, where each DASD is responsive to commands from the controller to perform local operations such as XOR functions and transferring data to other DASDs. A bus, which may comprise a serial or a parallel bus, electrically interconnects the controller and the DASDs. Each DASD includes a storage apparatus, an interface, a buffer, and processor. The buffer selectively receives data from the interface and the storage apparatus. In addition to other operations, the processor is responsive to commands from the controller to the buffer interface to perform an XOR operation on selected items of data in the buffer. The processor may additionally direct the results of the XOR operation to another DASD or to the controller.

Abstract: A method for dynamically detecting loss of map integrity in a form of system-managed storage (SMS). In SMS, maps are used to define access paths to data and to allocate and reallocate storage resources among applications running thereon. The method steps include incorporating as an indivisible part of an overwriting commmand the duplication of map information by appending a portion of it to each data block in store, and detecting loss of map integrity as a function of a comparison mismatch between the portion stored with a counterpart data block and the map upon each read/write access.

Abstract: A data processing system and method providing error protection for data transmitted between a processor and a buffer in one data format and transmitted between the buffer and a user device in a different data format. An adaptor is interposed between the processor and the buffer for transmitting to the buffer (i) successive data segments in the one data format, each ending with appended check bytes in a preselected cyclic redundancy code (CRC); and (ii) check bytes using the same CRC appended at the end of each segment in the different data format to create in the buffer records which are a composite of both formats, but viewed as in the one data format by the processor and as in the different data format by the user device. The boundaries of the segments in each format must be known to the adaptor. Since both formats use the same CRC, CRC bytes for each segment in each data format will provide an identical preselected value in the absence of a detectable error.

Abstract: Often in DASD subsystems, circumstances can occur which prevent the full transfer of the required data from channel to subsystem during a write operation. The disclosed methods prevents this data from later being read and treated as valid data by the host processor. This is achieved by marking data as invalid within the storage subsystem once it is determined that a channel error has occured. Subsequently, upon reading that data, the host processor can be made aware of the data invalidity and treat the data accordingly. In a second embodiment, invalid data is discarded rather than stored over the previous valid version of the data, before it is ever stored on DASD.

Abstract: A method is disclosed for correcting multibyte errors in a magnetic medium on which data is recorded in variable length blocks that comprise subblocks of data bytes and corresponding check bytes and include error correction code (ECC) for which ECC syndromes are generated during reading. A sequence of N sequential parity check bytes is written at the end of each block. After ECC syndromes are generated during reading, parity syndromes are generated by comparing parity check bytes computed from data bytes and check bytes as read with the parity check bytes as written. When a long-burst error occurs, a pointer points to the first of the N consecutive bytes in a block that could have been influenced by the error burst. After correcting correctable errors in all subblocks not affected by the N bytes identified by the pointer, and adjusting the parity syndromes for errors thus corrected, the adjusted parity syndromes are used to correct the errors in the N bytes indicated by the pointer.

Abstract: A system is disclosed for generating a plurality of error correcting check ECC bytes from a block of data presented to the system in serial by byte form. The system employs a plurality of ECC channels which operate in parallel with the channels generating check bytes from interleaved subsets of the data block. One channel generates an ECC parity check byte for each interleaved subset while another channel generates an ECC locator check byte for each interleaved subset of data. The ECC locator check byte for each subset represents the parity or modulo 2 sum of bit positions which are selected systematically in accordance with a predefined m sequence which is unique to each channel that generates locator check bytes. Error patterns greater than the number of bits in one byte are correctable, as are error patterns which are less than the number of bits in one byte but extend across byte boundaries of two adjacent bytes in different subsets.

Abstract: Apparatus for converting binary digital data from one form to another according to a variable word length code of fixed rate comprises word position indicating circuitry for indicating predetermined word position states of data in a data storage unit and conversion circuitry for sequentially converting a constant number of input bits at a time into the corresponding number of bits in said other form in dependence upon the contents of the data storage unit and the word position indication. The constant number of bits is less than the number of bits in the longest variable length word in the input data code form. The word position indicating circuitry either generates an updated function representing the current position of the word boundary in the data storage unit or recognizes the boundary from distinctive word ending patterns in the data storage unit.