Patents by Inventor Paul J. Duval
Paul J. Duval has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11476154Abstract: A field effect transistor, comprising a gate contact and gate metal forming a vertical structure, such vertical structure having sides and a top surrounded by an air gap formed between a source electrode and a drain electrode of the field effect transistor.Type: GrantFiled: September 26, 2019Date of Patent: October 18, 2022Assignee: Raytheon CompanyInventors: Jeffrey R. LaRoche, John P. Bettencourt, Paul J. Duval, Kelly P. Ip
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Patent number: 11145735Abstract: Forming an ohmic contact sealing layer disposed at an intersection between a sidewall of an ohmic contact and a surface of a semiconductor; forming an ohmic contact sealing layer on the intersection between a sidewall of the ohmic contact and the surface of the semiconductor; and subjecting the semiconductor with the ohmic contact to a chemical etchant.Type: GrantFiled: October 11, 2019Date of Patent: October 12, 2021Assignee: RAYTHEON COMPANYInventors: Paul J. Duval, John P. Bettencourt, James W. McClymonds, Paul M. Alcorn, Philip C. Balas, II, Michael S. Davis
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Publication number: 20210111263Abstract: Forming an ohmic contact sealing layer disposed at an intersection between a sidewall of an ohmic contact and a surface of a semiconductor; forming an ohmic contact sealing layer on the intersection between a sidewall of the ohmic contact and the surface of the semiconductor; and subjecting the semiconductor with the ohmic contact to a chemical etchant.Type: ApplicationFiled: October 11, 2019Publication date: April 15, 2021Applicant: Raytheon CompanyInventors: Paul J. Duval, John P. Bettencourt, James W. McClymonds, Paul M. Alcorn, Philip C. Balas, II, Michael S. Davis
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Publication number: 20210098285Abstract: A field effect transistor, comprising a gate contact and gate metal forming a vertical structure, such vertical structure having sides and a top surrounded by an air gap formed between a source electrode and a drain electrode of the field effect transistor.Type: ApplicationFiled: September 26, 2019Publication date: April 1, 2021Applicant: Raytheon CompanyInventors: Jeffrey R. LaRoche, John P. Bettencourt, Paul J. Duval, Kelly P. Ip
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Patent number: 10861792Abstract: Methods and apparatus for an integrated circuit having with a frontside metal layer on the frontside of the substrate and a backside metal layer on the backside of the substrate. The backside metal layer is deposited onto the backside of the substrate and into the via such that a portion of the backside metal layer is connected to a portion of the frontside metal layer. A diffusion barrier layer is deposited on the backside metal layer located in the via.Type: GrantFiled: March 25, 2019Date of Patent: December 8, 2020Assignee: Raytheon CompanyInventor: Paul J. Duval
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Publication number: 20200312776Abstract: Methods and apparatus for an integrated circuit having with a frontside metal layer on the frontside of the substrate and a backside metal layer on the backside of the substrate. The backside metal layer is deposited onto the backside of the substrate and into the via such that a portion of the backside metal layer is connected to a portion of the frontside metal layer. A diffusion barrier layer is deposited on the backside metal layer located in the via.Type: ApplicationFiled: March 25, 2019Publication date: October 1, 2020Applicant: Raytheon CompanyInventor: Paul J. Duval
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Patent number: 9362237Abstract: A substrate having an air bridge structure with end portions disposed and supported on the substrate and an elevated portion disposed between the end portions is coated with a protective layer. The protective layer is patterned to: leave portions of the protective layer over elevated portion and at least over the end portions of a region under the elevated portion of the air bridge structure; and remove portions over adjacent portions of the substrate. A dielectric material having a thickness greater than the height of the air bridge structure is deposited over the patterned protective layer portions remaining over elevated portion and over the adjacent portions of the substrate, the patterned temporary coating preventing the dielectric material from passing into the region under the elevated portion of the air bridge structure.Type: GrantFiled: November 13, 2015Date of Patent: June 7, 2016Assignee: RAYTHEON COMPANYInventors: Ward G. Fillmore, Paul J. Duval
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Patent number: 9343328Abstract: A semiconductor structure having a substrate; an active device formed in an active semiconductor region of the substrate, the active device having a control electrode for controlling a flow of carriers through the active semiconductor region between a pair of electrical contacts; and a photolithographic, thickness non-uniformity, compensation feature, disposed on the surface substrate off of the active semiconductor region. In one embodiment the feature comprises pads on the surface of the substrate and off of the active semiconductor region.Type: GrantFiled: January 5, 2015Date of Patent: May 17, 2016Assignee: RAYTHEON COMPANYInventors: Paul J. Duval, Paul M. Ryan, Christopher J. MacDonald
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Publication number: 20160071809Abstract: A substrate having an air bridge structure with end portions disposed and supported on the substrate and an elevated portion disposed between the end portions is coated with a protective layer. The protective layer is patterned to: leave portions of the protective layer over elevated portion and at least over the end portions of a region under the elevated portion of the air bridge structure; and remove portions over adjacent portions of the substrate. A dielectric material having a thickness greater than the height of the air bridge structure is deposited over the patterned protective layer portions remaining over elevated portion and over the adjacent portions of the substrate, the patterned temporary coating preventing the to dielectric material from passing into the region under the elevated portion of the air bridge structure.Type: ApplicationFiled: November 13, 2015Publication date: March 10, 2016Applicant: RAYTHEON COMPANYInventors: Ward G. Fillmore, Paul J. Duval
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Patent number: 9219024Abstract: A substrate having an air bridge structure with end portions disposed and supported on the substrate and an elevated portion disposed between the end portions is coated with a protective layer. The protective layer is patterned to: leave portions of the protective layer over elevated portion and at least over the end portions of a region under the elevated portion of the air bridge structure; and remove portions over adjacent portions of the substrate. A dielectric material having a thickness greater than the height of the air bridge structure is deposited over the patterned protective layer portions remaining over elevated portion and over the adjacent portions of the substrate, the patterned temporary coating preventing the dielectric material from passing into the region under the elevated portion of the air bridge structure.Type: GrantFiled: November 21, 2013Date of Patent: December 22, 2015Assignee: Raytheon CompanyInventors: Ward G. Fillmore, Paul J. Duval
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Patent number: 9219000Abstract: Forming an alignment mark on a semiconductor structure using an optical lithography to form a metal alignment mark on a substrate of the structure, using the formed metal alignment mark to form a first feature of a semiconductor device being formed on the substrate using optical lithography, and using the formed metal alignment mark to form a second, different feature for the semiconductor using electron beam lithography. In one embodiment, the first feature is an ohmic contact, the second feature is a Schottky contact, the metal alignment mark is a refractory metal or a refractory metal compound having an atomic weight greater than 60 such as TaN and the semiconductor device is a GaN semiconductor device. A semiconductor structure having a metal alignment mark on a zero layer of the structure, the metal alignment mark is a TaN and the semiconductor is GaN.Type: GrantFiled: March 26, 2014Date of Patent: December 22, 2015Assignee: RAYTHEON COMPANYInventors: Paul J. Duval, Kamal Tabatabaie, William J. Davis
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Publication number: 20150137310Abstract: A substrate having an air bridge structure with end portions disposed and supported on the substrate and an elevated portion disposed between the end portions is coated with a protective layer. The protective layer is patterned to: leave portions of the protective layer over elevated portion and at least over the end portions of a region under the elevated portion of the air bridge structure; and remove portions over adjacent portions of the substrate. A dielectric material having a thickness greater than the height of the air bridge structure is deposited over the patterned protective layer portions remaining over elevated portion and over the adjacent portions of the substrate, the patterned temporary coating preventing the dielectric material from passing into the region under the elevated portion of the air bridge structure.Type: ApplicationFiled: November 21, 2013Publication date: May 21, 2015Applicant: Raytheon CompanyInventors: Ward G. Fillmore, Paul J. Duval
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Publication number: 20150111379Abstract: A semiconductor structure having a substrate; an active device formed in an active semiconductor region of the substrate, the active device having a control electrode for controlling a flow of carriers through the active semiconductor region between a pair of electrical contacts; and a photolithographic, thickness non-uniformity, compensation feature, disposed on the surface substrate off of the active semiconductor region. In one embodiment the feature comprises pads on the surface of the substrate and off of the active semiconductor region.Type: ApplicationFiled: January 5, 2015Publication date: April 23, 2015Inventors: Paul J. Duval, Paul M. Ryan, Christopher J. MacDonald
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Publication number: 20140319586Abstract: A semiconductor structure having a substrate; an active device formed in an active semiconductor region of the substrate, the active device having a control electrode for controlling a flow of carriers through the active semiconductor region between a pair of electrical contacts; and a photolithographic, thickness non-uniformity, compensation feature, disposed on the surface substrate off of the active semiconductor region. In one embodiment the feature comprises pads on the surface of the substrate and off of the active semiconductor region.Type: ApplicationFiled: April 26, 2013Publication date: October 30, 2014Applicant: Raytheon CompanyInventors: Paul J. Duval, Paul M. Ryan, Christopher J. MacDonald
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Publication number: 20140206173Abstract: Forming an alignment mark on a semiconductor structure using an optical lithography to form a metal alignment mark on a substrate of the structure, using the formed metal alignment mark to form a first feature of a semiconductor device being formed on the substrate using optical lithography, and using the formed metal alignment mark to form a second, different feature for the semiconductor using electron beam lithography. In one embodiment, the first feature is an ohmic contact, the second feature is a Schottky contact, the metal alignment mark is a refractory metal or a refractory metal compound having an atomic weight greater than 60 such as TaN and the semiconductor device is a GaN semiconductor device. A semiconductor structure having a metal alignment mark on a zero layer of the structure, the metal alignment mark is a TaN and the semiconductor is GaN.Type: ApplicationFiled: March 26, 2014Publication date: July 24, 2014Applicant: RAYTHEON COMPANYInventors: Paul J. Duval, Kamal Tabatabaie, William J. Davis
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Patent number: 8754421Abstract: Forming an alignment mark on a semiconductor structure using an optical lithography to form a metal alignment mark on a substrate of the structure, using the formed metal alignment mark to form a first feature of a semiconductor device being formed on the substrate using optical lithography, and using the formed metal alignment mark to form a second, different feature for the semiconductor using electron beam lithography. In one embodiment, the first feature is an ohmic contact, the second feature is a Schottky contact, the metal alignment mark is a refractory metal or a refractory metal compound having an atomic weight greater than 60 such as TaN and the semiconductor device is a GaN semiconductor device. A semiconductor structure having a metal alignment mark on a zero layer of the structure, the metal alignment mark is a TaN and the semiconductor is GaN.Type: GrantFiled: February 24, 2012Date of Patent: June 17, 2014Assignee: Raytheon CompanyInventors: Paul J. Duval, Kamal Tabatabaie, William J. Davis
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Publication number: 20130221365Abstract: Forming an alignment mark on a semiconductor structure using an optical lithography to form a metal alignment mark on a substrate of the structure, using the formed metal alignment mark to form a first feature of a semiconductor device being formed on the substrate using optical lithography, and using the formed metal alignment mark to form a second, different feature for the semiconductor using electron beam lithography. In one embodiment, the first feature is an ohmic contact, the second feature is a Schottky contact, the metal alignment mark is a refractory metal or a refractory metal compound having an atomic weight greater than 60 such as TaN and the semiconductor device is a GaN semiconductor device. A semiconductor structure having a metal alignment mark on a zero layer of the structure, the metal alignment mark is a TaN and the semiconductor is GaN.Type: ApplicationFiled: February 24, 2012Publication date: August 29, 2013Applicant: Raytheon CompanyInventors: Paul J. Duval, Kamal Tabatabaie, William J. Davis
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Patent number: 6717143Abstract: An apparatus for imaging the surface of a sample, such as a scanning electron microscope. The apparatus generates a beam of charged particles directed at the surface, and includes an objective lens and an electrostatic lens for controlling the particle beam. The objective lens and the electrostatic lens constitute a compound lens that has an axis. The beam is controlled so that it travels along the axis of the compound lens in order to avoid adverse consequences induced by, for example, mechanical misalignments and as manifested when the focus of one of the objective and electrostatic lenses is changed during operation of the apparatus.Type: GrantFiled: April 30, 2002Date of Patent: April 6, 2004Assignee: Schlumberger Technologies Inc.Inventors: Paul J. Duval, Anastasia Y. Tyurina, Neal T. Sullivan
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Patent number: 6678932Abstract: In instruments such as Wien filters, electrostatic and/or magnetic pole pieces must be mounted on and secured to a supporting structure with a very high degree of dimensional precision, usually by brazing. To that end, a fixture is provided for holding the parts to be assembled in precise relationship and to press the pole pieces into engagement with the supporting structure while the securing operation is being carried out. The pressing is accomplished by a gravity-produced force which is, therefore, independent of positional accuracies caused by very high temperatures, such as are encountered during brazing.Type: GrantFiled: November 8, 2001Date of Patent: January 20, 2004Assignee: Schlumberger Technologies, Inc.Inventors: Paul J. Duval, Vladimir Vayner
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Publication number: 20030201392Abstract: An apparatus for imaging the surface of a sample, such as a scanning electron microscope. The apparatus generates a beam of charged particles directed at the surface, and includes an objective lens and an electrostatic lens for controlling the particle beam. The objective lens and the electrostatic lens constitute a compound lens that has an axis. The beam is controlled so that it travels along the axis of the compound lens in order to avoid adverse consequences induced by, for example, mechanical misalignments and as manifested when the focus of one of the objective and electrostatic lenses is changed during operation of the apparatus.Type: ApplicationFiled: April 30, 2002Publication date: October 30, 2003Applicant: SCHLUMBERGER TECHNOLOGIES, INC.Inventors: Paul J. Duval, Anastasia Y. Tyurina, Neal T. Sullivan