Patents by Inventor Paul J. Garnett

Paul J. Garnett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040196727
    Abstract: A rack mountable shelf supports a plurality of field replaceable units (FRUS) in the form of server cartridges, or blades, that each include a processor and a memory within an enclosure. The rack mountable shelf is configured to provide communal services for said server cartridges, including at least one of supplying DC operating power to the server cartridges, distributing information signals between the server cartridges and processing system management signals for the server cartridges. The communal services can also be provided by FRUs, for example with redundant power supply units and redundant combined switch/service processor units. A midplane within the shelf enables interconnection of the FRUs.
    Type: Application
    Filed: April 20, 2004
    Publication date: October 7, 2004
    Inventors: Paul J. Garnett, James E. King, Martin P. Mayhead, Peter Heffernan, Nigel Ritson
  • Patent number: 6778386
    Abstract: A modular computer system, for example a high density server system, includes an enclosure for receiving a number of computer system modules. A number of information processing modules, for example server blades, are receivable at a first face of the enclosure. A number of support modules of a first type, for example combined switch and service processor modules, and a number of support modules of a second type, for example power supply modules, are receivable at the second face of the enclosure. In order to provide cooling air to the first type of support modules, which are temperature sensitive, a plenum chamber provides a flow path for cooling air that bypasses the information processing modules. For the second type of support module, which is not as temperature sensitive, a flow path for cooling air is provided that passes through the information processing modules.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: August 17, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Paul J Garnett, Nigel D Ritson
  • Publication number: 20040158771
    Abstract: A computer system is provided having at least one processing resource, at least one power resource and at least one redundant power resource. The at least one processing resource is operable to exploit a greater level of power than is provided by the at least one power resource. The at least one processing resource is configured to exploit power provided by both the at least one power resource and the at least one redundant power resource, at a time when both the at least one power resource and the at least one redundant power resource are both operable to provide power.
    Type: Application
    Filed: February 10, 2003
    Publication date: August 12, 2004
    Inventors: Paul J. Garnett, Andrew S. Burnham
  • Publication number: 20040133771
    Abstract: Method and apparatus are disclosed that allow boot code within the apparatus to be updated using a system controller. The apparatus includes a central processing unit (CPU) and a programmable memory that contains boot code at a predetermined location for use in booting the CPU. The apparatus further includes a bus and a bus master for the bus. The CPU accesses the boot code via the bus and the bus master. The apparatus further includes a system controller. This is operable to write boot code into the programmable memory over the bus. In one embodiment, the above components form a single subsystem within an array of such subsystems. A single control point for the array can transmit updated boot code to the system controller for loading into the programmable memory. This then provides a single interface for simultaneously updating the boot code in all subsystems.
    Type: Application
    Filed: January 7, 2003
    Publication date: July 8, 2004
    Inventors: James E. King, Paul J. Garnett
  • Patent number: 6718472
    Abstract: A power sub-system controls a supply of power to a field replaceable unit for electronic equipment. The power sub-system includes a power controller that is arranged, in response to the detection of a fault, to switch off the supply of power to a field replaceable unit. The power controller is then responsive to a sequence of two events to switch on the supply of power to the field replaceable unit. The first event is a first change in state of an interlock signal indicative of the field replaceable unit being released. The second event is a change of state of the interlock signal indicative of a field replaceable unit being secured in position. Automatic power management can thus provided with requiring a maintenance engineer to restore power manually, this being achievable simply by the removal and replacement of the field replaceable unit. The field replaceable unit includes an interlock mechanism for locking the field replaceable unit in the electronic equipment.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: April 6, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Paul J. Garnett
  • Publication number: 20040042145
    Abstract: A method and apparatus for testing for latent faults in the isolation devices of a system comprising redundant power supplies which supply power to one or more system units. A system controller is operable to perform a test cycle to perform the fault checks, which may comprise checks for short circuits and/or open circuits. The checks may be performed within a test cycle in which each of the isolation devices in the system is tested. The test cycle may be performed at regular intervals, the interval between each cycle being determinable by user input. In the event that a fault in one of the isolation devices is detected, the system controller may be operable to report the fault to an alarm system.
    Type: Application
    Filed: June 4, 2003
    Publication date: March 4, 2004
    Inventor: Paul J. Garnett
  • Publication number: 20040039536
    Abstract: Latent faults are detected by a testing system in a redundant DC power supply system having at least two power supplies connected to a common load via respective isolation devices. The testing system selects as a subject for a test procedure one isolation device and its corresponding power supply. The power supplies are controlled during the test procedure to marginally vary the output voltage of at least one power supply such that a differential voltage is applied between the output of the selected power supply and the outputs of the remaining power supplies for selectively changing the conductive state of at least one isolation device to a non conductive state by reducing its forward voltage to less than its respective forward bias voltage value.
    Type: Application
    Filed: June 4, 2003
    Publication date: February 26, 2004
    Inventor: Paul J. Garnett
  • Publication number: 20030229814
    Abstract: A computer system 10 with one or more processors 12 can be configured to operate in any one of a number of thermal environments. A setting system 14 sets operating parameters of the computer system such as processor operating voltage and frequency. A selecting system 16 selects values of operating parameters for use in setting by responding to an input of configuring data 20 to select a set of parameter values from a parameter value storage memory 18. The configuring data 20 may be input by the insertion of a smart card 58. Such configuring is useful in adapting computer systems during manufacture for compliance with desired specifications without hardware modification.
    Type: Application
    Filed: April 7, 2003
    Publication date: December 11, 2003
    Applicant: Sun Microsystems, Inc.
    Inventor: Paul J. Garnett
  • Publication number: 20030182594
    Abstract: A fault tolerant computing system is provided comprising two or more processing sets that operate in synchronism with one another. The two processing sets are joined by a bridge, and there is a communications link for each processing set for transmitting data from the processing set to the bridge. Data transmissions are initiated in synchronism with one another from the respective processing sets to the bridge but are then subject to variable delay over the communications link. Accordingly, a buffer is included in the bridge for storing the data transmissions received from the processing sets for long enough to compensate for the variable delay. The data transmissions can then be fed out from the buffer to a comparator that verifies that the data transmissions received from the two or more processing sets properly match each other. Likewise, a buffer is included in each processing set for storing the data transmissions received from the bridge for long enough to compensate for the variable delay.
    Type: Application
    Filed: March 14, 2003
    Publication date: September 25, 2003
    Applicant: Sun Microsystems, Inc.
    Inventors: John E. Watkins, Paul J. Garnett, Stephen Rowlinson
  • Publication number: 20030182492
    Abstract: A computing system comprises two or more processing sets, for example for fault tolerant operation. The multiple processing sets have a connection to at least one device, typically many devices. The ownership of each device is allocated to one of the two or more processing sets. When an interrupt is generated within a device, this is transmitted from the device to the processing set to which ownership of the device has been allocated, but not to the remaining processing sets. In addition, a command for a device may be generated by a processing set. However, receipt of this command by the device is disabled if the processing set that generated the command has not been allocated ownership of the device.
    Type: Application
    Filed: March 14, 2003
    Publication date: September 25, 2003
    Applicant: Sun Microsystems, Inc.
    Inventors: John E. Watkins, Paul J. Garnett, Stephen Rowlinson
  • Publication number: 20030140221
    Abstract: A portable programmable data carrier comprises a processor, a program memory for storing operating commands for the processor and a data memory for storing configuration data for a programmable processing apparatus. The data carrier is powered by an integral power supply. Configuration data for storage in the data memory is manually input via a manual input means, and stored configuration data is displayed on a display. Configuration data stored in the data memory may be transferred to a programmable processing apparatus via matched interface means of the data carrier and the programmable processing apparatus.
    Type: Application
    Filed: November 4, 2002
    Publication date: July 24, 2003
    Inventor: Paul J. Garnett
  • Patent number: 6587961
    Abstract: A bridge for a multi-processor system includes bus interfaces for connection to an I/O bus of a first processing set, an I/O bus of a second processing set and a device bus. It also comprises a bridge control mechanism configured to be operable, in an operational mode to permit access by at least one of the first and second processing sets to bridge resources and to the device bus and, in an error mode, to prevent access by the processing sets to the device bus and to permit restricted access to at least one of the processing sets to at least predetermined bridge resources. By providing restricted access to selected parameters held in the bridge during an error mode, the bridge can act as a secure repository for information which can be used by the processing sets to investigate the error and hopefully to recover therefrom, while preventing I/O devices connected to device bus from being corrupted by a faulty processing set. Storage in the bridge provides for buffering data pending resolution of the error.
    Type: Grant
    Filed: June 15, 1998
    Date of Patent: July 1, 2003
    Assignee: Sun Microsystems, Inc.
    Inventors: Paul J. Garnett, Stephen Rowlinson, Femi A. Oyelakin
  • Publication number: 20030105859
    Abstract: A server blade may comprise a processor and a network interface. The network interface can be configured be connected to a network remote the server blade. The server blade may be configured to detect an access to the network. The server blade may be further configured as a field replaceable unit. Optionally, the server blade may further comprise an enclosure which encloses the processor.
    Type: Application
    Filed: August 9, 2002
    Publication date: June 5, 2003
    Inventors: Paul J. Garnett, James E. King, Martin P. Mayhead
  • Publication number: 20030105903
    Abstract: A modular computer system may be provided. The modular computer system may comprise a carrier operable removably to receive a plurality of computer system modules therein. A plurality of information processing modules can be removably received in the carrier, each module may have a communications port operable to connect to a communications network internal to the carrier. The modular computer system may also comprise a switch operable to connect to the internal communications network to distribute information messages between the modules and to connect to an external communications network. An information distribution module may be provided removably received in the carrier operable connect to the internal communications network to receive an information message, to perform processing on the message to determine a destination, and to forward the message toward the determined destination via the internal communications network.
    Type: Application
    Filed: August 9, 2002
    Publication date: June 5, 2003
    Inventors: Paul J. Garnett, James E. King, Martin P. Mayhead, Peter Heffernan, Ariel Hendel, Leo A. Hejza, Thomas E. Giles
  • Publication number: 20030101304
    Abstract: A server blade is provided with an enclosure. The server blade can be provided with a plurality of processors in the enclosure. The server blade can be configured as a field replaceable unit removably receivable in a carrier of a modular computer system, for example a high density blade server system. The enclosure for such a multiprocessor server blade can be larger that a standard enclosure for a single processor server blade. The carrier can be configured to receive such an oversized server blade enclosure as well as a standard enclosure.
    Type: Application
    Filed: August 9, 2002
    Publication date: May 29, 2003
    Inventors: James E. King, Martin P. Mayhead, Paul J. Garnett
  • Publication number: 20030048615
    Abstract: A server blade may comprise a processor and a network interface. The network interface can be configured be connected to a network remote the server blade. The server blade may be configured detect a property of an entity connected to the network. The server blade may be further configured as a field replaceable unit. Optionally, the server blade may further comprise an enclosure which encloses the processor.
    Type: Application
    Filed: August 9, 2002
    Publication date: March 13, 2003
    Inventors: James E. King, Martin P. Mayhead, Paul J. Garnett
  • Publication number: 20030048614
    Abstract: A server blade may comprise a processor. The server blade may additionally comprise a removable media interface device. The server blade can be configured as a field replaceable unit.
    Type: Application
    Filed: August 9, 2002
    Publication date: March 13, 2003
    Inventors: Paul J. Garnett, James E. King, Martin P. Mayhead, Peter Heffernan
  • Publication number: 20030050998
    Abstract: A method may be provided for establishing a service communication channel to a multi-server computer system comprising a plurality of modular units. At least selected modular units can have a wireless communication port. The method may comprise transmitting an existence request message to the wireless communication port of each modular unit provided therewith; and receiving at least one existence response message from at least one of the plurality of modular units. The existence response message may include an identifier of the modular unit.
    Type: Application
    Filed: August 9, 2002
    Publication date: March 13, 2003
    Inventors: Paul J. Garnett, Martin P. Mayhead
  • Patent number: D485835
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: January 27, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Nigel D. Ritson, Paul J. Garnett
  • Patent number: D494578
    Type: Grant
    Filed: December 18, 2002
    Date of Patent: August 17, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Nigel D. Ritson, Paul J. Garnett, Peter Heffernan