Patents by Inventor Paul Jordan
Paul Jordan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11891219Abstract: A lid apparatus for a multi-chambered container. The lid apparatus has a top-lid that is hingedly attached to a bottom-cap. The top-lid includes one or more openings for fluid filling multiple passages that extend from the bottom-cap. A lower bottom-cap includes welding features for welding to the multi-chambered container.Type: GrantFiled: June 8, 2021Date of Patent: February 6, 2024Assignee: CepheidInventor: Paul Jordan
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Publication number: 20240020261Abstract: A reconfigurable dataflow unit (RDU) includes an intra-RDU network, an array of configurable units connected by an array level network and function interfaces. The RDU also includes interface circuits coupled between the intra-RDU network and external interconnects. An interface circuit receives a packet from the external interconnect and extracts a target RDU identifier and compares the target RDU identifier to the value of the identity register. It also communicates over the intra-RDU network to a function interface based on information in the first packet in response to the target RDU identifier being equal to the identity register. The interface circuit retrieves another interface circuit identifier for the target RDU identifier from the pass-through table and, in response to the target RDU identifier not being equal to the identity register, sends the target RDU identifier and other information to the other interface circuit over the intra-RDU network.Type: ApplicationFiled: July 5, 2023Publication date: January 18, 2024Applicant: SambaNova Systems, Inc.Inventors: Paul JORDAN, Manish K. SHAH, Emre Ali BURHAN, Dawei HUANG, Yong QIN
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Publication number: 20230418715Abstract: An apparatus is disclosed in which the apparatus may include a plurality of cores, including a first core, a second core and a third core, and circuitry coupled to the first core. The first core may be configured to process a plurality of instructions. The circuitry may be may be configured to detect that the first core stopped committing a subset of the plurality of instructions, and to send an indication to the second core that the first core stopped committing the subset. The second core may be configured to disable the first core from further processing instructions of the subset responsive to receiving the indication, and to copy data from the first core to a third core responsive to disabling the first core. The third core may be configured to resume processing the subset dependent upon the data.Type: ApplicationFiled: June 9, 2023Publication date: December 28, 2023Inventors: James Lewis, Paul Jordan, Gregory Onufer, Ali Vahidsafa
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Publication number: 20230315624Abstract: A processor has multiple memory interfaces and a memory interleaver controlling access to the memory interfaces. The memory interfaces may each couple with one or more memory devices. The number of memory devices coupled to the different memory interfaces may be unequal. The memory interleaver determines a memory region from a logical address, and a region relative address. It determines the interleave factor IF corresponding to the memory region. It performs an integer division to obtain a device line address, and a modulo operation to obtain an uncorrected channel address. The memory interleaver may add a region start address associated with the memory region to the device line address to obtain a physical line address. It may correct the uncorrected channel address, based on the memory region, to obtain a physical channel address. Some implementations use configuration memories to allow flexibility, other implementations are hardwired for a particular memory architecture.Type: ApplicationFiled: June 7, 2023Publication date: October 5, 2023Applicant: SambaNova Systems, Inc.Inventors: Paul JORDAN, Manish K. SHAH
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Publication number: 20230305881Abstract: A data processing system is presented that includes a communication link, a runtime processor, and one or more reconfigurable processors. A reconfigurable processor includes first and second dies arranged in a package, having respective K and L arrays of coarse-grained reconfigurable (CGR) units, and respective first and second communication link interfaces coupled to the communication link. The runtime processor is adapted for configuring the first communication link interface to provide access to the K arrays of CGR units through the communication link from a first physical function driver and from up to M virtual function drivers, and for configuring the second communication link interface to provide access to the K arrays of CGR units of the first die and to the L arrays of CGR units of the second die through the communication link from a second physical function driver and from up to N virtual function drivers.Type: ApplicationFiled: February 1, 2023Publication date: September 28, 2023Applicant: SambaNova Systems, Inc.Inventors: Manish K. SHAH, Paul JORDAN, Maran WILSON, Ravinder KUMAR
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Publication number: 20230244462Abstract: A system is presented that includes a communication link, a runtime processor coupled to the communication link, and a reconfigurable processor. The reconfigurable processor is adapted for generating an interrupt to the runtime processor in response to a predetermined event and includes multiple arrays of coarse-grained reconfigurable (CGR) units and an interface to the communication link that couples the reconfigurable processor to the runtime processor via the communication link. The runtime processor is adapted for configuring the interface to the communication link to provide access to the multiple arrays of coarse-grained reconfigurable units from a physical function driver and from at least one virtual function driver, and the reconfigurable processor is adapted for sending the interrupt to the physical function driver and to a virtual function driver of the at least one virtual function driver within the runtime processor.Type: ApplicationFiled: March 7, 2023Publication date: August 3, 2023Applicant: SambaNova Systems, Inc.Inventors: Manish K. SHAH, Paul JORDAN, Maran WILSON, Ravinder KUMAR
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Publication number: 20230244515Abstract: A system is presented that includes a communication link, a runtime processor, and a reconfigurable processor. The reconfigurable processor is adapted for generating an interrupt to the runtime processor in response to a predetermined event and includes first and second dies arranged in a package, having respective first and second arrays of coarse-grained reconfigurable (CGR) units, and respective first and second communication link interfaces coupled to the communication link. The runtime processor is adapted for configuring the first and second communication link interfaces to provide access to the first and second arrays of coarse-grained reconfigurable units from first and second physical function drivers and from at least one virtual function driver, and the reconfigurable processor is adapted for sending the interrupt to the first or to the second physical function driver and for sending the interrupt to a virtual function driver of the at least one virtual function driver.Type: ApplicationFiled: March 7, 2023Publication date: August 3, 2023Applicant: SambaNova Systems, Inc.Inventors: Manish K. SHAH, Paul JORDAN, Maran WILSON, Ravinder KUMAR
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Publication number: 20230244461Abstract: A data processing system is presented that includes a communication link, a runtime processor coupled to the communication link, and one or more reconfigurable processors. A reconfigurable processor of the one or more reconfigurable processors is adapted for generating an interrupt to the runtime processor in response to a predetermined event and includes arrays of coarse-grained reconfigurable (CGR) units and an interface to the communication link that couples the reconfigurable processor to the runtime processor via the communication link. The runtime processor is adapted for configuring the interface to the communication link to provide access to the arrays of CGR units through the communication link from a physical function driver and from a virtual function driver.Type: ApplicationFiled: February 1, 2023Publication date: August 3, 2023Applicant: SambaNova Systems, Inc.Inventors: Manish K. SHAH, Paul JORDAN, Maran WILSON, Ravinder KUMAR
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Patent number: 11709742Abstract: An apparatus is disclosed in which the apparatus may include a plurality of cores, including a first core, a second core and a third core, and circuitry coupled to the first core. The first core may be configured to process a plurality of instructions. The circuitry may be may be configured to detect that the first core stopped committing a subset of the plurality of instructions, and to send an indication to the second core that the first core stopped committing the subset. The second core may be configured to disable the first core from further processing instructions of the subset responsive to receiving the indication, and to copy data from the first core to a third core responsive to disabling the first core. The third core may be configured to resume processing the subset dependent upon the data.Type: GrantFiled: February 2, 2022Date of Patent: July 25, 2023Assignee: Oracle International CorporationInventors: James Lewis, Paul Jordan, Gregory Onufer, Ali Vahidsafa
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Patent number: 11536463Abstract: A cooking appliance includes a body and a cooktop disposed on the body. A plurality of gas burner assemblies is operably coupled to the cooktop. A first frame member is coupled to a first side of the cooktop and defines at least a portion of a sump defined by the cooktop. A second frame member is coupled to a second side of the cooktop and defines at least a portion of the sump defined by the cooktop. A bracket is coupled to the first and second frame members. The bracket extends along a portion of a perimeter of the cooktop between the first and second frame members. The bracket defines at least a portion of the sump defined by the cooktop.Type: GrantFiled: August 30, 2019Date of Patent: December 27, 2022Assignee: Whirlpool CorporationInventors: Patrick J. Duffy, Thomas Walker Faussett, Paul Jordan Neuman, Binesh R. Pillai, Edward Benjamin Standen, Nicholas Edward Righetti, Sarah Katherine Small
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Patent number: 11525716Abstract: A method of determining a set of calibration values for offset-compensation of an inductive angular sensor arrangement includes: a substrate with a transmitter coil and three receiver coils, and a rotatable target. The method involves the steps of: a) exciting the transmitter coil; b) positioning the target at or near predefined positions, c) measuring and processing the signals, including calculating sums of squares of difference signals. A sensor device, and an angular sensor system may be arranged or adapted in view of the method.Type: GrantFiled: December 7, 2021Date of Patent: December 13, 2022Assignee: MELEXIS TECHNOLOGIES SAInventors: Mohammed El-Shennawy, Paul Jordan, Yassine Akermi
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Publication number: 20220324620Abstract: A lid apparatus for a multi-chambered container. The lid apparatus has a top-lid that is hingedly attached to a bottom-cap. The top-lid includes one or more openings for fluid filling multiple passages that extend from the bottom-cap. A lower bottom-cap includes welding features for welding to the multi-chambered container. The bottom-cap further includes one or more auxiliary ports for injecting a reagent when the lid apparatus is in a closed configuration sealingly attached to the multi-chambered sample container.Type: ApplicationFiled: April 29, 2022Publication date: October 13, 2022Inventors: Paul Jordan, Rohan Kurse
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Publication number: 20220260357Abstract: A method of determining a set of calibration values for offset-compensation of an inductive angular sensor arrangement includes: a substrate with a transmitter coil and three receiver coils, and a rotatable target. The method involves the steps of: a) exciting the transmitter coil; b) positioning the target at or near predefined positions, c) measuring and processing the signals, including calculating sums of squares of difference signals. A sensor device, and an angular sensor system may be arranged or adapted in view of the method.Type: ApplicationFiled: December 7, 2021Publication date: August 18, 2022Inventors: Mohammed EL-SHENNAWY, Paul JORDAN, Yassine AKERMI
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Patent number: 11345525Abstract: A lid apparatus for a multi-chambered container. The lid apparatus has a top-lid that is hingedly attached to a bottom-cap. The top-lid includes one or more openings for fluid filling multiple passages that extend from the bottom-cap. A lower bottom-cap includes welding features for welding to the multi-chambered container. The bottom-cap further includes one or more auxiliary ports for injecting a reagent when the lid apparatus is in a closed configuration sealingly attached to the multi-chambered sample container.Type: GrantFiled: September 27, 2019Date of Patent: May 31, 2022Assignee: CepheidInventors: Paul Jordan, Rohan Kurse
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Publication number: 20220156075Abstract: An apparatus is disclosed in which the apparatus may include a plurality of cores, including a first core, a second core and a third core, and circuitry coupled to the first core. The first core may be configured to process a plurality of instructions. The circuitry may be may be configured to detect that the first core stopped committing a subset of the plurality of instructions, and to send an indication to the second core that the first core stopped committing the subset. The second core may be configured to disable the first core from further processing instructions of the subset responsive to receiving the indication, and to copy data from the first core to a third core responsive to disabling the first core. The third core may be configured to resume processing the subset dependent upon the data.Type: ApplicationFiled: February 2, 2022Publication date: May 19, 2022Inventors: James Lewis, Paul Jordan, Gregory Onufer, Ali Vahidsafa
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Patent number: 11263012Abstract: An apparatus is disclosed in which the apparatus may include a plurality of cores, including a first core, a second core and a third core, and circuitry coupled to the first core. The first core may be configured to process a plurality of instructions. The circuitry may be may be configured to detect that the first core stopped committing a subset of the plurality of instructions, and to send an indication to the second core that the first core stopped committing the subset. The second core may be configured to disable the first core from further processing instructions of the subset responsive to receiving the indication, and to copy data from the first core to a third core responsive to disabling the first core. The third core may be configured to resume processing the subset dependent upon the data.Type: GrantFiled: January 6, 2020Date of Patent: March 1, 2022Assignee: Oracle International CorporationInventors: James Lewis, Paul Jordan, Gregory Onufer, Ali Vahidsafa
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Publication number: 20210362918Abstract: A lid apparatus for a multi-chambered container. The lid apparatus has a top-lid that is hingedly attached to a bottom-cap. The top-lid includes one or more openings for fluid filling multiple passages that extend from the bottom-cap. A lower bottom-cap includes welding features for welding to the multi-chambered container.Type: ApplicationFiled: June 8, 2021Publication date: November 25, 2021Inventor: Paul Jordan
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Patent number: 11053053Abstract: A lid apparatus for a multi-chambered container. The lid apparatus has a top-lid that is hingedly attached to a bottom-cap. The top-lid includes one or more openings for fluid filling multiple passages that extend from the bottom-cap. A lower bottom-cap includes welding features for welding to the multi-chambered container.Type: GrantFiled: March 18, 2019Date of Patent: July 6, 2021Assignee: CepheidInventor: Paul Jordan
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Publication number: 20210063020Abstract: A cooking appliance includes a body and a cooktop disposed on the body. A plurality of gas burner assemblies is operably coupled to the cooktop. A first frame member is coupled to a first side of the cooktop and defines at least a portion of a sump defined by the cooktop. A second frame member is coupled to a second side of the cooktop and defines at least a portion of the sump defined by the cooktop. A bracket is coupled to the first and second frame members. The bracket extends along a portion of a perimeter of the cooktop between the first and second frame members. The bracket defines at least a portion of the sump defined by the cooktop.Type: ApplicationFiled: August 30, 2019Publication date: March 4, 2021Applicant: WHIRLPOOL CORPORATIONInventors: Patrick J. Duffy, Thomas Walker Faussett, Paul Jordan Neuman, Binesh R. Pillai, Edward Benjamin Standen, Nicholas Edward Righetti, Sarah Katherine Small
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Patent number: D908301Type: GrantFiled: May 16, 2018Date of Patent: January 19, 2021Assignee: CepheidInventors: Ronald Chang, Steven M. Montgomery, Gregory Mote, Brian Bliven, Paul Jordan