Patents by Inventor Paul Langner

Paul Langner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10063341
    Abstract: Methods and apparatus for transmitting Ethernet data along an Ethernet link with a BASE-T transceiver are disclosed. One exemplary BASE-T Ethernet transceiver includes an Ethernet data framing module having an input interface to receive Ethernet block data bits at a first data rate. Logic associates the Ethernet block data bits with an auxiliary bit and a number of zero bits. An error encoder is coupled to the logic to encode all of the data bits, auxiliary bit and zero bits into an error encoded transport frame having plural error check bits. A symbol mapper receives the error encoded transport frame and transforms the error encoded transport frame into multiple symbols. A transmitter coupled to the symbol mapper transmits the multiple symbols over an Ethernet link at one of a selection of symbol rates. The data rate of data transmitted over the Ethernet link is based on the number of zero bits.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: August 28, 2018
    Assignee: Aquantia Corp.
    Inventors: Ramin Farjadrad, Paul Langner, Hossein Sedarat, Ramin Shirani, Kamal Dalmia
  • Patent number: 9853769
    Abstract: A BASE-T Ethernet transceiver is disclosed. The transceiver includes a BASE-T Ethernet transmit circuit that employs a data framing module. The data framing module includes an input interface to receive Ethernet block data bits, and, forward error correction encoder is coupled to the logic to encode at least a first portion of the data bits to generate first error check bits. A Reed-Solomon (RS) encoder is coupled to the logic to encode at least a second portion of the data bits in accordance with a Reed-Solomon error code to generate second error check bits. A symbol mapper modulates the Ethernet block data bits in accordance with an SQ64 constellation comprising back-to-back PAM8 symbols.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: December 26, 2017
    Inventors: Ramin Farjad, Paul Langner
  • Patent number: 9774420
    Abstract: A BASE-T Ethernet transceiver is disclosed. The transceiver includes a BASE-T Ethernet transmit circuit that employs a data framing module. The data framing module includes an input interface to receive Ethernet block data bits, and logic to aggregate the Ethernet block data bits in accordance with a 512/513B code. A forward error correction encoder is coupled to the logic to encode at least a first portion of the data bits to generate first error check bits. A Reed-Solomon (RS) encoder is coupled to the logic to encode at least a second portion of the data bits in accordance with a Reed-Solomon error code to generate second error check bits.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: September 26, 2017
    Assignee: Aquantia Corp.
    Inventor: Paul Langner
  • Patent number: 9634800
    Abstract: A BASE-T Ethernet transceiver is disclosed. The transceiver includes a BASE-T Ethernet data framing module having an input interface to receive Ethernet block data bits at a first data rate, logic to associate the Ethernet block data bits with an auxiliary bit and a number of Reed-Solomon check bytes, and a forward error correction encoder. The encoder is coupled to the logic to encode all of the data bits, auxiliary bit and the Reed-Solomon check bytes into a first error encoded transport frame having plural error check bits. A symbol mapper receives the first error encoded transport frame and modulates the first error encoded transport frame into symbols, each of the symbols having uncoded bits. A BASE-T transmitter is coupled to the symbol mapper to transmit the first group of symbols over an Ethernet link at one of a selection of symbol rates. Errors in the uncoded bits are correctable via the Reed-Solomon check bytes.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: April 25, 2017
    Assignee: Aquantia Corp.
    Inventors: Paul Langner, Hossein Sedarat
  • Patent number: 9485335
    Abstract: A method of operation in a high-speed Ethernet transceiver is disclosed. The method includes engaging in an autonegotiation process with a link partner transceiver to indicate whether one or more sub-rate modes of operation are supported. Each sub-rate mode of operation corresponds to a sub-data rate that is less than a maximum data rate. The autonegotiation process is terminated. The transceiver then participates in a training process. The training process includes receiving a first training sequence corresponding to a first sub-data rate that is less than the maximum data rate. A signal quality parameter for the received first training sequence is measured. The training sequence is terminated based on the measured signal quality parameter failing a predetermined criteria. A second training sequence is then initiated that corresponds to a second sub-data rate that is less than the first sub-data rate without starting a second autonegotiation process.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: November 1, 2016
    Assignee: Aquantia Corp.
    Inventors: Paul Langner, Hossein Sedarat
  • Patent number: 9363039
    Abstract: Methods and apparatus for transmitting Ethernet data along an Ethernet link with a BASE-T transceiver are disclosed. One exemplary BASE-T Ethernet transceiver includes an Ethernet data framing module having an input interface to receive Ethernet block data bits at a first data rate. Logic associates the Ethernet block data bits with an auxiliary bit and a number of zero bits. An error encoder is coupled to the logic to encode all of the data bits, auxiliary bit and zero bits into an error encoded transport frame having plural error check bits. A symbol mapper receives the error encoded transport frame and transforms the error encoded transport frame into multiple symbols. A transmitter coupled to the symbol mapper transmits the multiple symbols over an Ethernet link at one of a selection of symbol rates. The data rate of data transmitted over the Ethernet link is based on the number of zero bits.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: June 7, 2016
    Assignee: Aquantia Corp.
    Inventors: Ramin Farjadrad, Paul Langner, Hossein Sedarat, Ramin Shirani, Kamal Dalmia
  • Patent number: 9281916
    Abstract: Methods and apparatus for transferring data along a link with a 10GBASE-T transceiver at a variable data rate are disclosed. One exemplary method includes detecting a link quality metric; and selecting a symbol transmission rate and a data modulation scheme based on the detected link quality metric. In many implementations, for a selected symbol transmission rate, if the detected link quality metric is less than a link quality threshold, then the selecting of the data modulation scheme is performed such that a data bit per symbol value represented by the selected data modulation scheme is decreased by at least ½ data bit per symbol. The selected symbol transmission rate and the selected modulation together represent a selectable data rate from a selection of data rates.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: March 8, 2016
    Assignee: Aquantia Corp.
    Inventors: Ramin Farjadrad, Paul Langner, Hossein Sedarat, Ramin Shirani, Kamal Dalmia
  • Publication number: 20150171991
    Abstract: Methods and apparatus for transferring data along a link with a 10 GBASE-T transceiver at a variable data rate are disclosed. One exemplary method includes detecting a link quality metric; and selecting a symbol transmission rate and a data modulation scheme based on the detected link quality metric. In many implementations, for a selected symbol transmission rate, if the detected link quality metric is less than a link quality threshold, then the selecting of the data modulation scheme is performed such that a data bit per symbol value represented by the selected data modulation scheme is decreased by at least ½ data bit per symbol. The selected symbol transmission rate and the selected modulation together represent a selectable data rate from a selection of data rates.
    Type: Application
    Filed: February 27, 2015
    Publication date: June 18, 2015
    Inventors: Ramin Farjadrad, Paul Langner, Hossein Sedarat, Ramin Shirani, Kamal Dalmia
  • Patent number: 9001872
    Abstract: Methods and apparatus for transferring data along a link with a 10GBASE-T transceiver at a variable data rate are disclosed. One exemplary method includes detecting a link quality metric; and selecting a symbol transmission rate and a data modulation scheme based on the detected link quality metric. In many implementations, for a selected symbol transmission rate, if the detected link quality metric is less than a link quality threshold, then the selecting of the data modulation scheme is performed such that a data bit per symbol value represented by the selected data modulation scheme is decreased by at least ½ data bit per symbol. The selected symbol transmission rate and the selected modulation together represent a selectable data rate from a selection of data rates.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: April 7, 2015
    Assignee: Aquantia Corp.
    Inventors: Ramin Farjadrad, Paul Langner, Hossein Sedarat, Ramin Shirani
  • Patent number: 8929468
    Abstract: An Ethernet cable connection system is disclosed. The system includes a magnetic package having a line interface to couple to a plurality of Ethernet line conductors, and a PHY interface to couple to a plurality of transceiver circuits corresponding to the line conductors. The magnetic package is operable to isolate the line conductors from the corresponding transceiver circuits. The system also includes a termination impedance network and a common-mode detection circuit. The termination impedance network is coupled to the magnetic package line interface. The common-mode detection circuit includes a sense impedance coupled to the termination impedance network that is operable to detect a common-mode signal associated with at least one of the plurality of Ethernet line conductors. A bypass path feeds the detected common-mode signal to the plurality of transceiver circuits without isolation by the magnetic package.
    Type: Grant
    Filed: June 14, 2012
    Date of Patent: January 6, 2015
    Assignee: Aquantia Corp.
    Inventors: Daniel E. Voigt, Paul Langner
  • Patent number: 8928425
    Abstract: A circuit for a wireline system is disclosed. In an embodiment, the circuit includes a twisted pair channel. The twisted pair channel delivers a differential signal that includes a converter mode component. The circuit includes at least one transformer coupled to the twisted pair channel and a transceiver coupled to the at least one transformer. The circuit further includes a common mode detection coupled to the transceiver for detecting a common mode component. In an embodiment, the circuit detects the common mode component. Accordingly, with common mode component detection capability, the common mode component of the differential can be analyzed for characterization purposes as well as for potential improvement in the system performance signal.
    Type: Grant
    Filed: October 22, 2009
    Date of Patent: January 6, 2015
    Assignee: Aquantia Corp.
    Inventors: Hossein Sedarat, Paul Langner, Ramin Farjadrad, Ramin Shirani
  • Patent number: 8930799
    Abstract: A method is disclosed for correcting bit errors in a block-coded data frame. The method includes receiving a plurality of block-coded symbols, each symbol including at least one unencoded bit; detecting a bit error in one of the plurality of symbols associated with the unencoded bits, the detecting carried out in accordance with an error detection algorithm; identifying the symbol having the bit error from among the plurality of symbols based on the error detection algorithm; and correcting the bit error in the identified symbol.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: January 6, 2015
    Assignee: Aquantia Corp.
    Inventors: Paul Langner, Ramin Shirani
  • Patent number: 8854986
    Abstract: A communications system and method for switching data rates while maintaining convergence of adaptive components. The data rates can switch between, for example, 10G, 1G, 100M and the like. The adaptive components can include, for example, equalizers, cross-talk filters (e.g., NEXT filters; FEXT filters), transmission drivers, low density parity checks and echo cancellers. The data rate is reduced by maintaining the same symbol rate over a channel, while reducing the number of channels, reducing the symbol alphabet, and zero-filling unused bits in the transmission frame. In addition, full duplex communication can be changed to simplex communication. A usage rotation (e.g., a round robin rotation) switches among different twisted pairs of a communication channel to maintain convergence of the adaptive components. Inactive components can be powered down, or the power can be reduced, in order to reduce the amount of power required for the communications system.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: October 7, 2014
    Assignee: Aquantia Corporation
    Inventors: Paul Langner, Hossein Sederat
  • Patent number: 8745461
    Abstract: Methods and apparatus are provided for N+1 packet level mesh protection. An error correction encoder is provided for encoding message symbols, m0 through mN-1, to generate a codeword that includes the message symbols, m0 through mN-1, and one or more check symbols. The error correction encoder comprises a linear feedback shift register having one or more flip-flops to generate the check symbols after shifting the message symbols, m0 through mN-1, through the linear feedback shift register. An error correction decoder is also provided for decoding a codeword that includes message symbols, m0 through mN-1, and one or more check symbols. The error correction decoder comprises a linear feedback shift register having one or more flip-flops to generate an error symbol based on a remainder after shifting the message symbols, m0 through mN-1, and the one or more check symbols through the linear feedback shift register.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: June 3, 2014
    Assignee: Agere Systems LLC
    Inventor: Paul Langner
  • Patent number: 8675504
    Abstract: An ethernet transceiver integrated circuit chip is disclosed including a plurality of transceivers for coupling to a corresponding plurality of physical channels. A channel switcher is coupled to the plurality of transceivers. During a first mode of operation, the channel switcher activates all of the plurality of transceivers to transceive data in accordance with a first aggregate data transfer rate. During a second mode of operation, the channel switcher activates less than all of the plurality of transceivers to transceive data in accordance with a second aggregate data rate that is less than the first aggregate data transfer rate.
    Type: Grant
    Filed: June 24, 2011
    Date of Patent: March 18, 2014
    Assignee: Aquantia Corporation
    Inventors: Paul Langner, Hossein Sederat
  • Patent number: 8659986
    Abstract: A transceiver system is disclosed. The transceiver system comprises a first transceiver physical layer circuit (PHY) having a first plurality of channels and a second transceiver PHY disposed adjacent the first transceiver PHY and having a second plurality of channels. Filter circuitry is coupled between at least one of the plurality of first channels and at least one of the plurality of second channels.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: February 25, 2014
    Assignee: Aquantia Corporation
    Inventors: Jerry Martinson, Paul Langner, Hossein Sedarat
  • Publication number: 20120317456
    Abstract: Methods and apparatus are provided for N+1 packet level mesh protection. An error correction encoder is provided for encoding message symbols, m0 through mN?1, to generate a codeword that includes the message symbols, m0 through mN?1, and one or more check symbols. The error correction encoder comprises a linear feedback shift register having one or more flip-flops to generate the check symbols after shifting the message symbols, m0 through mN?1, through the linear feedback shift register. An error correction decoder is also provided for decoding a codeword that includes message symbols, m0 through mN?1, and one or more check symbols. The error correction decoder comprises a linear feedback shift register having one or more flip-flops to generate an error symbol based on a remainder after shifting the message symbols, m0 through mN?1, and the one or more check symbols through the linear feedback shift register.
    Type: Application
    Filed: August 22, 2012
    Publication date: December 13, 2012
    Applicant: Agere Systems Inc.
    Inventor: Paul Langner
  • Patent number: 8320411
    Abstract: Fast retraining of communication parameters for a transceiver in a communication network. In one aspect, it is determined that the transceiver has lost the communication link for data communication, and the transceiver receives a signal providing a fast retraining sequence that updates transceiver parameters in order to reacquire the link for the data communication. The fast retraining sequence is performed in a reduced time relative to a full training sequence used for initializing the parameters for data communication by the transceiver.
    Type: Grant
    Filed: October 22, 2009
    Date of Patent: November 27, 2012
    Assignee: Aquantia Corporation
    Inventors: Hossein Sedarat, Paul Langner, Ramin Shirani, Ramin Farjadrad
  • Patent number: 8284007
    Abstract: A magnetic package for a communication system is disclosed the package comprises a plurality of transformers, wherein each transformer comprises a differential transformer. Each differential transformer comprises at least 2 sets of three pins. Each transformer is coupled to a twisted pair channel and a transceiver. The magnetic package includes at least one common mode transformer coupled to at least one of the transformers, wherein the at least one common mode transformer includes at least three pins. The at least three pins for the at least one common mode transformer are in a position relative to the other pins such that the package size is minimized.
    Type: Grant
    Filed: October 22, 2009
    Date of Patent: October 9, 2012
    Assignee: Aquantia Corporation
    Inventors: Paul Langner, Ramin Farjadrad, Ramin Shirani, Jerry A. Martinson, Thomas Wayne Gandy
  • Patent number: 8271847
    Abstract: Methods and apparatus are provided for N+1 packet level mesh protection. An error correction encoding method is provided that assembles M-T data packets; appends a sequence number and a payload integrity check to each of the M-T data packets; and creates T protection packets having the sequence number and payload integrity check, wherein a payload for each of the T protection packets are formed from corresponding symbols in the M-T data packets. An error correction decoding method is also provided that receives a plurality of error-free packets and one or more packets having an error; and reconstructs the one or more packets having an error by applying block erasure decoding to said plurality of error-free packets, whereby one packet having an error can be reconstructed for each protection packet used to encode the received packets.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: September 18, 2012
    Assignee: Agere Systems Inc.
    Inventor: Paul Langner