Patents by Inventor Paul Michael Kozlowski

Paul Michael Kozlowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Self-aligned silicide (salicide) process for strained silicon MOSFET on SiGe and structure formed thereby
    Publication number: 20030068883
    Abstract: A method of forming a semiconductor substrate (and resultant structure), includes providing a semiconductor substrate to be silicided including a source and drain formed therein on respective sides of a gate, depositing a metal film over the gate, source and drain regions, reacting the metal film with Si at a first predetermined temperature, to form a metal-silicon alloy, etching the unreacted metal, depositing a silicon film over the source drain and gate regions, annealing the substrate at a second predetermined temperature, to form a metal-Si2 alloy, and selectively etching the unreacted Si.
    Type: Application
    Filed: November 5, 2002
    Publication date: April 10, 2003
    Applicant: International Business Machines Corporation
    Inventors: Atul Champaklal Ajmera, Cyril Cabral, Roy Arthur Carruthers, Kevin Kok Chan, Guy Moshe Cohen, Paul Michael Kozlowski, Christian Lavoie, Joseph Scott Newbury, Ronnen Andrew Roy
  • Self-aligned silicide (salicide) process for strained silicon MOSFET ON SiGe and structure formed thereby
    Patent number: 6503833
    Abstract: A method of forming a semiconductor substrate (and resultant structure), includes providing a semiconductor substrate to be silicided including a source and drain formed therein on respective sides of a gate, depositing a metal film over the gate, source and drain regions, reacting the metal film with Si at a first predetermined temperature, to form a metal-silicon alloy, etching the unreacted metal, depositing a silicon film over the source drain and gate regions, annealing the substrate at a second predetermined temperature, to form a metal-Si2 alloy, and selectively etching the unreacted Si.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: January 7, 2003
    Assignee: International Business Machines Corporation
    Inventors: Atul Champaklal Ajmera, Cyril Cabral, Jr., Roy Arthur Carruthers, Kevin Kok Chan, Guy Moshe Cohen, Paul Michael Kozlowski, Christian Lavoie, Joseph Scott Newbury, Ronnen Andrew Roy
  • Method and structure for retarding high temperature agglomeration of silicides using alloys
    Publication number: 20020151158
    Abstract: Complementary metal oxide semiconductor (CMOS) devices having metal silicide contacts that withstand the high temperature anneals used in activating the source/drain regions of the devices are provided by adding at least one alloying element to an initial metal layer used in forming the silicide.
    Type: Application
    Filed: June 11, 2002
    Publication date: October 17, 2002
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Cyril Cabral, Roy Arthur Carruthers, James McKell Edwin Harper, Paul Michael Kozlowski, Christian Lavoie, Joseph Scott Newbury, Ronnen Andrew Roy
  • Method and structure for retarding high temperature agglomeration of silicides using alloys
    Patent number: 6413859
    Abstract: Complementary metal oxide semiconductor (CMOS) devices having metal silicide contacts that withstand the high temperature anneals used in activating the source/drain regions of the devices are provided by adding at least one alloying element to an initial metal layer used in forming the silicide.
    Type: Grant
    Filed: March 6, 2000
    Date of Patent: July 2, 2002
    Assignee: International Business Machines Corporation
    Inventors: Cyril Cabral, Jr., Roy Arthur Carruthers, James McKell Edwin Harper, Paul Michael Kozlowski, Christian Lavoie, Joseph Scott Newbury, Ronnen Andrew Roy
  • METHOD AND STRUCTURE FOR RETARDING HIGH TEMPERATURE AGGLOMERATION OF SILICIDES USING ALLOYS
    Publication number: 20020061636
    Abstract: Complementary metal oxide semiconductor (CMOS) devices having metal silicide contacts that withstand the high temperature anneals used in activating the source/drain regions of the devices are provided by adding at least one alloying element to an initial metal layer used in forming the silicide.
    Type: Application
    Filed: March 6, 2000
    Publication date: May 23, 2002
    Inventors: Cyril Cabral, Roy Arthur Carruthers, James McKell Edwin Harper, Paul Michael Kozlowski, Christian Lavoie, Joseph Scott Newbury, Ronnen Andrew Roy