Patents by Inventor Paul Morgan

Paul Morgan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060211260
    Abstract: Differently-sized features of an integrated circuit are formed by etching a substrate using a mask which is formed by combining two separately formed patterns. Pitch multiplication is used to form the relatively small features of the first pattern and conventional photolithography used to form the relatively large features of the second pattern. Pitch multiplication is accomplished by patterning a photoresist and then etching that pattern into an amorphous carbon layer. Sidewall spacers are then formed on the sidewalls of the amorphous carbon. The amorphous carbon is removed, leaving behind the sidewall spacers, which define the first mask pattern. A bottom anti-reflective coating (BARC) is then deposited around the spacers to form a planar surface and a photoresist layer is formed over the BARC. The photoresist is next patterned by conventional photolithography to form the second pattern, which is then is transferred to the BARC.
    Type: Application
    Filed: August 29, 2005
    Publication date: September 21, 2006
    Inventors: Luan Tran, William Rericha, John Lee, Ramakanth Alapati, Sheron Honarkhah, Shuang Meng, Puneet Sharma, Jingyi (Jenny) Bai, Zhiping Yin, Paul Morgan, Mirzafer Abatchev, Gurtej Sandhu, D. Durcan
  • Publication number: 20060201913
    Abstract: A method and composition for removing Group VIII metal-containing materials from a surface (preferably, a platinum-containing, and more preferably, a platinum-rhodium-containing surface) involves the use of a mixture of phosphoric acid, sulfuric acid, nitric acid, and hydrochloric acid.
    Type: Application
    Filed: May 17, 2006
    Publication date: September 14, 2006
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Paul Morgan
  • Patent number: 7096362
    Abstract: A system for authentication to support secure data transfer includes a protocol wherein a certificate payload, an ID payload, and a signature payload all respectively contain at least two certificates, IDs, and signatures, concatenated together. The certificates are generated by different certificate authorities (CA) that have no trust relationship with each other. One certificate can be granted to a person and another to a particular host computer intended to be used by the person, so that for secure data transfer to take place, both a certified user and a certified host computer must be involved.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: August 22, 2006
    Assignee: International Business Machines Corporation
    Inventors: Stephen Paul Morgan, John Irish, Frank Michael Pittelli, Michael David Varga
  • Publication number: 20060180383
    Abstract: A golf car (10) or utility vehicle having a composite body (58). In some aspects of the invention, the golf car or utility vehicle has a composite body assembly that includes a front clam shell assembly (62) and a rear shell-like body (64). In other aspects, the golf car or utility vehicle includes a composite body assembly having a periphery (118) and one or more decorative body panels (106, 108), the decorative body panels being recessed inwardly relative to the composite body assembly periphery to prevent impacts to the panels.
    Type: Application
    Filed: January 23, 2004
    Publication date: August 17, 2006
    Inventors: Steven Bataille, Douglas Crow, David Hardy, Gary Lewis, Paul Morgan, Peter Mulgrew, Duane Newman, Gerald Skelton, Geoff Stewart, Michael Welsh
  • Patent number: 7086769
    Abstract: A signage device (10) in which a housing (12) receives a circuit board (30) having a plurality of spaced-apart light sources (38) to define at least one symbol and overlaid by a message plate (42) having a projecting channel (46) with a translucent light emitting side (54) aligned with the light sources and a light blocking overlay sheet (60) defining an open slot (62) configured for mating reception of the projecting channel, whereby light from the light sources communicates from the light emitting surface of the channel extending from the overlay sheet.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: August 8, 2006
    Assignee: Identity Group, Inc.
    Inventors: Chris Thompson, David C. McFerrin, Joe Counts, Paul Morgan, Timothy J. Thomas
  • Patent number: 7077975
    Abstract: A method and composition for removing Group VIII metal-containing materials from a surface (preferably, a platinum-containing, and more preferably, a platinum-rhodium-containing surface) involves the use of a mixture of phosphoric acid, sulfuric acid, nitric acid, and hydrochloric acid.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: July 18, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Paul A. Morgan
  • Patent number: 7060631
    Abstract: The invention encompasses a semiconductor processing method of cleaning a surface of a copper-containing material by exposing the surface to an acidic mixture comprising Cl?, NO3? and F?. The invention also includes a semiconductor processing method of forming an opening to a copper-containing substrate. Initially, a mass is formed over the copper-containing substrate. The mass comprises at least one of a silicon nitride and a silicon oxide. An opening is etched through the mass and to the copper-containing substrate. A surface of the copper-containing substrate defines a base of the opening, and is referred to as a base surface. The base surface of the copper-containing substrate is at least partially covered by at least one of a copper oxide, a silicon oxide or a copper fluoride.
    Type: Grant
    Filed: May 16, 2005
    Date of Patent: June 13, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Paul A. Morgan
  • Patent number: 7023099
    Abstract: A method of removing organic particles from a registration mark on a semiconductor wafer. The method comprises providing a semiconductor wafer comprising at least one registration mark at least partially filled with organic particles. The at least one registration mark has a trench width from approximately 1.0 ?m to approximately 3.0 ?m. The semiconductor wafer is exposed to a cleaning solution comprising tetramethylammonium hydroxide and at least one surfactant, such as an acetylenic diol surfactant. The semiconductor wafer is exposed to an ultrasonic or megasonic vibrational energy. A semiconductor wafer previously subjected to a chemical mechanical planarization treatment and having a reduced amount of organic particles in a registration mark is also disclosed.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: April 4, 2006
    Assignee: Micron Technology, INC
    Inventors: Michael T. Andreas, Paul A. Morgan
  • Publication number: 20060043534
    Abstract: Microfeature dies with porous regions, and associated methods and systems are disclosed. A method in accordance with one embodiment of the invention includes forming a porous region between a die and a remainder portion of a microfeature workpiece, and separating the die from the remainder portion by removing at least a portion of the porous region. For example, the die can be removed from the remainder portion by making a cut at the porous region (e.g., with a rotating saw blade), etching material from the porous region, or directing a water jet at the porous region. In other embodiments, a porous region of the microfeature workpiece can receive conductive material to form a conductive pathway (e.g., a line and/or via) in the workpiece. In still further embodiments, the porous regions of the workpiece can be formed electrolytically with electrodes that are spaced apart from the workpiece and/or support relative movement between the electrodes and the workpiece.
    Type: Application
    Filed: August 26, 2004
    Publication date: March 2, 2006
    Inventors: Kyle Kirby, Paul Morgan
  • Publication number: 20050282301
    Abstract: Improved methods and structures are provided for an array of vertical geometries which may be used as emitter tips, as a self aligned gate structure surrounding field emitter tips, or as part of a flat panel display. The present invention offers controlled size in emitter tip formation under a more streamlined process. The present invention further provides a more efficient method to control the gate to emitter tip proximity in field emission devices. The novel method of the present invention includes implanting a dopant in a patterned manner into the silicon substrate and anodizing the silicon substrate in a controlled manner causing a more heavily doped region in the silicon substrate to form a porous silicon region.
    Type: Application
    Filed: August 23, 2005
    Publication date: December 22, 2005
    Inventors: Terry Gilton, Paul Morgan
  • Patent number: 6955995
    Abstract: The invention encompasses a semiconductor processing method of cleaning a surface of a copper-containing material by exposing the surface to an acidic mixture comprising Cl?, NO3? and F?. The invention also includes a semiconductor processing method of forming an opening to a copper-containing substrate. Initially, a mass is formed over the copper-containing substrate. The mass comprises at least one of a silicon nitride and a silicon oxide. An opening is etched through the mass and to the copper-containing substrate. A surface of the copper-containing substrate defines a base of the opening, and is referred to as a base surface. The base surface of the copper-containing substrate is at least partially covered by at least one of a copper oxide, a silicon oxide or a copper fluoride.
    Type: Grant
    Filed: October 10, 2003
    Date of Patent: October 18, 2005
    Assignee: Mircon Technology, Inc.
    Inventor: Paul A. Morgan
  • Publication number: 20050217696
    Abstract: A method for cleaning substrates to remove Group VIII metal-containing, particularly platinum-containing, residue using a cleaning composition that includes a peroxide-generating compound.
    Type: Application
    Filed: May 24, 2005
    Publication date: October 6, 2005
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Paul Morgan
  • Patent number: 6952360
    Abstract: An MRAM cell and a method of forming the an MRAM cell minimizes the occurrence of electrical shorts along the side walls of the stacked cell structure during fabrication. Specifically, a first conductor is provided in a trench in an insulating layer, and then an upper surface of the insulating layer and the first conductor are planarized. Next, as the layers forming the stacks of the MRAM cells are deposited on the planarized insulating layer and first conductor, the critical layers are physically separated from adjacent layers at regions surrounding an interior region of the stacked layers. The stacked layers at the interior region form an MRAM cell, while the separated edges prevent conductive layers from being formed along the sidewalls of the MRAM cell due to sputtering during the etching process(es) performed to define the cell.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: October 4, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Paul A. Morgan
  • Publication number: 20050215064
    Abstract: The invention encompasses a semiconductor processing method of cleaning a surface of a copper-containing material by exposing the surface to an acidic mixture comprising Cl?, NO3? and F?. The invention also includes a semiconductor processing method of forming an opening to a copper-containing substrate. Initially, a mass is formed over the copper-containing substrate. The mass comprises at least one of a silicon nitride and a silicon oxide. An opening is etched through the mass and to the copper-containing substrate. A surface of the copper-containing substrate defines a base of the opening, and is referred to as a base surface. The base surface of the copper-containing substrate is at least partially covered by at least one of a copper oxide, a silicon oxide or a copper fluoride.
    Type: Application
    Filed: May 16, 2005
    Publication date: September 29, 2005
    Inventor: Paul Morgan
  • Publication number: 20050198401
    Abstract: A method and structure for communicating in a communications network comprising at least one communication virtualizer; a plurality of network-attached store computers connected to the communication virtualizer, wherein the plurality of network-attached store computers are configured to appear as a single available network-attached store computer; and at least one client computer connected to the communication virtualizer.
    Type: Application
    Filed: January 29, 2004
    Publication date: September 8, 2005
    Inventors: Edward Chron, Paul Morgan, Lance Russell
  • Patent number: 6933665
    Abstract: Improved methods and structures are provided for an array of vertical geometries which may be used as emitter tips, as a self aligned gate structure surrounding field emitter tips, or as part of a flat panel display. The present invention offers controlled size in emitter tip formation under a more streamlined process. The present invention further provides a more efficient method to control the gate to emitter tip proximity in field emission devices. The novel method of the present invention includes implanting a dopant in a patterned manner into the silicon substrate and anodizing the silicon substrate in a controlled manner causing a more heavily doped region in the silicon substrate to form a porous silicon region.
    Type: Grant
    Filed: July 9, 2002
    Date of Patent: August 23, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Terry L. Gilton, Paul A. Morgan
  • Patent number: 6930017
    Abstract: A method of removing organic particles from a registration mark on a semiconductor wafer. The method comprises providing a semiconductor wafer comprising at least one registration mark at least partially filled with organic particles. The at least one registration mark has a trench width from approximately 1.0 ?m to approximately 3.0 ?m. The semiconductor wafer is exposed to a cleaning solution comprising tetramethylammonium hydroxide and at least one surfactant, such as an acetylenic diol surfactant. The semiconductor wafer is exposed to an ultrasonic or megasonic vibrational energy. A semiconductor wafer previously subjected to a chemical mechanical planarization treatment and having a reduced amount of organic particles in a registration mark is also disclosed.
    Type: Grant
    Filed: August 21, 2003
    Date of Patent: August 16, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Michael T. Andreas, Paul A. Morgan
  • Patent number: 6905974
    Abstract: A method for cleaning substrates to remove Group VIII metal-containing, particularly platinum-containing, residue using a cleaning composition that includes a peroxide-generating compound.
    Type: Grant
    Filed: August 8, 2002
    Date of Patent: June 14, 2005
    Assignee: Micron Technology, Inc.
    Inventor: Paul A. Morgan
  • Patent number: 6867148
    Abstract: Organic acid components are used to increase the solubility of ozone in aqueous solutions for use in removing organic materials, such as polymeric resist and/or post-etch residues, from the surface of an integrated circuit device during fabrication. Each organic acid component is preferably chosen for its metal-passivating effect. Such solutions can have significantly lower corrosion rates when compared to ozonated aqueous solutions using common inorganic acids for ozone solubility enhancement due to the passivating effect of the organic acid component.
    Type: Grant
    Filed: May 16, 2001
    Date of Patent: March 15, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Donald L. Yates, Paul A. Morgan
  • Publication number: 20050040443
    Abstract: A method of removing organic particles from a registration mark on a semiconductor wafer. The method comprises providing a semiconductor wafer comprising at least one registration mark at least partially filled with organic particles. The at least one registration mark has a trench width from approximately 1.0 ?m to approximately 3.0 ?m. The semiconductor wafer is exposed to a cleaning solution comprising tetramethylammonium hydroxide and at least one surfactant, such as an acetylenic diol surfactant. The semiconductor wafer is exposed to an ultrasonic or megasonic vibrational energy. A semiconductor wafer previously subjected to a chemical mechanical planarization treatment and having a reduced amount of organic particles in a registration mark is also disclosed.
    Type: Application
    Filed: August 25, 2004
    Publication date: February 24, 2005
    Inventors: Michael Andreas, Paul Morgan