Abstract: Devices and methods are described herein for a pulse amplitude modulation (PAM) driver. In one embodiment, the PAM driver includes a first high-speed buffer configured to output a first voltage, a second high-speed buffer configured to output a second voltage, and a plurality of transistors coupled to the first high-speed buffer and the second high-speed buffer. At least one of the first voltage or the second voltage facilitates selective operation of a transistor of the plurality of transistors to output a third voltage.

Abstract: Devices and methods are described herein for a pulse amplitude modulation (PAM) driver. In one embodiment, the PAM driver includes a first high-speed buffer configured to output a first voltage, a second high-speed buffer configured to output a second voltage, and a plurality of transistors coupled to the first high-speed buffer and the second high-speed buffer. At least one of the first voltage or the second voltage facilitates selective operation of a transistor of the plurality of transistors to output a third voltage.

Abstract: A semiconductor structure includes a first substrate. A first die and a second die are disposed over the first substrate and are adjacent to one another. A plurality of first conductive bumps are disposed between the first substrate and the first die and between the first substrate and the second die. A second substrate is disposed below the first substrate. A plurality of second conductive bumps is disposed between the first substrate and the second substrate. An in-package voltage regulator (PVR) chip is disposed over the second substrate. A molding material is disposed over the first substrate and surrounds the first die, the second die, the plurality of first conductive bumps, the plurality of second conductive bumps, and the PVR chip.

Abstract: A semiconductor structure includes a first substrate. A first die and a second die are disposed over the first substrate and are adjacent to one another. A plurality of first conductive bumps are disposed between the first substrate and the first die and between the first substrate and the second die. A second substrate is disposed below the first substrate. A plurality of second conductive bumps is disposed between the first substrate and the second substrate. An in-package voltage regulator (PVR) chip is disposed over the second substrate. A molding material is disposed over the first substrate and surrounds the first die, the second die, the plurality of first conductive bumps, the plurality of second conductive bumps, and the PVR chip.

Abstract: Various magnetic thin film inductor structures are disclosed that include one or more magnetic thin film (MTF) materials. During operation, an electric field passes through one or mare conductive windings which, in turn, generates a magnetic field for storing energy within these magnetic thin film inductor structures. The magnetic thin film (MTF) materials within these magnetic thin film inductor structures effectively attract magnetic flux lines of this magnetic field. As a result, any magnetic leakage resulting from the magnetic field generated by these magnetic thin film inductor structures onto nearby electrical, mechanical, and/or electro-mechanical devices is lessened when compared to magnetic leakage resulting from the magnetic field generated by other inductor structures not having the one or more MTF materials.

Abstract: A device includes a semiconductor die. The semiconductor die has formed thereon a plurality of multi-phase voltage regulator modules of the same design formed on a common semiconductor substrate.

Abstract: A semiconductor structure includes a first substrate. A first die and a second die are disposed over the first substrate and are adjacent to one another. A plurality of first conductive bumps are disposed between the first substrate and the first die and between the first substrate and the second die. A second substrate is disposed below the first substrate. A plurality of second conductive bumps is disposed between the first substrate and the second substrate. An in-package voltage regulator (PVR) chip is disposed over the second substrate. A molding material is disposed over the first substrate and surrounds the first die, the second die, the plurality of first conductive bumps, the plurality of second conductive bumps, and the PVR chip.

Abstract: A current sensor circuit is provided. The circuit includes a voltage integration circuit connected in parallel to an inductive element. The voltage integration circuit is configured to integrate an inductive element current through the inductive element between a first potential at a first end of the inductive element and a second potential a second end of the inductive element. The voltage integration circuit provides a voltage analog of the inductive element current. A voltage current convertor circuit is electrically connected to the voltage integration circuit. The voltage current convertor circuit is configured to convert the voltage analog of the voltage integration circuit to an output current that is proportional to the inductive element current.

Abstract: A device includes a semiconductor die. The semiconductor die has formed thereon a plurality of multi-phase voltage regulator modules of the same design formed on a common semiconductor substrate.

Abstract: A device includes a semiconductor die. The semiconductor die has formed thereon a plurality of multi-phase voltage regulator modules of the same design formed on a common semiconductor substrate.

Abstract: A current sensor circuit is provided. The circuit includes a voltage integration circuit connected in parallel to an inductive element. The voltage integration circuit is configured to integrate an inductive element current through the inductive element between a first potential at a first end of the inductive element and a second potential a second end of the inductive element. The voltage integration circuit provides a voltage analog of the inductive element current. A voltage current convertor circuit is electrically connected to the voltage integration circuit. The voltage current convertor circuit is configured to convert the voltage analog of the voltage integration circuit to an output current that is proportional to the inductive element current.

Abstract: A device includes a semiconductor die. The semiconductor die has formed thereon a plurality of multi-phase voltage regulator modules of the same design formed on a common semiconductor substrate.

Abstract: A current sensor circuit is provided. The circuit includes a voltage integration circuit connected in parallel to an inductive element. The voltage integration circuit is configured to integrate an inductive element current through the inductive element between a first potential at a first end of the inductive element and a second potential a second end of the inductive element. The voltage integration circuit provides a voltage analog of the inductive element current. A voltage current convertor circuit is electrically connected to the voltage integration circuit. The voltage current convertor circuit is configured to convert the voltage analog of the voltage integration circuit to an output current that is proportional to the inductive element current.

Abstract: A device includes a semiconductor die. The semiconductor die has formed thereon a plurality of multi-phase voltage regulator modules of the same design formed on a common semiconductor substrate.

Abstract: A device includes a semiconductor die. The semiconductor die has formed thereon a plurality of multi-phase voltage regulator modules of the same design formed on a common semiconductor substrate.

Abstract: A device includes a semiconductor die. The semiconductor die has formed thereon a plurality of multi-phase voltage regulator modules of the same design formed on a common semiconductor substrate.

Abstract: A device includes a semiconductor die. The semiconductor die has formed thereon a plurality of multi-phase voltage regulator modules of the same design formed on a common semiconductor substrate.

Abstract: A current sensor circuit is provided. The circuit includes a voltage integration circuit connected in parallel to an inductive element. The voltage integration circuit is configured to integrate an inductive element current through the inductive element between a first potential at a first end of the inductive element and a second potential a second end of the inductive element. The voltage integration circuit provides a voltage analog of the inductive element current. A voltage current convertor circuit is electrically connected to the voltage integration circuit. The voltage current convertor circuit is configured to convert the voltage analog of the voltage integration circuit to an output current that is proportional to the inductive element current.

Abstract: A system and method is disclosed for providing communication of an over-current protection signal and current mode control signals between a controller chip and a power chip in an integrated circuit device that comprises a plurality of integrated circuit chips. The controller chip sends pulse width modulation signals and a reference current signal to the power chip. Current flow status detection circuitry in the power chip detects a current flow status in the power chip and provides a current flow status signal to the controller chip. The current flow status signal may comprise an over-current protection signal or current mode control signals. One advantageous embodiment of the invention comprises a switch mode power supply integrated circuit.

Abstract: The present invention provides a versatile system for producing sense transistors having optimized thermal and parametric matching with an associated power transistor. A power transistor is formed, having a plurality of alternating source and drain structures, with a plurality of gate structures interposed there between. At a desired location within the power transistor—which may be in a central location, or symmetrically distributed—one or more sense transistors are formed from an isolated portion of either a drain or source structure.