Abstract: A bonded structure contains a substrate containing at least one feature, the substrate having a top surface; a first release layer overlying the top surface of the substrate, the first release layer being absorptive of light having a first wavelength for being decomposed by the light; an adhesive layer overlying the first release layer, and a second release layer overlying the adhesive layer. The second release layer is absorptive of light having a second wavelength for being decomposed by the light having the second wavelength. The bonded structure further contains a handle substrate that overlies the second release layer, where the handle substrate is substantially transparent to the light having the first wavelength and the second wavelength. Also disclosed is a debonding method to process the bonded structure to remove and reclaim the adhesive layer for re-use. In another embodiment a multi-step method optically cuts and debonds a bonded structure.

Abstract: A microsystem with an integrated energy source serves as a platform and ecosystem for a variety of microsystems for implanting into human tissue. The microsystem includes a flexible battery located in an enclosed void. The enclosed void is formed by joining a first dielectric element with a second dielectric element.

Abstract: A switching power supply in an integrated circuit, an integrated circuit comprising a switching power supply, and a method of assembling a switching power supply in an integrated circuit are disclosed. In one embodiment, the invention provides a three-dimensional switching power supply in an integrated circuit comprising a device layer. The switching power supply comprises three distinct strata arranged in series with the device layer, the three distinct strata including a switching layer including switching circuits, a capacitor layer including banks of capacitors, and an inductor layer including inductors. This switching power supply further comprises a multitude of connectors electrically and mechanically connecting together the device layer, the switching layer, the capacitor layer, and the inductor layer. The switching circuits, the capacitors and the inductors form a switching power supply for supplying power to the device layer.

Abstract: Deep reactive ion silicon etching of a device wafer, laser-induced release of individual dies, and individual placement of the dies on flexible substrates facilitate formation of circuits having relatively large external inductors for powering devices such as RFID devices. Small flexible tabs enable die-inductor connection. The absorption properties of both an adhesive layer and an ablation layer may be employed to facilitate debonding of individual dies from a glass handler without damaging integrated circuits associated with the dies. Die packs including cavities for accepting individual dies facilitate fabrication processes using dies having small dimensions.

Abstract: Deep reactive ion silicon etching of a device wafer, laser-induced release of individual dies, and individual placement of the dies on flexible substrates facilitate formation of circuits having relatively large external inductors for powering devices such as RFID devices. Small flexible tabs enable die-inductor connection. The absorption properties of both an adhesive layer and an ablation layer may be employed to facilitate debonding of individual dies from a glass handler without damaging integrated circuits associated with the dies. Die packs including cavities for accepting individual dies facilitate fabrication processes using dies having small dimensions.

Abstract: A method for adhesive bonding in microelectronic device processing is provided that includes bonding a handling wafer to a front side of a device wafer with an adhesive comprising phenoxy resin; and thinning the device wafer from the backside of the device wafer while the device wafer is adhesively engaged to the handling wafer. After the device wafer has been thinned, the adhesive comprising phenoxy resin may be removed by laser debonding, wherein the device wafer is separated from the handling wafer.

Abstract: A method of forming an integrated circuit assembly includes forming an insulator layer on a preliminary semiconductor assembly. The preliminary semiconductor assembly includes a semiconductor substrate having a first side and a second side opposite the first side, a semiconductor circuitry layer formed on the first side of the semiconductor substrate, and a conductive via extending through the semiconductor substrate from the semiconductor circuitry layer to the second side. The insulator is formed on the second side and an end of the conductive via. The method includes forming a polymer layer on the insulator layer, removing a quantity of the polymer layer sufficient to expose the end of the conductive via through the insulator layer, and forming a conductive contact on the polymer layer and the end of the conductive via.

Abstract: A method for adhesive bonding in microelectronic device processing is provided that includes bonding a handling wafer to a front side of a device wafer with an adhesive comprising phenoxy resin; and thinning the device wafer from the backside of the device wafer while the device wafer is adhesively engaged to the handling wafer. After the device wafer has been thinned, the adhesive comprising phenoxy resin may be removed by laser debonding, wherein the device wafer is separated from the handling wafer.

Abstract: The absorption properties of both an adhesive layer and an ablation layer are employed to facilitate debonding of a device wafer and a glass handler without damaging the device wafer. The penetration depths of the adhesive and ablation layers are selected such that no more than a negligible amount of the ablation fluence reaches the surface of the device wafer.

Abstract: The absorption properties of both an adhesive layer and an ablation layer are employed to facilitate debonding of a device wafer and a glass handler without damaging the device wafer. The penetration depths of the adhesive and ablation layers are selected such that no more than a negligible amount of the ablation fluence reaches the surface of the device wafer.

Abstract: A bonded structure contains a substrate containing at least one feature, the substrate having a top surface; a first release layer overlying the top surface of the substrate, the first release layer being absorptive of light having a first wavelength for being decomposed by the light; an adhesive layer overlying the first release layer, and a second release layer overlying the adhesive layer. The second release layer is absorptive of light having a second wavelength for being decomposed by the light having the second wavelength. The bonded structure further contains a handle substrate that overlies the second release layer, where the handle substrate is substantially transparent to the light having the first wavelength and the second wavelength. Also disclosed is a debonding method to process the bonded structure to remove and reclaim the adhesive layer for re-use. In another embodiment a multi-step method optically cuts and debonds a bonded structure.

Abstract: A method for adhesive bonding in microelectronic device processing is provided that includes bonding a handling wafer to a front side of a device wafer with an adhesive comprising phenoxy resin; and thinning the device wafer from the backside of the device wafer while the device wafer is adhesively engaged to the handling wafer. After the device wafer has been thinned, the adhesive comprising phenoxy resin may be removed by laser debonding, wherein the device wafer is separated from the handling wafer.

Abstract: CMOS structures with a replacement substrate and methods of manufacture are disclosed herein. The method includes forming a device on a temporary substrate. The method further includes removing the temporary substrate. The method further includes bonding a permanent electrically insulative substrate to the device with a bonding structure.

Abstract: A method for adhesive bonding in microelectronic device processing is provided that includes bonding a handling wafer to a front side of a device wafer with an adhesive comprising phenoxy resin; and thinning the device wafer from the backside of the device wafer while the device wafer is adhesively engaged to the handling wafer. After the device wafer has been thinned, the adhesive comprising phenoxy resin may be removed by laser debonding, wherein the device wafer is separated from the handling wafer.

Abstract: A switching power supply in an integrated circuit, an integrated circuit comprising a switching power supply, and a method of assembling a switching power supply in an integrated circuit are disclosed. In one embodiment, the invention provides a three-dimensional switching power supply in an integrated circuit comprising a device layer. The switching power supply comprises three distinct strata arranged in series with the device layer, the three distinct strata including a switching layer including switching circuits, a capacitor layer including banks of capacitors, and an inductor layer including inductors. This switching power supply further comprises a multitude of connectors electrically and mechanically connecting together the device layer, the switching layer, the capacitor layer, and the inductor layer. The switching circuits, the capacitors and the inductors form a switching power supply for supplying power to the device layer.

Abstract: A structure fabrication method. An integrated circuit that includes N chip electric pads is bonded to a top side of an interposing shield that includes N electric conductors. N is at least 2. The interposing shield includes a shield material that includes a first semiconductor material. A bottom side of the interposing shield is polished, which exposes the N electric conductors to a surrounding ambient. The bonding includes bonding the integrated circuit to the top side of the interposing shield such that the N chip electric pads are in electrical contact and direct physical contact with corresponding electrical pads of the N electric conductors. The shield material covers the N electric conductors in a manner that the N electric conductors are not exposed to the surrounding ambient. The polishing removes a sufficient amount of the shield material to expose the N electric conductors to the surrounding ambient.

Abstract: Embodiments of the invention include a method for shaping a flexible integrated circuit to a curvature and the resulting structure. A flexible circuit is provided. An epoxy resin and amine composition is deposited on the flexible integrated circuit. The deposited epoxy resin and amine composition is B-staged. The flexible integrated circuit is placed within a mold of a curvature. The B-staged epoxy resin and amine composition is cured subsequent to placing the flexible integrated circuit within the mold of the curvature.

Abstract: A method of forming an integrated circuit assembly includes forming an insulator layer on a preliminary semiconductor assembly. The preliminary semiconductor assembly includes a semiconductor substrate having a first side and a second side opposite the first side, a semiconductor circuitry layer formed on the first side of the semiconductor substrate, and a conductive via extending through the semiconductor substrate from the semiconductor circuitry layer to the second side. The insulator is formed on the second side and an end of the conductive via. The method includes forming a polymer layer on the insulator layer, removing a quantity of the polymer layer sufficient to expose the end of the conductive via through the insulator layer, and forming a conductive contact on the polymer layer and the end of the conductive via.

Abstract: A method of forming an integrated circuit assembly includes forming an insulator layer on a preliminary semiconductor assembly. The preliminary semiconductor assembly includes a semiconductor substrate having a first side and a second side opposite the first side, a semiconductor circuitry layer formed on the first side of the semiconductor substrate, and a conductive via extending through the semiconductor substrate from the semiconductor circuitry layer to the second side. The insulator is formed on the second side and an end of the conductive via. The method includes forming a polymer layer on the insulator layer, removing a quantity of the polymer layer sufficient to expose the end of the conductive via through the insulator layer, and forming a conductive contact on the polymer layer and the end of the conductive via.

Abstract: Transferable probe tips including a metallic probe, a delamination layer covering a portion of the metallic probe, and a bonding alloy, wherein the bonding alloy contacts the metallic probe at a portion of the probe that is not covered by the delamination layer are provided herein. Also, techniques for creating a transferable probe tip are provided, including etching a handler substrate to form one or more via arrays, depositing a delamination layer in each via array, depositing one or more metals in each via array to form a probe tip structure, and depositing a bonding alloy on a portion of the probe tip structure that is not covered by the delamination layer. Additionally, techniques for transferring transferable probe tips are provided, including removing a handler substrate from a probe tip structure, and transferring the probe tip structure via flip-chip joining the probe tip structure to a target probe head substrate.