Abstract: A computer-implemented method of automatically generating an embedded system on the basis of an original computer program, comprising analyzing the original computer program, comprising a step of compiling the original computer program into an executable to obtain data flow graphs with static data dependencies and a step of executing the executable using test data to provide dynamic data dependencies as communication patterns between load and store operations of the original computer program, and a step of transforming the original computer program into an intermediary computer program that exhibits multi-threaded parallelism with inter-thread communication, which comprises identifying at least one static and/or dynamic data dependency that crosses a thread boundary and converting said data dependency into a buffered communication channel with read/write access.

Abstract: Disclosed is a light source having a plurality of light elements and a control system for controlling the light elements. The control system includes a plurality of light element controllers, each connected to a respective light element, and arranged to obtain light element data; and a bus interface, which is connected to the light element controllers via a light source bus. The bus interface provides the light element controllers with a general command, and the light element controllers generate light element drive signals on basis of the general command and the light element data.

Abstract: A method of generating an embedded system (4999) from an original computer program (996) which embedded system (4999) provides a parallellized hardware (4598) and software (4599) implementation of the original computer program (996), which parallellized implementation (4598, 4599) satisfies one or more criteria regarding hardware constraints of the embedded system (4999). The system provides partitioning of functionality from the original computer program (996) using structural and behavioral program models and detects streaming and memory dependencies to improve the partitioning, relying on added indications of source lines and variables in said original computer program to relate partitions and dependencies in the program model with locations in the original program source code.

Abstract: A computer-implemented method of automatically generating an embedded system on the basis of an original computer program, comprising analyzing the original computer program, comprising a step of compiling the original computer program into an executable to obtain data flow graphs with static data dependencies and a step of executing the executable using test data to provide dynamic data dependencies as communication patterns between load and store operations of the original computer program, and a step of transforming the original computer program into an intermediary computer program that exhibits multi-threaded parallelism with inter-thread communication, which comprises identifying at least one static and/or dynamic data dependency that crosses a thread boundary and converting said data dependency into a buffered communication channel with read/write access.

Abstract: Method and system for translating a function in a computer programming language into a non-native instruction set, as part of a program that is otherwise in a native instruction set computer program. The method comprises translating the function into the non-native instruction set, prefixing the translated function with a preamble in the native instruction set format that implements the required conversion and non-native instruction set interpretation when called from native code segments, and incorporating into the translated function and/or the preamble a means of identifying the function as being in the non-native instruction set.

Abstract: Disclosed is a light source having a plurality of light elements and a control system for controlling the light elements. The control system includes a plurality of light element controllers, each connected to a respective light element, and arranged to obtain light element data; and a bus interface, which is connected to the light element controllers via a light source bus. The bus interface provides the light element controllers with a general command, and the light element controllers generate light element drive signals on basis of the general command and the light element data.

Abstract: Light source having a plurality of light elements (207) and a control system for controlling the light elements. The control system comprises a plurality of light element controllers (213), each connected to a respective light element (207), and arranged to obtain light element data; and a bus interface (203), which is connected to the light element controllers (213) via a light source bus (209). The bus interface (203) provides the light element controllers (213) with a general command, and the light element controllers generate light element drive signals on basis of the general command and the light element data.

Abstract: A light source having a plurality of light elements and a control system for controlling the light elements. The control system comprises a plurality of light element controllers, each connected to a respective light element, and arranged to obtain light element data; and a bus interface, which is connected to the light element controllers via a light source bus. The bus interface provides the light element controllers with a general command, and the light element controllers generate light element drive signals on basis of the general command and the light element data.

Abstract: A method of generating an embedded system (4999) from an original computer program (996) which embedded system (4999) provides a parallellized hardware (4598) and software (4599) implementation of the original computer program (996), which parallellized implementation (4598, 4599) satisfies one or more criteria regarding hardware constraints of the embedded system (4999). The system provides partitioning of functionality from the original computer program (996) using structural and behavioral program models and detects streaming and memory dependencies to improve the partitioning, relying on added indications of source lines and variables in said original computer program to relate partitions and dependencies in the program model with locations in the original program source code.

Abstract: A computer-implemented method of automatically generating an embedded system on the basis of an original computer program, comprising analyzing the original computer program, comprising a step of compiling the original computer program into an executable to obtain data flow graphs with static data dependencies and a step of executing the executable using test data to provide dynamic data dependencies as communication patterns between load and store operations of the original computer program, and a step of transforming the original computer program into an intermediary computer program that exhibits multi-threaded parallelism with inter-thread communication, which comprises identifying at least one static and/or dynamic data dependency that crosses a thread boundary and converting said data dependency into a buffered communication channel with read/write access.

Abstract: Light source having a plurality of light elements (207) and a control system for controlling the light elements. The control system comprises a plurality of light element controllers (213), each connected to a respective light element (207), and arranged to obtain light element data; and a bus interface (203), which is connected to the light element controllers (213) via a light source bus (209). The bus interface (203) provides the light element controllers (213) with a general command, and the light element controllers generate light element drive signals on basis of the general command and the light element data.

Abstract: An integrated circuit is provided with at least one processing unit (TM), a cache memory (L2 BANK) having a plurality of memory modules, and remapping means (RM) for performing an unrestricted remapping within said plurality of memory modules. Accordingly, faulty modules can be remapped without limitations in order to optimise the utilization of the memory modules by providing an even distribution of the faulty modules.

Abstract: A data processing system includes a first interrupt controller with an interrupt source interface, an interrupt controller interface, a prioritizer, and an interrupt controller output. The data processing system further includes a processing unit providing an interrupt controller interface. Interrupt requests generated by a first plurality of interrupt sources, a second selected interrupt request, a second priority signal, and a second interrupt source index signal generated by a second interrupt controller are received by the first interrupt controller. From the plurality of interrupt requests and the second selected interrupt request, a first single interrupt request is selected and transmitted to the processing unit along with a first priority signal, and a first index signal. The processing unit initiates an appropriate interrupt service routine on the basis of said first index signal.

Abstract: This invention relates to a light source (201) having a plurality of light elements (207) and a control system for controlling the, light elements. The control system comprises a plurality of light element controllers (213), each connected to a respective light element (207), and arranged to obtain light element data; and a bus interface (203), which is connected to the light element controllers (213) via a light source bus (209). The bus interface (203) provides the light element controllers (213) with a general command, and the light element controllers (213) generate light element drive signals on basis of the general command and the light element data.

Abstract: An integrated circuit is provided with at least one processing unit (TM), a cache memory (L2 BANK) having a plurality of memory modules, and remapping means (RM) for performing an unrestricted remapping within said plurality of memory modules. Accordingly, faulty modules can be remapped without limitations in order to optimise the utilization of the memory modules by providing an even distribution of the faulty modules.

Abstract: The invention is based on the idea that for a large data structure with N entries, memory space for the locks corresponding to the entries can be saved by performing a hashing function on a value that represents an entry into a hashed value 1 to M. This hashed value is used to index the table of M locks. The value of M is typically much smaller than the value of N thereby reducing memory space requirements. If M is chosen large enough and a good hashing function is selected, problems with collisions will be very small. Additionally, problems relating to deadlock occurring, when the hashed value of a second entry equals the hashed value of a first entry, are being addressed by swapping the hashed values of the first and second entries, when the hashed value of the second entry is smaller than the hashed value of the first entry.

Abstract: The invention is based on the idea to maintain two counters for an input or output port of a FIFO. A device for writing data elements from a coprocessor into a FIFO memory is provided. Said device is embedded in a multiprocessing environment comprising at least one coprocessor, a FIFO memory and a controller. Said device comprises a first counter for counting the available room in said FIFO memory, and a second counter for counting the number of data elements written into said FIFO memory. Said device further comprises a control means for checking said first counter for available room in said FIFO memory, and for checking said second counter whethera predetermined number N of data elements have been written into said FIFO memory. Said control means decrements the count of said first counter and increments the count of said second counter, after a data element has been written into said FIFO memory. Said device finally comprises an output means for outputting data elements to said FIFO memory.

Abstract: An instruction execution device and method are disclosed for reducing register write traffic within a processor. The instruction execution device includes an instruction pipeline for producing a result for an instruction, a register file that includes at least one write port for storing the result, a bypass circuit for allowing access to the result, a means for indicating whether the result is used by only one other instruction, and a register file control for preventing the result from being stored in the write port when the result has been accessed via the bypass circuit and is used by only one other instruction.

Abstract: An instruction execution device and method are disclosed for reducing register write traffic within a processor with exception routines. The instruction execution device includes an instruction pipeline for producing a result for an instruction, wherein the exception routines may interrupt the instruction pipeline a random intervals, a register file that includes at least one write port for storing the result, a bypass circuit for allowing access to the result, a means for indicating whether the result is used by only one other instruction, a register file control for preventing the result from being stored in the write port when the result has been accessed via the bypass circuit and is used by only one other instruction, a First in First out (FIFO) buffer for storing the result and a FIFO control for writing the contents of the FIFO buffer to the register file when an exception occurs.

Abstract: The invention is based on the idea that for a large data structure with N entries, memory space for the locks corresponding to said entries can be saved by performing a hashing function on a value that represents an entry into a hashed value 1 to M. This hashed value is used to index the table of M locks. The value of M is typically much smaller than the value of N thereby reducing memory space requirements. If M is chosen large enough and a good hashing function is selected problems with collisions will be very small. Additionally, problems relating to deadlock occurring, when the hashed value of a second entry equals the hashed value of the a first entry, are being addressed by swapping said hashed values of said first and second entry, when the hashed value of the second entry is smaller than the hashed value of the first entry.