Patents by Inventor Paul Tervo
Paul Tervo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7068057Abstract: A low-current pogo probe card for measuring currents down to the femtoamp region includes a laminate board having a layer of conductive traces interposed between two dielectric layers. A plurality of probing devices, such as ceramic blades, are edge-mounted about a central opening so that the probing needles or needles included therein terminate below the opening in a pattern suitable for probing a test subject workpiece. A plurality of pogo pin receiving pad sets, each including a guard pad, occupy the periphery of the board. Each guard pad is electrically connected to a trace from the layer of conductive traces. The pad sets may be connected to the probing devices by low noise cables or traces. Air trenches separate the pad sets for reducing cross talk and signal settling times.Type: GrantFiled: January 5, 2005Date of Patent: June 27, 2006Assignee: Cascade Microtech, Inc.Inventors: Paul A. Tervo, Clarence E. Cowan
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Publication number: 20060132157Abstract: A wafer probe station is equipped with an integrated environment control enclosure substantially surrounding a supporting surface for holding a test device, such enclosure limiting fluid communication between the interior and exterior of the enclosure and preferably also providing EMI shielding and a dark environment. The limited communication between the interior and exterior of the enclosure is kept substantially constant despite positioning movement of either the supporting surface or probes. The positioning mechanisms for the supporting surface and probes each are located at least partially outside of the enclosure.Type: ApplicationFiled: December 22, 2005Publication date: June 22, 2006Inventors: Warren Harwood, Paul Tervo, Martin Koxxy
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Patent number: 7042241Abstract: A probe card includes a plurality of probes, where each probe is supported by the probe card. A plurality of landings are on the top of the probe card. Each of the landings is electrically interconnected with a coaxial cable that is also associated with one of the probes. A plurality of trenches defined by the probe card substantially encircles respective landings.Type: GrantFiled: September 22, 2004Date of Patent: May 9, 2006Assignee: Cascade Microtech, Inc.Inventors: Paul A. Tervo, Clarence E. Cowan
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Patent number: 7009383Abstract: A wafer probe station is equipped with an integrated environment control enclosure substantially surrounding a supporting surface for holding a test device, such enclosure limiting fluid communication between the interior and exterior of the enclosure and preferably also providing EMI shielding and a dark environment. The limited communication between the interior and exterior of the enclosure is kept substantially constant despite positioning movement of either the supporting surface or probes. The positioning mechanisms for the supporting surface and probes each are located at least partially outside of the enclosure.Type: GrantFiled: August 25, 2004Date of Patent: March 7, 2006Assignee: Cascade Microtech, Inc.Inventors: Warren K. Harwood, Paul A. Tervo, Martin J. Koxxy
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Patent number: 6980012Abstract: A probe station includes a fully guarded chuck assembly and connector mechanism for increasing sensitivity to low-level currents while reducing settling times. The chuck assembly includes a wafer-supporting first chuck element surrounded by a second chuck element having a lower component, skirting component and upper component each with a surface portion extending opposite the first element for guarding thereof. The connector mechanism is so connected to the second chuck element as to enable, during low-level current measurements, the potential on each component to follow that on the first chuck element as measured relative to an outer shielding enclosure surrounding each element. Leakage current from the first chuck element is thus reduced to virtually zero, hence enabling increased current sensitivity, and the reduced capacitance thus provided by the second chuck element decreases charging periods, hence reducing settling times.Type: GrantFiled: October 2, 2003Date of Patent: December 27, 2005Assignee: Cascase Microtech, Inc.Inventors: Randy J. Schwindt, Warren K. Harwood, Paul A. Tervo, Kenneth R. Smith, Richard H. Warner
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Publication number: 20050248359Abstract: A membrane probing assembly includes a probe card with conductors supported thereon, wherein the conductors include at least a signal conductor located between a pair of spaced apart guard conductors. A membrane assembly includes a membrane with contacts thereon, and supporting at least a signal conductor located between a pair of spaced apart guard conductors. The guard conductors of the probe card are electrically interconnected proximate the interconnection between the probe card and the membrane assembly. The guard conductors of the membrane assembly are electrically interconnected proximate the interconnection between the probe card and the membrane assembly.Type: ApplicationFiled: June 3, 2005Publication date: November 10, 2005Inventors: Paul Tervo, Kenneth Smith, Clarence Cowan, Mike Dauphinais, Martin Koxxy
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Publication number: 20050194983Abstract: A probe station includes a fully guarded chuck assembly and connector mechanism for increasing sensitivity to low-level currents while reducing settling times. The chuck assembly includes a wafer-supporting first chuck element surrounded by a second chuck element having a lower component, skirting component and upper component each with a surface portion extending opposite the first element for guarding thereof. The connector mechanism is so connected to the second chuck element as to enable, during low-level current measurements, the potential on each component to follow that on the first chuck element as measured relative to an outer shielding enclosure surrounding each element. Leakage current from the first chuck element is thus reduced to virtually zero, hence enabling increased current sensitivity, and the reduced capacitance thus provided by the second chuck element decreases charging periods, hence reducing settling times.Type: ApplicationFiled: April 21, 2005Publication date: September 8, 2005Inventors: Randy Schwindt, Warren Harwood, Paul Tervo, Kenneth Smith, Richard Warner
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Publication number: 20050184744Abstract: A probe station includes a fully guarded chuck assembly and connector mechanism for increasing sensitivity to low-level currents while reducing settling times. The chuck assembly includes a wafer-supporting first chuck element surrounded by a second chuck element having a lower component, skirting component and upper component each with a surface portion extending opposite the first element for guarding thereof. The connector mechanism is so connected to the second chuck element as to enable, during low-level current measurements, the potential on each component to follow that on the first chuck element as measured relative to an outer shielding enclosure surrounding each element. Leakage current from the first chuck element is thus reduced to virtually zero, hence enabling increased current sensitivity, and the reduced capacitance thus provided by the second chuck element decreases charging periods, hence reducing settling times.Type: ApplicationFiled: February 11, 2005Publication date: August 25, 2005Inventors: Randy Schwindt, Warren Harwood, Paul Tervo, Kenneth Smith, Richard Warner
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Patent number: 6930498Abstract: A membrane probing assembly includes a probe card with conductors supported thereon, wherein the conductors include at least a signal conductor located between a pair of spaced apart guard conductors. A membrane assembly includes a membrane with contacts thereon, and supporting at least a signal conductor located between a pair of spaced apart guard conductors. The guard conductors of the probe card are electrically interconnected proximate the interconnection between the probe card and the membrane assembly. The guard conductors of the membrane assembly are electrically interconnected proximate the interconnection between the probe card and the membrane assembly.Type: GrantFiled: July 29, 2004Date of Patent: August 16, 2005Assignee: Cascade Microtech, Inc.Inventors: Paul A. Tervo, Kenneth R. Smith, Clarence E. Cowan, Mike P. Dauphinais, Martin J. Koxxy
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Publication number: 20050151557Abstract: A low-current pogo probe card for measuring currents down to the femtoamp region includes a laminate board having a layer of conductive traces interposed between two dielectric layers. A plurality of probing devices, such as ceramic blades, are edge-mounted about a central opening so that the probing needles or needles included therein terminate below the opening in a pattern suitable for probing a test subject workpiece. A plurality of pogo pin receiving pad sets, each including a guard pad, occupy the periphery of the board. Each guard pad is electrically connected to a trace from the layer of conductive traces. The pad sets may be connected to the probing devices by low noise cables or traces. Air trenches separate the pad sets for reducing cross talk and signal settling times.Type: ApplicationFiled: February 7, 2005Publication date: July 14, 2005Inventors: Paul Tervo, Clarence Cowan
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Publication number: 20050146345Abstract: A low-current pogo probe card for measuring currents down to the femtoamp region includes a laminate board having a layer of conductive traces interposed between two dielectric layers. A plurality of probing devices, such as ceramic blades, are edge-mounted about a central opening so that the probing needles or needles included therein terminate below the opening in a pattern suitable for probing a test subject workpiece. A plurality of pogo pin receiving pad sets, each including a guard pad, occupy the periphery of the board. Each guard pad is electrically connected to a trace from the layer of conductive traces. The pad sets may be connected to the probing devices by low noise cables or traces. Air trenches separate the pad sets for reducing cross talk and signal settling times.Type: ApplicationFiled: January 5, 2005Publication date: July 7, 2005Inventors: Paul Tervo, Clarence Cowan
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Publication number: 20050035779Abstract: A low-current pogo probe card for measuring currents down to the femtoamp region includes a laminate board having a layer of conductive traces interposed between two dielectric layers. A plurality of probing devices, such as ceramic blades, are edge-mounted about a central opening so that the probing needles or needles included therein terminate below the opening in a pattern suitable for probing a test subject workpiece. A plurality of pogo pin receiving pad sets, each including a guard pad, occupy the periphery of the board. Each guard pad is electrically connected to a trace from the layer of conductive traces. The pad sets may be connected to the probing devices by low noise cables or traces. Air trenches separate the pad sets for reducing cross talk and signal settling times.Type: ApplicationFiled: September 22, 2004Publication date: February 17, 2005Inventors: Paul Tervo, Clarence Cowan
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Patent number: 6856153Abstract: A low-current pogo probe card for measuring currents down to the femtoamp region includes a laminate board having a layer of conductive traces interposed between two dielectric layers. A plurality of probing devices, such as ceramic blades, are edge-mounted about a central opening so that the probing needles or needles included therein terminate below the opening in a pattern suitable for probing a test subject workpiece. A plurality of pogo pin receiving pad sets, each including a guard pad, occupy the periphery of the board. Each guard pad is electrically connected to a trace from the layer of conductive traces. The pad sets may be connected to the probing devices by low noise cables or traces. Air trenches separate the pad sets for reducing cross talk and signal settling times.Type: GrantFiled: July 7, 2003Date of Patent: February 15, 2005Assignee: Cascade Microtech, Inc.Inventors: Paul A. Tervo, Clarence E. Cowan
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Publication number: 20050017741Abstract: A wafer probe station is equipped with an integrated environment control enclosure substantially surrounding a supporting surface for holding a test device, such enclosure limiting fluid communication between the interior and exterior of the enclosure and preferably also providing EMI shielding and a dark environment. The limited communication between the interior and exterior of the enclosure is kept substantially constant despite positioning movement of either the supporting surface or probes. The positioning mechanisms for the supporting surface and probes each are located at least partially outside of the enclosure.Type: ApplicationFiled: August 25, 2004Publication date: January 27, 2005Inventors: Warren Harwood, Paul Tervo, Martin Koxxy
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Publication number: 20050007131Abstract: A membrane probing assembly includes a probe card with conductors supported thereon, wherein the conductors include at least a signal conductor located between a pair of spaced apart guard conductors. A membrane assembly includes a membrane with contacts thereon, and supporting at least a signal conductor located between a pair of spaced apart guard conductors. The guard conductors of the probe card are electrically interconnected proximate the interconnection between the probe card and the membrane assembly. The guard conductors of the membrane assembly are electrically interconnected proximate the interconnection between the probe card and the membrane assembly.Type: ApplicationFiled: July 29, 2004Publication date: January 13, 2005Inventors: Paul Tervo, Kenneth Smith, Clarence Cowan, Mike Dauphinais, Martin Koxxy
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Patent number: 6838890Abstract: A membrane probing assembly includes a probe card with conductors supported thereon, wherein the conductors include at least a signal conductor located between a pair of spaced apart guard conductors. A membrane assembly includes a membrane with contacts thereon, and supporting at least a signal conductor located between a pair of spaced apart guard conductors. The guard conductors of the probe card are electrically interconnected proximate the interconnection between the probe card and the membrane assembly. The guard conductors of the membrane assembly are electrically interconnected proximate the interconnection between the probe card and the membrane assembly.Type: GrantFiled: November 29, 2000Date of Patent: January 4, 2005Assignee: Cascade Microtech, Inc.Inventors: Paul A. Tervo, Kenneth R. Smith, Clarence E. Cowan, Mike P. Dauphinais, Martin J. Koxxy
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Patent number: 6822467Abstract: A low-current pogo probe card for measuring currents down to the femtoamp region includes a laminate board having a layer of conductive traces interposed between two dielectric layers. A plurality of probing devices, such as ceramic blades, are edge-mounted about a central opening so that the probing needles or needles included therein terminate below the opening in a pattern suitable for probing a test subject workpiece. A plurality of pogo pin receiving pad sets, each including a guard pad, occupy the periphery of the board. Each guard pad is electrically connected to a trace from the layer of conductive traces. The pad sets may be connected to the probing devices by low noise cables or traces. Air trenches separate the pad sets for reducing cross talk and signal settling times.Type: GrantFiled: December 6, 2002Date of Patent: November 23, 2004Assignee: Cascade Microtech, INCInventors: Paul A. Tervo, Clarence E. Cowan
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Patent number: 6801047Abstract: A wafer probe station is equipped with an integrated environment control enclosure substantially surrounding a supporting surface for holding a test device, such enclosure limiting fluid communication between the interior and exterior of the enclosure and preferably also providing EMI shielding and a dark environment. The limited communication between the interior and exterior of the enclosure is kept substantially constant despite positioning movement of either the supporting surface or probes. The positioning mechanisms for the supporting surface and probes each are located at least partially outside of the enclosure.Type: GrantFiled: May 19, 2003Date of Patent: October 5, 2004Assignee: Cascade Microtech, Inc.Inventors: Warren K. Harwood, Paul A. Tervo, Martin J. Koxxy
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Publication number: 20040150416Abstract: To reduce noise in measurements obtained by probing a device supported on surface of a thermal chuck in a probe station, a conductive member is arranged to intercept current coupling the thermal unit of the chuck to the surface supporting the device. The conductive member is capacitively coupled to the thermal unit but free of direct electrical connection thereto.Type: ApplicationFiled: July 25, 2003Publication date: August 5, 2004Inventors: Clarence E. Cowan, Paul A. Tervo, John L. Dunklee
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Patent number: 6720782Abstract: A probe station includes a fully guarded chuck assembly and connector mechanism for increasing sensitivity to low-level currents while reducing settling times. The chuck assembly includes a wafer-supporting first chuck element surrounded by a second chuck element having a lower component, skirting component and upper component each with a surface portion extending opposite the first element for guarding thereof. The connector mechanism is so connected to the second chuck element as to enable, during low-level current measurements, the potential on each component to follow that on the first chuck element as measured relative to an outer shielding enclosure surrounding each element. Leakage current from the first chuck element is thus reduced to virtually zero, hence enabling increased current sensitivity, and the reduced capacitance thus provided by the second chuck element decreases charging periods, hence reducing settling times.Type: GrantFiled: October 17, 2002Date of Patent: April 13, 2004Assignee: Cascade Microtech, Inc.Inventors: Randy J. Schwindt, Warren K. Harwood, Paul A. Tervo, Kenneth R. Smith, Richard H. Warner