Abstract: A photomask includes a substrate having a top surface. A topographical feature is formed on the top surface of the substrate. The topographical feature may be a bump or a pit created on the top surface of the substrate. A reflector is formed on the top surface of the substrate over the topographical feature. The topographical feature warps the reflector in order to generate phase and/or amplitude gradients in light reflected off the reflector. An absorber is patterned on the reflector defining lithographic patterns for a resist material. The gradients in the light reflected off the reflector create shadow regions during lithography of the resist material using extreme ultraviolet (EUV) light.

Abstract: A method for fabricating integrated circuits includes fabricating an EUV mask by providing a photomask having a border region. A photoresist is formed over the photomask and has a border region overlying the border region of the photomask. The method exposes an inner portion and an outer portion of the photoresist border region. The method removes the inner portion and the outer portion to expose the border region of the photomask. The border region of the photomask is etched using the photoresist as a mask to form the EUV mask with a non-reflective border. The photoresist is removed from the EUV mask. The method includes forming another photoresist over a partially-fabricated integrated circuit layer and patterning the photoresist by exposure to EUV light reflected from the EUV mask to expose portions of the partially-fabricated integrated circuit layer. Portions of the partially-fabricated integrated circuit layer and the photoresist are removed.

Abstract: A method for fabricating integrated circuits includes fabricating an EUV mask by providing a photomask having a border region. A photoresist is formed over the photomask and has a border region overlying the border region of the photomask. The method exposes an inner portion and an outer portion of the photoresist border region. The method removes the inner portion and the outer portion to expose the border region of the photomask. The border region of the photomask is etched using the photoresist as a mask to form the EUV mask with a non-reflective border. The photoresist is removed from the EUV mask. The method includes forming another photoresist over a partially-fabricated integrated circuit layer and patterning the photoresist by exposure to EUV light reflected from the EUV mask to expose portions of the partially-fabricated integrated circuit layer. Portions of the partially-fabricated integrated circuit layer and the photoresist are removed.

Abstract: Embodiments of the invention provide approaches for extreme ultraviolet (EUV) defect reconstruction and compensation repair. Specifically, a defect starting point of a defect of a mask is determined, and the performance of the mask with the defect is simulated. The simulated performance of the mask is compared to an empirical analysis of the mask to produce a profile of the mask and the defect. An initial image of the mask geometry, with the defect, is calculated, and then compared to a target image of the mask. From this, a compensated layout is generated. As such, embodiments provide a EUV fabrication system that detects and corrects for defects in the blanks and patterned masks to avoid or counteract the defect. Once a compensated pattern has been designed and successfully simulated, the mask may be patterned with the compensated design.

Abstract: Incoming audio from mobile devices can be centrally processed, where a server can filter background noise in real time, such as by using an XOR function. Instead of discarding the filtered noise, however, it can be processed in parallel to dynamically construct an acoustic map of the environment. The acoustic map can be generated from an aggregation of sound data from multiple devices positioned in a geographic environment. The acoustic map can be linked to a configurable set of rules, conditions, and events, which can cause dynamic adjustments to be made to a workforce task management system. For example, employee availability can be assessed using the acoustic map and workforce tasks can be assigned based in part upon this availability.

Abstract: Embodiments of a method for fabricating an extreme ultraviolet (EUV) mask having a die pattern area are provided, as are embodiments of a method for fabricating an integrated circuit utilizing an EUV mask and embodiments of an EUV mask. In one embodiment, the EUV mask fabrication method includes obtaining an EUV mask blank including a substrate and a multi-layer (ML) reflector disposed over the substrate, and annealing localized portions of the ML reflector to produce an EUV light-absorptive border extending at least partially around an outer perimeter of the die pattern area.

Abstract: Embodiments of a method for fabricating an extreme ultraviolet (EUV) mask having a die pattern area are provided, as are embodiments of a method for fabricating an integrated circuit utilizing an EUV mask and embodiments of an EUV mask. In one embodiment, the EUV mask fabrication method includes obtaining an EUV mask blank including a substrate and a multi-layer (ML) reflector disposed over the substrate, and annealing localized portions of the ML reflector to produce an EUV light-absorptive border extending at least partially around an outer perimeter of the die pattern area.

Abstract: Incoming audio from mobile devices can be centrally processed, where a server can filter background noise in real time, such as by using an XOR function. Instead of discarding the filtered noise, however, it can be processed in parallel to dynamically construct an acoustic map of the environment. The acoustic map can be generated from an aggregation of sound data from multiple devices positioned in a geographic environment. The acoustic map can be linked to a configurable set of rules, conditions, and events, which can cause dynamic adjustments to be made to a workforce task management system. For example, employee availability can be assessed using the acoustic map and workforce tasks can be assigned based in part upon this availability.

Abstract: A patterned reflective semiconductor mask uses a multiple layer ARC overlying an absorber stack that overlies a reflective substrate. The absorber stack has more than one layer and an upper layer of the absorber stack has a predetermined metal. The multiple layer ARC overlying the upper layer of the absorber stack has layers of nitrogen, oxygen and nitrogen combined with the predetermined metal of the upper layer of the absorber stack. The oxygen layer in the ARC has less metallic properties than the nitrogen layers therein. In one form, an overlying dielectric layer is positioned on the multiple layer ARC to increase light interference. The ARC provides wide bandwidth inspection contrast for extreme ultra-violet (EUV) reticles.

Abstract: A method (40) for fabricating a nanoscale device, includes nano-imprinting (44) a one dimensional nanostructure (20) on a material (12), forming (46) a patterning layer (22, 26) over the one dimensional nanostructure (20) and the material (12), patterning (48) the patterning layer (22, 26) to differentiate an area over the one dimensional nanostructure (20), and etching (52, 56) the differentiated area and a portion of the material (12) to create a trench (24) under the one dimensional nanostructure (20). The one dimensional nanostructure (20) is coupled to circuitry (30) formed in the material (12).

Abstract: A patterned reflective semiconductor mask (10) uses a multiple layer ARC (24, 26, 28) overlying an absorber stack (22) that overlies a reflective substrate (12, 14). The absorber stack has more than one layer and an upper layer of the absorber stack has a predetermined metal. The multiple layer ARC overlying the upper layer of the absorber stack has layers of nitrogen, oxygen and nitrogen combined with the predetermined metal of the upper layer of the absorber stack. The oxygen layer in the ARC has less metallic properties than the nitrogen layers therein. In one form, an overlying dielectric layer (30) is positioned on the multiple layer ARC to increase light interference. The ARC provides wide bandwidth inspection contrast for extreme ultra-violet (EUV) reticles.

Abstract: A patterned reflective semiconductor mask uses a multiple layer ARC overlying an absorber stack that overlies a reflective substrate. The absorber stack has more than one layer and an upper layer of the absorber stack has a predetermined metal. The multiple layer ARC overlying the upper layer of the absorber stack has layers of nitrogen, oxygen and nitrogen combined with the predetermined metal of the upper layer of the absorber stack. The oxygen layer in the ARC has less metallic properties than the nitrogen layers therein. In one form, an overlying dielectric layer is positioned on the multiple layer ARC to increase light interference. The ARC provides wide bandwidth inspection contrast for extreme ultra-violet (EUV) reticles.

Abstract: Methods and apparatus are provided for extreme ultraviolet phase shift masks. The apparatus comprises a substrate, a reflectance region, and an attenuating phase shifter. The reflectance region overlies the substrate. The attenuating phase shifter overlies the reflectance region. The attenuating phase shifter includes a plurality of openings that expose portions of the reflectance region. The attenuating phase shifter attenuates radiation through a combination of absorption and destructive interference. The method comprises projecting radiation having a wavelength less than 40 nanometers towards a mask having a plurality of openings through an attenuating phase shifter. The plurality of openings expose a reflectance region in the mask. The attenuating phase shifter is less than 700 angstroms thick. Radiation impinging on the reflectance region exposed by said plurality of openings is reflected whereas radiation impinging on the attenuating phase shifter is attenuated and shifted in phase.

Abstract: A photoresist layer on a semiconductor wafer is patterned using a mask with an absorbing layer that has been repaired by using an additional light-absorbing carbon layer that collects ions that are used in the repair process. After the repair has been completed, the ions that are present in the carbon layer are removed by removing the portion of the carbon layer that is not covered by the absorbing layer. Thus, the absorbing layer, which contains the pattern that is to be exposed on the photoresist layer, also acts as a mask in the removal of the portion of the carbon layer that contains the ions. Thereby the ions that are opaque at the particular wavelength being used are removed from the areas where light is intended to pass through the mask to the photoresist. The buffer layer is made absorbing to avoid problems with reflections at interfaces thereof.

Abstract: Methods and apparatus are provided for extreme ultraviolet phase shift masks. The apparatus comprises a substrate, a reflectance region, and an attenuating phase shifter. The reflectance region overlies the substrate. The attenuating phase shifter overlies the reflectance region. The attenuating phase shifter includes a plurality of openings that expose portions of the reflectance region. The attenuating phase shifter attenuates radiation through a combination of absorption and destructive interference. The method comprises projecting radiation having a wavelength less than 40 nanometers towards a mask having a plurality of openings through an attenuating phase shifter. The plurality of openings expose a reflectance region in the mask. The attenuating phase shifter is less than 700 angstroms thick. Radiation impinging on the reflectance region exposed by said plurality of openings is reflected whereas radiation impinging on the attenuating phase shifter is attenuated and shifted in phase.

Abstract: An attenuated phase shift mask (10 or 20) includes a substrate (12 or 22) and an attenuation stack (11 or 21) overlying the substrate. The attenuation stack includes a chromium layer or ruthenium layer (14 or 24) overlying the substrate, a tantalum silicon oxide layer (16 or 26) overlying the chromium layer or the ruthenium layer, and a tantalum silicon nitride layer (18 or 28) overlying the tantalum silicon oxide layer. The attenuation stack may also include a layer (30) between the substrate (22) and the chromium or ruthenium layer (24). In one embodiment, this layer is a portion of the substrate. The attenuation stack is used to pattern photoresist (50) on a semiconductor wafer. In one embodiment, portions of the substrate adjacent the attenuation stack has a transmission of greater than 90 percent and the attenuation stack has a transmission of 5 to 20 percent at the exposure wavelength.

Abstract: An attenuated phase shift mask (10 or 20) includes a substrate (12 or 22) and an attenuation stack (11 or 21) overlying the substrate. The attenuation stack includes a chromium layer or ruthenium layer (14 or 24) overlying the substrate, a tantalum silicon oxide layer (16 or 26) overlying the chromium layer or the ruthenium layer, and a tantalum silicon nitride layer (18 or 28) overlying the tantalum silicon oxide layer. The attenuation stack may also include a layer (30) between the substrate (22) and the chromium or ruthenium layer (24). In one embodiment, this layer is a portion of the substrate. The attenuation stack is used to pattern photoresist (50) on a semiconductor wafer. In one embodiment, portions of the substrate adjacent the attenuation stack has a transmission of greater than 90 percent and the attenuation stack has a transmission of 5 to 20 percent at the exposure wavelength.

Abstract: A patterned reflective semiconductor mask (10) uses a multiple layer ARC (24, 26, 28) overlying an absorber stack (22) that overlies a reflective substrate (12, 14). The absorber stack has more than one layer and an upper layer of the absorber stack has a predetermined metal. The multiple layer ARC overlying the upper layer of the absorber stack has layers of nitrogen, oxygen and nitrogen combined with the predetermined metal of the upper layer of the absorber stack. The oxygen layer in the ARC has less metallic properties than the nitrogen layers therein. In one form, an overlying dielectric layer (30) is positioned on the multiple layer ARC to increase light interference. The ARC provides wide bandwidth inspection contrast for extreme ultra-violet (EUV) reticles.

Abstract: A photoresist layer on a semiconductor wafer is patterned using a mask with an absorbing layer that has been repaired by using an additional light-absorbing carbon layer that collects ions that are used in the repair process. After the repair has been completed, the ions that are present in the carbon layer are removed by removing the portion of the carbon layer that is not covered by the absorbing layer. Thus, the absorbing layer, which contains the pattern that is to be exposed on the photoresist layer, also acts as a mask in the removal of the portion of the carbon layer that contains the ions. Thereby the ions that are opaque at the particular wavelength being used are removed from the areas where light is intended to pass through the mask to the photoresist. The buffer layer is made absorbing to avoid problems with reflections at interfaces thereof.

Abstract: A stencil mask (12 or 12′) has both a thin membrane layer (106) and a stress controlled layer (104) for enabling electron and ion projection lithography at very small geometries. The thin membrane layer (106) is within a range of substantially forty to two hundred nanometers and is preferably silicon nitride, and the stress controlled layer is preferably a metal or a metal alloy. Annealing of the stress controlled layer (104) may be performed to obtain a desired stress characteristic. Semiconductors are made using the mask by projecting radiation through the thin membrane stencil mask and reduction optics (30) onto resist (44) formed on a plurality of die, the radiation forming a contrast image on the resist that is subsequently developed. Commercially available lithography equipment is compatible with the thin stencil mask.