Patents by Inventor Pazhani Pillai

Pazhani Pillai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230252713
    Abstract: Techniques for performing shader operations are provided. The techniques include, performing pixel shading at a shading rate defined by pixel shader variable rate shading (“VRS”) data, and updating the pixel VRS data that indicates one or more shading rates for one or more tiles based on whether the tiles of the one or more tiles include triangle edges or do not include triangle edges, to generate updated VRS data.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 10, 2023
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Skyler Jonathon Saleh, Vineet Goel, Pazhani Pillai, Ruijin Wu, Christopher J. Brennan, Andrew S. Pomianowski
  • Publication number: 20230186523
    Abstract: A method and apparatus for integrating data compression in a computer system includes receiving first data at a first system level. Based upon a number of planes of the first data being less than or equal to a threshold, the data is compressed with a first data compression scheme, and transferred to a second system level for processing. Based upon the number of planes of the first data exceeding the threshold, the first data is transferred uncompressed to the second system level for processing. Based upon the received data at the second system level being compressed with the first compression scheme, the data is transferred to a third system level, and based upon the received data at the second system level being uncompressed with the first compression scheme, compressing the data with a second compression scheme, and transferring the compressed data to the third system level.
    Type: Application
    Filed: December 14, 2021
    Publication date: June 15, 2023
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Christopher J. Brennan, Pazhani Pillai
  • Publication number: 20230169007
    Abstract: Methods, devices, and systems for prefetching data. First data is loaded from a first memory location. The first data in cached in a cache memory. Other data is prefetched to the cache memory based on a compression of the first data and a compression of the other data. In some implementations, the compression of the first data and the compression of the other data are determined based on metadata associated with the first data and metadata associated with the other data. In some implementations, the other data is prefetched to the cache memory based on a total of a compressed size of the first data and a compressed size of the other data being less than a threshold size. In some implementations, the other data is not prefetched to the cache memory based on the other data being uncompressed.
    Type: Application
    Filed: January 27, 2023
    Publication date: June 1, 2023
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Pazhani Pillai, Harish Kumar Kovalam Rajendran
  • Patent number: 11657560
    Abstract: Techniques for performing shader operations are provided. The techniques include, performing pixel shading at a shading rate defined by pixel shader variable rate shading (“VRS”) data, and updating the pixel VRS data that indicates one or more shading rates for one or more tiles based on whether the tiles of the one or more tiles include triangle edges or do not include triangle edges, to generate updated VRS data.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: May 23, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Skyler Jonathon Saleh, Vineet Goel, Pazhani Pillai, Ruijin Wu, Christopher J. Brennan, Andrew S. Pomianowski
  • Patent number: 11631187
    Abstract: Systems, apparatuses, and methods for implementing a depth buffer pre-pass are disclosed. A rendering application uses a binning approach to render primitives of a virtual scene on a tile-by-tile basis, with each tile corresponding to a portion of the screen. The application causes a depth buffer pre-pass to be performed for the primitives of the tile before a pixel shader is invoked. During the depth buffer pre-pass, only the depth part of the virtual scene is rendered to determine which pixel samples are visible and which pixel samples are hidden. Then, the scene is redrawn, but the pixel samples that are hidden are not sent to the pixel shader. In cases where a relatively large percentage of primitives overlap, this technique increases the efficiency of the rendering application since pixel shading can be avoided for the pixel samples that are hidden.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: April 18, 2023
    Assignees: Advanced Micro Devices, Inc., ATI Technologies ULC
    Inventors: Jan Henrik Achrenius, Mika Tuomi, Kiia Kallio, Pazhani Pillai, Laurent Lefebvre
  • Patent number: 11567872
    Abstract: Methods, devices, and systems for prefetching data. First data is loaded from a first memory location. The first data in cached in a cache memory. Other data is prefetched to the cache memory based on a compression of the first data and a compression of the other data. In some implementations, the compression of the first data and the compression of the other data are determined based on metadata associated with the first data and metadata associated with the other data. In some implementations, the other data is prefetched to the cache memory based on a total of a compressed size of the first data and a compressed size of the other data being less than a threshold size. In some implementations, the other data is not prefetched to the cache memory based on the other data being uncompressed.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: January 31, 2023
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Pazhani Pillai, Harish Kumar Kovalam Rajendran
  • Publication number: 20230010801
    Abstract: Methods, devices, and systems for prefetching data. First data is loaded from a first memory location. The first data in cached in a cache memory. Other data is prefetched to the cache memory based on a compression of the first data and a compression of the other data. In some implementations, the compression of the first data and the compression of the other data are determined based on metadata associated with the first data and metadata associated with the other data. In some implementations, the other data is prefetched to the cache memory based on a total of a compressed size of the first data and a compressed size of the other data being less than a threshold size. In some implementations, the other data is not prefetched to the cache memory based on the other data being uncompressed.
    Type: Application
    Filed: July 8, 2021
    Publication date: January 12, 2023
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Pazhani Pillai, Harish Kumar Kovalam Rajendran
  • Publication number: 20220414939
    Abstract: A disclosed technique includes reading, from a compressed render target, a set of unique color values for a coarse pixel, wherein the coarse pixel includes multiple render target pixels; reading, from the compressed render target, pointers to the unique color values for the coarse pixel; and generating colors for the multiple render target pixels based on the unique color values and the pointers.
    Type: Application
    Filed: June 28, 2021
    Publication date: December 29, 2022
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Pazhani Pillai, Christopher J. Brennan
  • Publication number: 20220092801
    Abstract: Systems, apparatuses, and methods for implementing a depth buffer pre-pass are disclosed. A rendering application uses a binning approach to render primitives of a virtual scene on a tile-by-tile basis, with each tile corresponding to a portion of the screen. The application causes a depth buffer pre-pass to be performed for the primitives of the tile before a pixel shader is invoked. During the depth buffer pre-pass, only the depth part of the virtual scene is rendered to determine which pixel samples are visible and which pixel samples are hidden. Then, the scene is redrawn, but the pixel samples that are hidden are not sent to the pixel shader. In cases where a relatively large percentage of primitives overlap, this technique increases the efficiency of the rendering application since pixel shading can be avoided for the pixel samples that are hidden.
    Type: Application
    Filed: September 24, 2020
    Publication date: March 24, 2022
    Inventors: Jan Henrik Achrenius, Mika Tuomi, Kiia Kallio, Pazhani Pillai, Laurent Lefebvre
  • Patent number: 11257273
    Abstract: Techniques for processing pixel data are provided. The techniques include, in a first mode in which blending is enabled, reading in render target color data from a memory system; blending the render target color data with one or more fragments received from a pixel shader stage to generate blended color data; outputting the blended color data to the memory system utilizing a first amount of bandwidth; in a second mode in which blending is disabled and variable rate shading is enabled, amplifying shaded coarse fragments received from the pixel shader stage to generate fine fragments; and outputting the fine fragments to the memory system utilizing a second amount of bandwidth that is higher than the first amount of bandwidth.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: February 22, 2022
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Pazhani Pillai, Skyler Jonathon Saleh
  • Publication number: 20220012933
    Abstract: Techniques for performing shader operations are provided. The techniques include, performing pixel shading at a shading rate defined by pixel shader variable rate shading (“VRS”) data, and updating the pixel VRS data that indicates one or more shading rates for one or more tiles based on whether the tiles of the one or more tiles include triangle edges or do not include triangle edges, to generate updated VRS data.
    Type: Application
    Filed: September 23, 2021
    Publication date: January 13, 2022
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Skyler Jonathon Saleh, Vineet Goel, Pazhani Pillai, Ruijin Wu, Christopher J. Brennan, Andrew S. Pomianowski
  • Publication number: 20210358174
    Abstract: A method and apparatus for processing color data includes storing fragment pointer and color data together in a color buffer. A delta color compression (DCC) key indicating the color data to fetch for processing is stored, and the fragment pointer and color data is fetched based upon the read DCC key for decompression.
    Type: Application
    Filed: December 28, 2020
    Publication date: November 18, 2021
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Pazhani Pillai, Mark A. Natale, Harish Kumar Kovalam Rajendran
  • Patent number: 11158106
    Abstract: Techniques for performing shader operations are provided. The techniques include, performing pixel shading at a shading rate defined by pixel shader variable rate shading (“VRS”) data, updating the pixel VRS data that indicates one or more shading rates for one or more tiles based on whether the tiles of the one or more tiles include triangle edges or do not include triangle edges, to generate updated VRS data, and writing a VRS rate feedback buffer based on the updated VRS data.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: October 26, 2021
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Skyler Jonathon Saleh, Vineet Goel, Pazhani Pillai, Ruijin Wu, Christopher J. Brennan, Andrew S. Pomianowski
  • Patent number: 11062680
    Abstract: Systems, apparatuses, and methods for implementing raster order view enforcement techniques are disclosed. A processor includes a plurality of compute units coupled to one or more memories. A plurality of waves are launched in parallel for execution on the plurality of compute units, where each wave comprises a plurality of threads. A dependency chain is generated for each wave of the plurality of waves. The compute units wait for all older waves to complete dependency chain generation prior to executing any threads with dependencies. Responsive to all older waves completing dependency chain generation, a given thread with a dependency is executed only if all other threads upon which the given thread is dependent have become inactive. When executed, the plurality of waves generate a plurality of pixels to be driven to a display.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: July 13, 2021
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Pazhani Pillai, Christopher J. Brennan
  • Publication number: 20210192827
    Abstract: Techniques for performing shader operations are provided. The techniques include, performing pixel shading at a shading rate defined by pixel shader variable rate shading (“VRS”) data, updating the pixel VRS data that indicates one or more shading rates for one or more tiles based on whether the tiles of the one or more tiles include triangle edges or do not include triangle edges, to generate updated VRS data, and writing a VRS rate feedback buffer based on the updated VRS data.
    Type: Application
    Filed: December 20, 2019
    Publication date: June 24, 2021
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Skyler Jonathon Saleh, Vineet Goel, Pazhani Pillai, Ruijin Wu, Christopher J. Brennan, Andrew S. Pomianowski
  • Publication number: 20210192825
    Abstract: Techniques for processing pixel data are provided. The techniques include, in a first mode in which blending is enabled, reading in render target color data from a memory system; blending the render target color data with one or more fragments received from a pixel shader stage to generate blended color data; outputting the blended color data to the memory system utilizing a first amount of bandwidth; in a second mode in which blending is disabled and variable rate shading is enabled, amplifying shaded coarse fragments received from the pixel shader stage to generate fine fragments; and outputting the fine fragments to the memory system utilizing a second amount of bandwidth that is higher than the first amount of bandwidth.
    Type: Application
    Filed: December 19, 2019
    Publication date: June 24, 2021
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Pazhani Pillai, Skyler Jonathon Saleh
  • Patent number: 11030791
    Abstract: A technique for determining the centroid for fragments generated using variable rate shading. Because the barycentric interpolation used to determine texture coordinates for pixels is based on the premise that the point being interpolated is within the triangle, centroids that are outside of the triangle can produce undesirable visual artifacts. Another concern, however, is that the further the centroid is from the center of a pixel, the less accurate quad-based pixel derivatives become for attributes of that pixel. To address these concerns, the position of the sample that is both covered by the triangle and the closest to the center of the pixel, out of all covered samples of the pixel, is used as the centroid for a partially covered pixel. For a fully covered pixel (all samples in a pixel are covered by a triangle), the center of that pixel is used as the centroid.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: June 8, 2021
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Skyler Jonathon Saleh, Pazhani Pillai
  • Patent number: 10796399
    Abstract: Systems, apparatuses, and methods for implementing pixel wait synchronization techniques are disclosed. A system includes a host processor and a graphics processor which includes at least one graphics pipeline. During execution of a graphics application, the host processor determines that a second draw call is dependent on a first draw call. The host processor issues a wait sync event prior to issuing the second draw call to the graphics pipeline responsive to determining that the first draw call is still in-flight in the graphics pipeline. After the second draw call is issued to the graphics pipeline, the second draw call is processed by one or more stages of the graphics pipeline while the first draw call is still in-flight. The graphics pipeline stalls the second draw call at a given intermediate stage until a corresponding event counter equals a value specified by the wait sync event.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: October 6, 2020
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Pazhani Pillai
  • Publication number: 20200202605
    Abstract: A technique for determining the centroid for fragments generated using variable rate shading is provided. Because the barycentric interpolation used to determine texture coordinates for pixels is based on the premise that the point being interpolated is within the triangle, centroids that are outside of the triangle can produce undesirable visual artifacts. Another concern, however, is that the further the centroid is from the center of a pixel, the less accurate quad-based pixel derivatives become for attributes of that pixel. To address these concerns, the position of the sample that is both covered by the triangle and the closest to the center of the pixel, out of all covered samples of the pixel, is used as the centroid for a partially covered pixel. For a fully covered pixel (all samples in a pixel are covered by a triangle), the center of that pixel is used as the centroid.
    Type: Application
    Filed: December 19, 2018
    Publication date: June 25, 2020
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Skyler Jonathon Saleh, Pazhani Pillai
  • Publication number: 20200202815
    Abstract: Systems, apparatuses, and methods for implementing raster order view enforcement techniques are disclosed. A processor includes a plurality of compute units coupled to one or more memories. A plurality of waves are launched in parallel for execution on the plurality of compute units, where each wave comprises a plurality of threads. A dependency chain is generated for each wave of the plurality of waves. The compute units wait for all older waves to complete dependency chain generation prior to executing any threads with dependencies. Responsive to all older waves completing dependency chain generation, a given thread with a dependency is executed only if all other threads upon which the given thread is dependent have become inactive. When executed, the plurality of waves generate a plurality of pixels to be driven to a display.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 25, 2020
    Inventors: Pazhani Pillai, Christopher J. Brennan