Patents by Inventor Pei-Cheng Hsu

Pei-Cheng Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11215918
    Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.
    Type: Grant
    Filed: January 29, 2020
    Date of Patent: January 4, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pei-Cheng Hsu, Chun-Fu Yang, Ta-Cheng Lien, Hsin-Chang Lee
  • Publication number: 20210405519
    Abstract: In a method of manufacturing a reflective mask, a photo resist layer is formed over a mask blank. The mask blank includes a substrate, a reflective multilayer on the substrate, a capping layer on the reflective multilayer, an absorber layer on the capping layer and a hard mask layer, and the absorber layer is made of Cr, CrO or CrON. The photo resist layer is patterned, the hard mask layer is patterned by using the patterned photo resist layer, the absorber layer is patterned by using the patterned hard mask layer, and an additional element is introduced into the patterned absorber layer to form a converted absorber layer.
    Type: Application
    Filed: November 5, 2020
    Publication date: December 30, 2021
    Inventors: Hsin-Chang LEE, Chia-Jen CHEN, Pei-Cheng HSU, Ta-Cheng LIEN
  • Patent number: 11204545
    Abstract: A reflective mask includes a substrate, a reflective multilayer disposed on the substrate, a capping layer disposed on the reflective multilayer, and an absorber layer disposed on the capping layer. The absorber layer includes one or more alternating pairs of a first Cr based layer and a second Cr based layer different from the first Cr based layer.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: December 21, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pei-Cheng Hsu, Ching-Huang Chen, Hung-Yi Tsai, Ming-Wei Chen, Ta-Cheng Lien, Hsin-Chang Lee
  • Publication number: 20210373436
    Abstract: In a method of cleaning a photo mask, the photo mask is placed on a support such that a pattered surface faces down, and an adhesive sheet is applied to edges of a backside surface of the photo mask.
    Type: Application
    Filed: December 2, 2020
    Publication date: December 2, 2021
    Inventors: Hsin-Chang LEE, Pei-Cheng HSU, Hao-Ping CHENG, Ta-Cheng LIEN
  • Publication number: 20210373431
    Abstract: A reflective mask includes a substrate, a reflective multilayer disposed over the substrate, a capping layer disposed over the reflective multilayer, an intermediate layer disposed over the capping layer, an absorber layer disposed over the intermediate layer, and a cover layer disposed over the absorber layer. The intermediate layer includes a material having a lower hydrogen diffusivity than a material of the capping layer.
    Type: Application
    Filed: December 2, 2020
    Publication date: December 2, 2021
    Inventors: Pei-Cheng Hsu, Ta-Cheng Lien, Hsin-Chang Lee
  • Publication number: 20210364906
    Abstract: In a method of manufacturing a reflective mask, a photo resist layer is formed over a mask blank. The mask blank includes a substrate, a reflective multilayer on the substrate, a capping layer on the reflective multilayer, an absorber layer on the capping layer and a hard mask layer, and the absorber layer is made of Cr, CrO or CrON. The photo resist layer is patterned, the hard mask layer is patterned by using the patterned photo resist layer, the absorber layer is patterned by using the patterned hard mask layer, and an additional element is introduced into the patterned absorber layer to form a converted absorber layer.
    Type: Application
    Filed: October 8, 2020
    Publication date: November 25, 2021
    Inventors: Pei-Cheng HSU, Ta-Cheng LIEN, Hsin-Chang LEE
  • Publication number: 20210349386
    Abstract: A multi-layer reflective structure is disposed over the substrate. An amorphous capping layer is disposed over the multi-layer reflective structure. The amorphous capping layer may contain ruthenium, oxygen, niobium, nitrogen, tantalum, or zirconium. An amorphous layer may also be disposed between the multi-layer reflective structure and the amorphous capping layer. The amorphous layer includes amorphous silicon, amorphous silicon oxide, or amorphous silicon nitride.
    Type: Application
    Filed: May 11, 2020
    Publication date: November 11, 2021
    Inventors: Hsin-Chang Lee, Pei-Cheng Hsu, Chih-Tao Chien, Ming-Wei Chen, Ta-Cheng Lien
  • Patent number: 11143952
    Abstract: A method of removing a pellicle from a photomask includes removing a portion of a membrane from a pellicle frame, wherein the pellicle frame remains attached to the photomask following the removing of the portion of the membrane. The method further includes removing the pellicle frame from the photomask. The method further includes cleaning the photomask.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: October 12, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chue San Yoo, Chih-Chiang Tu, Chien-Cheng Chen, Jong-Yuh Chang, Kun-Lung Hsieh, Pei-Cheng Hsu, Hsin-Chang Lee, Yun-Yue Lin
  • Publication number: 20210311383
    Abstract: A reflective mask includes a reflective multilayer over a substrate, a capping layer over the reflective multilayer, an absorber layer over the capping layer and including a top surface, and a protection layer directly on the top surface of the absorber layer. The absorber layer is formed of a first material and the protection layer is formed of a second material that is less easily to be oxidized than the first material.
    Type: Application
    Filed: June 17, 2021
    Publication date: October 7, 2021
    Inventors: Pei-Cheng Hsu, Yih-Chen Su, Chi-Kuang Tsai, Ta-Cheng Lien, Tzu Yi Wang, Jong-Yuh Chang, Hsin-Chang Lee
  • Publication number: 20210294203
    Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.
    Type: Application
    Filed: June 7, 2021
    Publication date: September 23, 2021
    Inventors: Chin-Hsiang Lin, Chien-Cheng Chen, Hsin-Chang Lee, Chia-Jen Chen, Pei-Cheng Hsu, Yih-Chen Su, Gaston Lee, Tran-Hui Shen
  • Patent number: 11119398
    Abstract: A photo mask for extreme ultra violet (EUV) lithography includes a substrate having a front surface and a back surface opposite to the front surface, a multilayer Mo/Si stack disposed on the front surface of the substrate, a capping layer disposed on the multilayer Mo/Si stack, an absorber layer disposed on the capping layer, and a backside conductive layer disposed on the back surface of the substrate. The backside conductive layer is made of tantalum boride.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: September 14, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Chang Lee, Pei-Cheng Hsu, Ping-Hsun Lin, Ta-Cheng Lien, Tzu Yi Wang
  • Patent number: 11106126
    Abstract: In a method of manufacturing a photo mask, an etching mask layer having circuit patterns is formed over a target layer of the photo mask to be etched. The photo mask includes a backside conductive layer. The target layer is etched by plasma etching, while preventing active species of plasma from attacking the backside conductive layer.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: August 31, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Chang Lee, Pei-Cheng Hsu, Ta-Cheng Lien, Tzu Yi Wang
  • Publication number: 20210223678
    Abstract: An extreme ultra-violet (EUV) mask and method for fabricating the same is disclosed. For example, the EUV mask includes a substrate, a multi-layered mirror layer formed on the substrate, a metal capping layer formed on the multi-layered mirror layer, and a multi-layered absorber layer formed on the metal capping layer. The multi-layered absorber layer includes features etched into the multi-layered absorber layer to define structures on a semiconductor device.
    Type: Application
    Filed: January 17, 2020
    Publication date: July 22, 2021
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pei-Cheng HSU, Ta-Cheng LIEN, Hsin-Chang LEE
  • Publication number: 20210223679
    Abstract: A reflective mask includes a substrate, a reflective multilayer disposed on the substrate, a capping layer disposed on the reflective multilayer, and an absorber layer disposed on the capping layer. The absorber layer includes one or more alternating pairs of a first Cr based layer and a second Cr based layer different from the first Cr based layer.
    Type: Application
    Filed: January 16, 2020
    Publication date: July 22, 2021
    Inventors: Pei-Cheng HSU, Ching-Huang CHEN, Hung-Yi TSAI, Ming-Wei CHEN, Ta-Cheng LIEN, Hsin-Chang LEE
  • Publication number: 20210200078
    Abstract: A reflective mask blank includes a substrate, a reflective multilayer (RML) disposed on the substrate, a capping layer disposed on the reflective multilayer, and an absorber layer disposed on the capping layer. The absorber layer has length or width dimensions smaller than the capping layer, and part of the capping layer is exposed by the absorber layer. The dimension of the absorber layer and the hard mask layer ranges between 146 cm to 148 cm. The dimensions of the substrate, the RML, and the capping layer range between 150 cm to 152 cm.
    Type: Application
    Filed: October 29, 2020
    Publication date: July 1, 2021
    Inventors: Hsin-Chang LEE, Pei-Cheng HSU, Ta-Cheng LIEN, Wen-Chang HSUEH
  • Patent number: 11048158
    Abstract: A method comprises receiving a workpiece that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further comprises patterning the absorber layer to provide first trenches corresponding to circuit patterns on a wafer, and patterning the absorber layer, the capping layer, and the reflective multilayer to provide second trenches corresponding to a die boundary area on the wafer, thereby providing an extreme ultraviolet lithography (EUVL) mask. The method further comprises treating the EUVL mask with a treatment chemical that prevents exposed surfaces of the absorber layer from oxidation.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: June 29, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pei-Cheng Hsu, Yih-Chen Su, Chi-Kuang Tsai, Ta-Cheng Lien, Tzu Yi Wang, Jong-Yuh Chang, Hsin-Chang Lee
  • Patent number: 11029593
    Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: June 8, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Hsiang Lin, Chien-Cheng Chen, Hsin-Chang Lee, Chia-Jen Chen, Pei-Cheng Hsu, Yih-Chen Su, Gaston Lee, Tran-Hui Shen
  • Publication number: 20210033960
    Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.
    Type: Application
    Filed: January 29, 2020
    Publication date: February 4, 2021
    Inventors: Pei-Cheng Hsu, Chun-Fu Yang, Ta-Cheng Lien, Hsin-Chang Lee
  • Patent number: 10866504
    Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Hsiang Lin, Chien-Cheng Chen, Hsin-Chang Lee, Chia-Jen Chen, Pei-Cheng Hsu, Yih-Chen Su, Gaston Lee, Tran-Hui Shen
  • Publication number: 20200264505
    Abstract: A pellicle includes a frame. The frame includes a check valve, wherein the check valve is configured to permit gas flow from an interior of the pellicle to an exterior of the pellicle; and a bottom surface of the frame defines only a single recess therein. The pellicle further includes a gasket configured to fit within the single recess.
    Type: Application
    Filed: May 5, 2020
    Publication date: August 20, 2020
    Inventors: Chue San YOO, Hsin-Chang LEE, Pei-Cheng HSU, Yun-Yue LIN