Patents by Inventor Pei-Lin Huang

Pei-Lin Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130093202
    Abstract: A hand strap on a tablet-style electronic device's jacket is installed on at least one lateral side of the jacket and comprises: a belt with a fixed end and a free end; a stress relief pad; a first adherent member and a second adherent member which are mutually fastened and located at the belt and its free end, respectively. The belt's fixed end is fastened to the jacket's fixed component; the first adherent member is installed between the belt's fixed end and free end; the second adherent member is adjacent to the belt's free end. The belt's free end which penetrates clearance holes on the stress relief pad and a fold-back component at an identical side as the fixed component can return so that the first adherent member on the free end adheres to the second adherent member.
    Type: Application
    Filed: October 12, 2012
    Publication date: April 18, 2013
    Inventor: Pei-Lin HUANG
  • Publication number: 20130004012
    Abstract: An electronic tablet device's sound guide cover comprises a shield and a sound guide member: the shield is a tabular member with some fastener devices at the shield's corners and relies on the fastener devices to clasp the electronic tablet device and adhere to the electronic tablet device's external cover; the sound guide member on the shield corresponds to the electronic tablet device's speaker; the sound guide member and the speaker form a gap in between; the sound guide member and the electronic tablet device's external cover form a sound guide channel in between; the sound guide channel has a sound outlet facing the electronic tablet device's front and guiding audio or sound out of the electronic tablet device to a user.
    Type: Application
    Filed: June 27, 2012
    Publication date: January 3, 2013
    Inventor: Pei-Lin HUANG
  • Publication number: 20120298394
    Abstract: An anti-shedding structure for a tablet PC comprises: a protecting case, having a bottom, the edge or corners of the bottom having plural fastening portions, the edge of the protecting case having a connecting portion, the shape of the inner surface of the connecting portion fitting the shape of the back surface of the tablet PC, the connecting portion being characterized in that: a connecting component has a first end and a second end, the second end is through the connecting portion at the edge of the protecting case, the second end exposes at the outer surface of the connecting portion, the shape of the first end fits the inner surface of the connecting portion, so that the first end and the inner surface can be tightly fit to each other; and an anti-shedding band is through the second end at the connecting portion.
    Type: Application
    Filed: August 1, 2012
    Publication date: November 29, 2012
    Inventor: Pei-Lin HUANG
  • Publication number: 20120280949
    Abstract: A touch pen comprises a barrel, a laser module, a touch head and batteries: the barrel with a hollow interior which is separated into a barrel part and a necking nib part; the laser module which is disposed in the barrel and close to the nib part for generation of a laser beam as one pointer; the touch head featuring conductivity, covering the nib part and provided with a penetrating optical channel for a laser beam; the batteries held in the barrel part and supplying electricity necessary to the laser module; the touch pen is applicable to operation of a capacitive touch panel and regarded as one pointer projecting a laser spot.
    Type: Application
    Filed: May 2, 2012
    Publication date: November 8, 2012
    Inventor: Pei-Lin HUANG
  • Publication number: 20120261539
    Abstract: A cushion pad apparatus according to the present invention comprises a cushion pad having at least a receiving surface and a bottom surface; and an insertion frame selectively is contoured on said receiving surface. The insertion frame has an insertion well, and the insertion frame is disposed at a prescribed angle from said bottom surface, where adjustment of the prescribed angle operates to subject the insertion frame to move into an inclined position. A flat panel electronic device, upon disposition within the insertion frame, is supported at the prescribed angle accordingly as a structural consequence of the insertion well, while benefiting a user with subjecting the flat panel to face a user in a more direct, face-to-face fashion.
    Type: Application
    Filed: April 18, 2012
    Publication date: October 18, 2012
    Inventor: Pei-Lin HUANG
  • Publication number: 20120228169
    Abstract: An anti-shedding structure for a tablet PC comprises: a protection device, which has four sides that form a positioning room, the top surface of the protection device having a window; and at least one anti-shedding band, which is able to adjust a tightness thereof and connected with at least one of the four sides.
    Type: Application
    Filed: March 7, 2011
    Publication date: September 13, 2012
    Inventor: Pei-Lin HUANG
  • Patent number: 8255608
    Abstract: An exemplary motherboard includes a substrate, a first CPU socket provided on the substrate for receiving a first CPU, a second CPU socket provided on the substrate for receiving a second CPU, a switching circuit connected to the first CPU and the second CPU, at least one quick path interconnect (QPI) bus connecting the first CPU to the second CPU, a number of first peripheral component interconnect express (PCI-e) interfaces connected to the first CPU via a number of first wires, a number of second PCI-e interfaces connected to the second CPU via a number of second wires, and a activating chip connected to the first CPU and the second CPU via the switching circuit and configured for starting a peripheral device connected to the first PCI-e interfaces or the second PCI-e interfaces.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: August 28, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Te-Chung Kuan, Pei-Lin Huang, Chan-Kuei Hsu
  • Publication number: 20120214103
    Abstract: A method for fabricating semiconductor devices with fine patterns includes the steps of providing a semiconductor substrate, forming a first photoresist layer on the semiconductor substrate, forming a second photoresist layer on the first photoresist layer, and performing an exposing process to change the state of at least one first portion of the first photoresist layer and the state of at least one second portion of the second photoresist layer. The conventional double patterning technique requires that the exposure processes be performed twice, which requires very precise alignment between the two exposure processes. In contrast, the embodiment of the present invention can perform the double patterning process with only one exposure process without requiring the precise alignment between the two exposure processes.
    Type: Application
    Filed: February 18, 2011
    Publication date: August 23, 2012
    Applicant: NANYA TECHNOLOGY CORP.
    Inventors: Ming Kang Wei, Pei Lin Huang, Yi Ming Wang, Ying Chung Tseng
  • Patent number: 8173539
    Abstract: A method for fabricating a metal redistribution layer is described. A first opening and a second opening are formed in a dielectric layer over a first region and a second region thereof, respectively. A plurality of third openings are formed in the dielectric layer exposed by the first opening in the first region and a plurality of fourth openings are formed in the dielectric layer exposed by the second opening in the second region. A metal material is formed over the dielectric layer and in the first, second, third and fourth openings. A plurality of recesses is formed in the metal materials overlying the third and fourth openings. The metal material in the first region is patterned by using the recesses formed in portions of the metal material overlying the fourth openings in the second region as an alignment mark to form a metal redistribution layer.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: May 8, 2012
    Assignee: Nanya Technology Corporation
    Inventors: Pei-Lin Huang, Chun-Yen Huang, Yuan-Yuan Lin, Yu Shan Chiu, Yi-Min Tseng
  • Patent number: 8142086
    Abstract: A semiconductor manufacturing process is provided. First, a wafer with a material layer and an exposed photoresist layer formed thereon is provided, wherein the wafer has a center area and an edge area. Thereafter, the property of the exposed photoresist layer is varied, so as to make a critical dimension of the exposed photoresist layer in the center area different from that of the same in the edge area. After the edge property of the exposed photoresist layer is varied, an etching process is performed to the wafer by using the exposed photoresist layer as a mask, so as to make a patterned material layer having a uniform critical dimension formed on the wafer.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: March 27, 2012
    Assignee: Nanya Technology Corporation
    Inventors: Pei-Lin Huang, Yi-Ming Wang, Chun-Yen Huang
  • Patent number: 8124319
    Abstract: A semiconductor lithography process. A photoresist film is coated on a substrate. The photoresist film is subjected to a flood exposure to blanket expose the photoresist film across the substrate to a first radiation with a relatively lower dosage. The photoresist film is then subjected to a main exposure using a photomask to expose the photoresist film in a step and scan manner to a second radiation with a relatively higher dosage. After baking, the photoresist film is developed.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: February 28, 2012
    Assignee: Nanya Technology Corp.
    Inventors: Pei-Lin Huang, Chun-Yen Huang, Yi-Ming Wang
  • Patent number: 8113850
    Abstract: A computer includes an expansion card, a mother board and a connector. The mother board includes an expansion slot thereon. The expansion slot corresponds to the expansion card. The connector connects the expansion card and the expansion slot.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: February 14, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Tsung-Kuel Liao, Te-Chung Kuan, Pei-Lin Huang
  • Publication number: 20110296075
    Abstract: An exemplary motherboard includes a substrate, a first CPU socket provided on the substrate for receiving a first CPU, a second CPU socket provided on the substrate for receiving a second CPU, a switching circuit connected to the first CPU and the second CPU, at least one quick path interconnect (QPI) bus connecting the first CPU to the second CPU, a number of first peripheral component interconnect express (PCI-e) interfaces connected to the first CPU via a number of first wires, a number of second PCI-e interfaces connected to the second CPU via a number of second wires, and a activating chip connected to the first CPU and the second CPU via the switching circuit and configured for starting a peripheral device connected to the first PCI-e interfaces or the second PCI-e interfaces.
    Type: Application
    Filed: July 26, 2010
    Publication date: December 1, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Te-Chung Kuan, Pei-Lin Huang, Chan-Kuei Hsu
  • Publication number: 20110250540
    Abstract: A semiconductor lithography process. A photoresist film is coated on a substrate. The photoresist film is subjected to a flood exposure to blanket expose the photoresist film across the substrate to a first radiation with a relatively lower dosage. The photoresist film is then subjected to a main exposure using a photomask to expose the photoresist film in a step and scan manner to a second radiation with a relatively higher dosage. After baking, the photoresist film is developed.
    Type: Application
    Filed: April 12, 2010
    Publication date: October 13, 2011
    Inventors: Pei-Lin Huang, Chun-Yen Huang, Yi-Ming Wang
  • Publication number: 20110244395
    Abstract: A method for haze control in a semiconductor process, includes: providing an exposure tool with a photocatalyzer coating inside and exposing a wafer in the exposure tool in the presence of activation of the photocatalyzer coating. The photocatalyzer coating may be formed within an opaque region of a reticle.
    Type: Application
    Filed: April 6, 2010
    Publication date: October 6, 2011
    Inventors: Pei-Lin Huang, Yi-Ming Wang, Chun-Yen Huang
  • Publication number: 20110157073
    Abstract: A touch structure and a touch display apparatus comprising the same are provided. The touch display apparatus further comprises a touch controller which is electrically connected to the touch structure. The touch structure comprises a display panel, a transparent conductive film and a conductor. The display panel has a light-tight region. A resistance coefficient of the conductor is smaller than a resistance coefficient of the transparent conductive film. The conductor is disposed between the light-tight region of the display panel and the transparent conductive film to form a signal conduction path. The transparent conductive film generates a touch signal when being touched. The touch signal is adapted to be conducted to the touch controller via the signal conduction path so that the touch controller may operate in response to the touch signal.
    Type: Application
    Filed: May 26, 2010
    Publication date: June 30, 2011
    Applicant: PRIME VIEW INTERNATIONAL CO., LTD
    Inventors: San-Long LIN, Pei-Lin HUANG
  • Publication number: 20110151683
    Abstract: A computer includes an expansion card, a mother board and a connector. The mother board includes an expansion slot thereon. The expansion slot corresponds to the expansion card. The connector connects the expansion card and the expansion slot.
    Type: Application
    Filed: December 17, 2009
    Publication date: June 23, 2011
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: TSUNG-KUEL LIAO, TE-CHUNG KUAN, PEI-LIN HUANG
  • Patent number: 7932533
    Abstract: A pixel structure driven by a scan line and a data line arranged on a substrate is provided. The pixel structure includes a control unit, an OEL unit and a semi-transparent reflector structure. The control unit driven by the scan line and the data line is arranged on the substrate. The OEL unit is arranged on the substrate and includes a transparent electrode, a light-emitting layer and a metal electrode. The transparent electrode is electrically connected with the control unit. The light-emitting layer is disposed on the transparent electrode. The metal electrode is disposed on the light-emitting layer. The semi-transparent reflector structure is sandwiched between the substrate and the OEL unit, and includes at least a plurality of first and second dielectric layers. The first and second dielectric layers are alternately stacked, and the refractive index of the first dielectric layers is different from that of the second dielectric layers.
    Type: Grant
    Filed: January 12, 2010
    Date of Patent: April 26, 2011
    Assignee: Chunghwa Picture Tubes, LTD.
    Inventors: Liang-Yuan Wang, Chih-Kwang Tzen, Pei-Lin Huang, Yi-Lung Kao, Ya-Ping Tsai, Shuenn-Jiun Tang
  • Publication number: 20110081618
    Abstract: Litho-litho-etch double patterning (LLE-DP) methods using silylation freeze technology are presented. The LLE-DP method using a silylation freeze reaction comprises providing a substrate with a first photoresist layer thereon. A first exposure process is performed defining a first latent image in a first photoresist. The first patterned structures on the substrate is developed and baked for photo-generated acid diffusion. The photo-generated acid is reacted with a silylation agent to freeze the first patterned structures. A second photoresist layer is formed overlying the substrate. A second lithography process is performed to create second patterned structures on the substrate. The first patterned structures and the second patterned structures are interlaced each other.
    Type: Application
    Filed: October 6, 2009
    Publication date: April 7, 2011
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: Yi-Ming Wang, Pei-Lin Huang, Ying-Chung Tseng
  • Publication number: 20110059622
    Abstract: A semiconductor manufacturing process is provided. First, a wafer with a material layer and an exposed photoresist layer formed thereon is provided, wherein the wafer has a center area and an edge area. Thereafter, the property of the exposed photoresist layer is varied, so as to make a critical dimension of the exposed photoresist layer in the center area different from that of the same in the edge area. After the edge property of the exposed photoresist layer is varied, an etching process is performed to the wafer by using the exposed photoresist layer as a mask, so as to make a patterned material layer having a uniform critical dimension formed on the wafer.
    Type: Application
    Filed: October 19, 2010
    Publication date: March 10, 2011
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: Pei-Lin Huang, Yi-Ming Wang, Chun-Yen Huang