Patents by Inventor Pekka J. Soininen

Pekka J. Soininen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030096468
    Abstract: This invention relates to manufacturing of integrated circuits (ICs) and especially conductive layers suitable for use in an IC. According to the preferred method a metal oxide thin film is deposited on a substrate surface and reduced thereafter essentially into a metallic form with an organic reducing agent. The metal oxide is preferably deposited according to the principles of atomic layer deposition (ALD) using a metal source chemical and an oxygen source chemical. The reduction step is preferably carried out in an ALD reactor using one or more vaporized organic compounds that contain at least one functional group selected from the group consisting of —OH, —CHO and —COOH.
    Type: Application
    Filed: November 19, 2002
    Publication date: May 22, 2003
    Inventors: Pekka J. Soininen, Kai-Erik Elers, Suvi Haukka
  • Publication number: 20020187631
    Abstract: The present invention provides a method of fabricating a semiconductor device, which could advance the commercialization of semiconductor devices with a copper interconnect. In a process of metal interconnect line fabrication, a TiN thin film combined with an Al intermediate layer is used as a diffusion barrier on trench or via walls. For the formation, Al is deposited on the TiN thin film followed by copper filling the trench. Al diffuses to TiN layer and reacts with oxygen or nitrogen, which will stuff grain boundaries efficiently, thereby blocking the diffusion of copper successfully.
    Type: Application
    Filed: December 5, 2001
    Publication date: December 12, 2002
    Inventors: Ki-Bum Kim, Pekka J. Soininen, Ivo Raaijmakers
  • Patent number: 6482740
    Abstract: This invention relates to manufacturing of integrated circuits (ICs) and especially conductive layers suitable for use in an IC. According to the preferred method a metal oxide thin film is deposited on a substrate surface and reduced thereafter essentially into a metallic form with an organic reducing agent. The metal oxide is preferably deposited according to the principles of atomic layer deposition (ALD) using a metal source chemical and an oxygen source chemical. The reduction step is preferably carried out in an ALD reactor using one or more vaporized organic compounds that contain at least one functional group selected from the group consisting of —OH, —CHO and —COOH.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: November 19, 2002
    Assignee: ASM Microchemistry Oy
    Inventors: Pekka J. Soininen, Kai-Erik Elers, Suvi Haukka
  • Publication number: 20020098685
    Abstract: The invention relates generally to improved silicon carbide deposition during dual damascene processing. In one aspect of the invention, copper oxide present on a substrate is reduced at least partially to copper prior to deposition of a silicon carbide or silicon oxycarbide layer thereon. In the preferred embodiment the reduction is accomplished by contacting the substrate with one or more organic reducing agents. The reduction process may be carried out in situ, in the same reaction chamber as subsequent processing steps. Alternatively, it may be carried out in a module of a cluster tool.
    Type: Application
    Filed: October 9, 2001
    Publication date: July 25, 2002
    Inventors: Auguste J.L. Sophie, Hessel Sprey, Pekka J. Soininen, Kai-Erik Elers
  • Publication number: 20020092584
    Abstract: The invention relates generally to the prevention of copper oxidation during copper anneal processes. In one aspect of the invention, copper oxidation is prevented by carrying out the anneal in the presence of one or more organic reducing agents.
    Type: Application
    Filed: November 13, 2001
    Publication date: July 18, 2002
    Inventors: Pekka J. Soininen, Kai-Erik Elers, Ernst H.A. Granneman
  • Publication number: 20020004293
    Abstract: This invention relates to manufacturing of integrated circuits (ICs) and especially conductive layers suitable for use in an IC. According to the preferred method a metal oxide thin film is deposited on a substrate surface and reduced thereafter essentially into a metallic form with an organic reducing agent. The metal oxide is preferably deposited according to the principles of atomic layer deposition (ALD) using a metal source chemical and an oxygen source chemical. The reduction step is preferably carried out in an ALD reactor using one or more vaporized organic compounds that contain at least one functional group selected from the group consisting of —OH, —CHO and —COOH.
    Type: Application
    Filed: May 15, 2001
    Publication date: January 10, 2002
    Inventors: Pekka J. Soininen, Kai-Erik Elers, Suvi Haukka