Abstract: A display device includes a plurality of sub pixels, a first data line, and a second data line. The first data line is configured to provide a first pixel voltage to a first sub pixel of the sub pixels, and the first sub pixel has a first color. The second data line is configured to provide a second pixel voltage to a second sub pixel of the sub pixels, and the second sub pixel has the first color. The first data line and the second data line are disposed between two adjacent sub pixels of the sub pixels. Polarities of the first pixel voltage and the second pixel voltage are different.

Abstract: A display device includes an array substrate, two light-emitting element substrates, a plurality of first connection elements, and a plurality of second connection elements. The array substrate includes two pixel circuits. Each of the pixel circuits includes three sub-pixel circuits, three first conductive pads, and a second conductive pad. Each of the light-emitting element substrates includes three light-emitting elements, three first connection pads, and a second connection pad. The first connection elements respectively and electrically connect corresponding one of the first conductive pads to corresponding one of the first connection pads. The second connection elements respectively and electrically connect corresponding one of the second conductive pads to corresponding one of the second connection pads.

Abstract: A device substrate comprising a substrate, a first pad, a second pad, a plurality of first power lines, a plurality of second power lines, and a plurality of control units is provided. The first pad is disposed on the first side of the device substrate. The second pad is disposed on the second side of the device substrate. The second side is opposite the first side. The first power lines are electrically connected to the first pad. The second power lines are electrically connected to the second pad. The control unit is electrically connected to at least one of the first power line and the second power line. The first pad does not overlap the second pad in a first direction perpendicular to the first side or in a second direction perpendicular to the second side. A display panel is also provided. A tiled display is also provided.

Abstract: An ESD protection circuit includes a first diode element, a second diode element, a first clamping circuit, a second clamping circuit, and a protection circuit. The first diode element is coupled between a first power node and an input node, wherein the input node is coupled with an internal circuit. The second diode element is coupled between a second power node and the input node. The first clamping circuit is coupled between the first power node and the second power node. The second clamping circuit is coupled between the second power node and the input node. The protection circuit is coupled between the first power node and the second power node, and configured to transmit a current corresponding to an ESD event to a grounded capacitor.

Abstract: The disclosure provides a multiplexer and a display panel. In the multiplexer, a first and second output ends are respectively connected to a first and second data transmission lines. Control ends of a first and second switches are respectively coupled to a first and second control lines. First ends of the first and second switches are respectively coupled to the first and second output ends. The first data transmission line, the second data transmission line, the first control line, and the second control line extend along a first direction, and the first output end and the second output end are disposed on opposite sides of the first control line.

Abstract: A display panel is provided. The display panel includes a substrate, a light-shielding positioning layer and a transparent positioning layer. The substrate has a first surface and a second surface opposite to the first surface. The light-shielding positioning layer is disposed on the first layer and has at least one first alignment pattern. The transparent positioning layer is disposed on the second layer and has at least one second alignment pattern. In a direction perpendicular to the substrate, the at least one first alignment pattern overlaps with the at least one second alignment pattern. A manufacturing method of the display panel is also provided.

Abstract: A liquid crystal display apparatus includes an array substrate, a liquid crystal layer, and an opposite substrate. The array substrate includes a first pixel and a second pixel. The first pixel includes a first active device and a first pixel electrode. The first pixel electrode is electrically connected to the first active device via a first through-hole. The first pixel electrode includes a plurality of first electrode strips extended along a first direction. The first through-hole is located at a first corner of the first pixel electrode. The second pixel includes a second active device and a second pixel electrode. The second pixel electrode is connected to the second active device via a second through-hole. The second pixel electrode includes a plurality of second electrode strips extended along a second direction. The second through-hole is located at a second corner of the second pixel electrode.

Abstract: A method for manufacturing a pixel unit includes the following steps. A channel layer is formed. A first pattern layer is formed above the channel layer and includes a scan line and a gate electrode. A second pattern layer is formed above the first pattern layer and includes a data line and a source electrode, where the source electrode is electrically connected to the channel layer. A third pattern layer is formed above the second pattern layer and includes a drain electrode and an auxiliary electrode, where the drain electrode is electrically connected to the channel layer. The auxiliary electrode is electrically connected to the scan line through a first contact hole.

Abstract: A liquid crystal display apparatus includes an array substrate, a liquid crystal layer, and an opposite substrate. The array substrate includes a first pixel and a second pixel. The first pixel includes a first active device and a first pixel electrode. The first pixel electrode is electrically connected to the first active device via a first through-hole. The first pixel electrode includes a plurality of first electrode strips extended along a first direction. The first through-hole is located at a first corner of the first pixel electrode. The second pixel includes a second active device and a second pixel electrode. The second pixel electrode is connected to the second active device via a second through-hole. The second pixel electrode includes a plurality of second electrode strips extended along a second direction. The second through-hole is located at a second corner of the second pixel electrode.

Abstract: A pixel circuit includes a storage capacitor, a first switch, and a second switch. The first switch is electrically connected to a first end of the storage capacitor, and configured to provide a data voltage to the first end of the storage capacitor according to a gate signal. The second switch is electrically connected between the first end of the storage capacitor and a second end of the storage capacitor, and configured to receive a first operating voltage from the second end of the storage capacitor and provide the first operating voltage to the first end of the storage capacitor.

Abstract: A display apparatus and a driving method of a display panel thereof are disclosed. The display apparatus includes the display panel and a common voltage setting circuit. The display panel has a plurality of pixels and a plurality of common electrode lines and receives a plurality of pixel voltages. Each of the pixels is coupled to the corresponding common electrode line and receives the corresponding pixel voltage. The common voltage setting circuit is coupled to the common electrode lines. A common voltage having a normal voltage level is supplied to the common electrode lines during a first frame period. The common voltage having a complementary high voltage level or a complementary low voltage level is supplied to the common electrode lines during a second frame period. Each of the pixels receives the same pixel voltage during the first frame period and the second frame period.

Abstract: A display apparatus is provided. In a column inversion driving mode, adjacent pixels in an extension direction of scan lines are driven to have the same polarity, so as to reduce the power consumption of the display apparatus and prevent light leakage occurring at a junction of two adjacent pixels. Therefore, the display quality of the display apparatus is enhanced.

Abstract: A touch display panel and a driving method thereof are disclosed. The touch display panel includes a plurality of pixels, a plurality of viewing angle control (VAC) electrode units, and a plurality of touch receiving electrode units. Each pixel includes a pixel electrode and a common electrode. At least one of the pixel electrode and the common electrode has a plurality of slits. The VAC electrode units are arranged along a first direction. Each VAC electrode unit includes a plurality of first VAC electrode series and a plurality of second VAC electrode series, and each first VAC electrode series and each second VAC electrode series are alternately arranged along the first direction. The touch receiving electrode units are arranged along the second direction, and the VAC electrode units and the touch receiving electrode unit form a touch unit.

Abstract: A display device includes a plurality of sub pixels, a first data line, and a second data line. The first data line is configured to provide a first pixel voltage to a first sub pixel of the sub pixels, and the first sub pixel has a first color. The second data line is configured to provide a second pixel voltage to a second sub pixel of the sub pixels, and the second sub pixel has the first color. The first data line and the second data line are disposed between two adjacent sub pixels of the sub pixels. Polarities of the first pixel voltage and the second pixel voltage are different.

Abstract: A display panel includes: a display region, a plurality of data lines, a de-multiplexing circuit, and an operation switching circuit. The de-multiplexing circuit has a plurality of input terminals coupled to a plurality of data driving signal lines, a plurality of output terminals coupled to the plurality of data lines, and at least one de-multiplexing control terminal coupled to at least one driving control signal. The operation switching circuit is configured to switch a conduction status between the at least one de-multiplexing control terminal of the de-multiplexing circuit and a second control signal line according to a voltage of a first control signal line.

Abstract: A method for manufacturing a pixel unit includes the following steps. A channel layer is formed. A first pattern layer is formed above the channel layer and includes a scan line and a gate electrode. A second pattern layer is formed above the first pattern layer and includes a data line and a source electrode, where the source electrode is electrically connected to the channel layer. A third pattern layer is formed above the second pattern layer and includes a drain electrode and an auxiliary electrode, where the drain electrode is electrically connected to the channel layer. The auxiliary electrode is electrically connected to the scan line through a first contact hole.

Abstract: A gate driving circuit includes a plurality of shift register circuits, where the shift register circuits are configured to drive a plurality of pixel rows. The gate driving circuit may be operated in a first mode and a second mode. When the gate driving circuit is operated in the first mode, the gate driving circuit is configured to drive, in a single frame, all pixel rows to be displayed. When the gate driving circuit is operated in the second mode, the gate driving circuit is configured to drive, in the single frame, some of the pixel rows to be displayed, and driven pixel rows of two adjacent frames are different.

Abstract: A control circuit includes a switching circuit and a select circuit. The switching circuit is configured to receive a scan signal, a first switching signal, and a second switching signal, and output the first switching signal and the second switching signal according to the scan signal. The select circuit is configured to receive a first supply voltage, a second supply voltage, the first switching signal, and the second switching signal, and selectively output the first supply voltage or the second supply voltage to a target electrode according to the first switching signal and the second switching signal.

Abstract: A touch display panel and a driving method thereof are disclosed. The touch display panel includes a plurality of pixels, a plurality of viewing angle control (VAC) electrode units, and a plurality of touch receiving electrode units. Each pixel includes a pixel electrode and a common electrode. At least one of the pixel electrode and the common electrode has a plurality of slits. The VAC electrode units are arranged along a first direction. Each VAC electrode unit includes a plurality of first VAC electrode series and a plurality of second VAC electrode series, and each first VAC electrode series and each second VAC electrode series are alternately arranged along the first direction. The touch receiving electrode units are arranged along the second direction, and the VAC electrode units and the touch receiving electrode unit form a touch unit.

Abstract: A multiplexer is provided herein. The multiplexer has a plurality of first driving units and a plurality of second driving units. Each of the first driving units has a first data voltage input terminal, and each of the second driving units has a second data voltage input terminal. The first data voltage input terminal and the second data voltage input terminal are configured to receive pixel voltage signals with different polarities. In the first driving unit, a voltage difference between a gate and a drain of a transistor is controlled by a first reset signal, wherein the transistor of the first driving unit is coupled to the first data voltage input terminal and a first data line. In the second driving unit, a voltage difference between a gate and a drain of a transistor is controlled by a second reset signal, wherein the transistor of the second driving unit is coupled to the second data voltage input terminal and a second data line.