Patents by Inventor Peng Fang
Peng Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150176103Abstract: A process includes roasting a TiO2-containing material in the presence of an alkaline material to form a roasted product; leaching the roasted product with an acidic solution to form a leach liquor; extracting the leach liquor with an extractant to form a raffinate including a Ti4+ species; hydrolyzing the Ti4+ species to form a hydrolyzed material that includes H2TiO3; calcining the hydrolyzed material; and recovering a TiO2 product.Type: ApplicationFiled: December 28, 2011Publication date: June 25, 2015Inventors: Zhigang Zak Fang, Scott Middlemas, Peng Fang
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Publication number: 20150120264Abstract: Methods, systems, and non-transitory, computer-readable media for tuning a model of a subterranean domain. The method may include determining a relationship between a first parameter of the model and a second parameter of the model. A modification to the first parameter causes the second parameter to be modified according to the relationship. The method may also include receiving data representing a physical characteristic of a reservoir represented in the model of the subterranean domain, and modifying the first parameter based at least partially on the data. The method may also include modifying the second parameter based on the relationship, by operation of a processor. The method may further include updating the model using the first parameter and the second parameter after modifying the first parameter and after modifying the second parameter.Type: ApplicationFiled: August 19, 2014Publication date: April 30, 2015Inventors: Peng Fang, Wentao Zhou, Ji Li, JinYong Wu, Richard Carlin, Benin Chelinsky Jeyachandra, Li Ma
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Patent number: 8788252Abstract: A method, apparatus and program product utilize an analytical reservoir simulator to perform inflow simulation for a node during nodal analysis in a multi-well petroleum production system. By doing so, time-lapse nodal analysis may be performed of a transient production system in a multi-well context, often taking into account production history and the transient behavior of a reservoir system. Moreover, in some instances, an interference effect from different wells in a multi-well production system may be considered, and in some instances nodal analysis may be performed simultaneously for multiple wells. Multi-layer nodal analysis may also be performed in some instances to account for the pressure loss in a wellbore between multiple layers.Type: GrantFiled: October 25, 2011Date of Patent: July 22, 2014Assignee: Schlumberger Technology CorporationInventors: Wentao Zhou, Raj Banerjee, Eduardo Proano, Ji Li, Yinli Wang, Peng Fang, Nelson Bolanos, R. K. Michael Thambynayagam, Gregory P. Grove, Jeffrey B. Spath
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Patent number: 8469580Abstract: An edge-lighting type backlight module includes a light guide plate, a light source module, a back plate, a thermal conductive element, and a thermal insulating element. The light guide plate has a light-emitting surface, a bottom surface opposite the light-emitting surface, and at least one side surface connected between the light-emitting surface and the bottom surface. The light source module is disposed adjacent to the side surface, and the back plate is disposed adjacent to the bottom surface. The thermal conductive element has a base portion touching the light source module and an extension portion extending to one side of the back plate. The thermal insulating element is connected between the back plate and the thermal conductive element to reduce the heat conduction between the light source module and the back plate.Type: GrantFiled: December 29, 2010Date of Patent: June 25, 2013Assignee: Young & Lighting Technology CorporationInventor: Peng-Fang Chen
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Patent number: 8412919Abstract: A method for controlling a multi-port Network Interface Card (NIC) is provided. In a computer using the multi-port NIC with a plurality of NIC ports, a plurality of control options is set into a Basic Input/Output System (BIOS) setup menu, so that a user individually controls the NIC ports. Furthermore, due to the characteristic that after a reference code process in the BIOS restarts a system, the set of hardware becomes effective, an action of controlling the NIC ports is set before a reference code process restarts the system.Type: GrantFiled: December 23, 2010Date of Patent: April 2, 2013Assignee: Inventec CorporationInventor: Peng-Fang Luo
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Publication number: 20120117366Abstract: A method for controlling a multi-port Network Interface Card (NIC) is provided. In a computer using the multi-port NIC with a plurality of NIC ports, a plurality of control options is set into a Basic Input/Output System (BIOS) setup menu, so that a user individually controls the NIC ports. Furthermore, due to the characteristic that after a reference code process in the BIOS restarts a system, the set of hardware becomes effective, an action of controlling the NIC ports is set before a reference code process restarts the system.Type: ApplicationFiled: December 23, 2010Publication date: May 10, 2012Applicant: INVENTEC CORPORATIONInventor: Peng-Fang Luo
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Publication number: 20120101787Abstract: A method, apparatus and program product utilize an analytical reservoir simulator to perform inflow simulation for a node during nodal analysis in a multi-well petroleum production system. By doing so, time-lapse nodal analysis may be performed of a transient production system in a multi-well context, often taking into account production history and the transient behavior of a reservoir system. Moreover, in some instances, an interference effect from different wells in a multi-well production system may be considered, and in some instances nodal analysis may be performed simultaneously for multiple wells. Multi-layer nodal analysis may also be performed in some instances to account for the pressure loss in a wellbore between multiple layers.Type: ApplicationFiled: October 25, 2011Publication date: April 26, 2012Inventors: WENTAO ZHOU, RAJ BANERJEE, EDUARDO PROANO, JI LI, YINLI WANG, PENG FANG, NELSON BOLANOS, R.K. MICHAEL THAMBYNAYAGAM, GREGORY P. GROVE, JEFFREY B. SPATH
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Patent number: 8113698Abstract: A light-emitting diode (LED) light bulb and an application thereof are described. The light-emitting diode light bulb comprises: a light-emitting diode light source module; a base, wherein the light-emitting diode light source module is disposed on the base; and a driver portion to drive the light-emitting diode light source module, comprising a rotation shaft, wherein the driver portion is connected to the base via the rotation shaft, such that the light-emitting diode light source module can rotate relative to the driver portion.Type: GrantFiled: August 6, 2009Date of Patent: February 14, 2012Assignee: Chi Mei Lighting Technology Corp.Inventors: Wen-Liang Wu, Peng-Fang Chen, Yung-Pin Yang
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Publication number: 20110292314Abstract: A display apparatus and a backlight module are provided. The display apparatus includes a liquid crystal panel and a backlight module. The backlight module includes a frame, a plurality of latch members, and a backlight source. The frame has a receiving slot. The liquid crystal panel is disposed in the receiving slot. The latch members are disposed on the frame and located at an inner wall of the receiving slot. The latch members support the liquid crystal panel. A material of each latch member is a debris-resistant material. The backlight source is disposed on the frame and located at one side of the liquid crystal panel. The invention may prevent the producing of debris when the latch members and the liquid crystal panel are rubbed against each other.Type: ApplicationFiled: January 27, 2011Publication date: December 1, 2011Applicant: YOUNG LIGHTING TECHNOLOGY CORPORATIONInventors: Peng-Fang Chen, Shang-Chia Liu, Fan-Ti Cho, Lei-Ken Hung
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Publication number: 20110170315Abstract: An edge-lighting type backlight module includes a light guide plate, a light source module, a back plate, a thermal conductive element, and a thermal insulating element. The light guide plate has a light-emitting surface, a bottom surface opposite the light-emitting surface, and at least one side surface connected between the light-emitting surface and the bottom surface. The light source module is disposed adjacent to the side surface, and the back plate is disposed adjacent to the bottom surface. The thermal conductive element has a base portion touching the light source module and an extension portion extending to one side of the back plate. The thermal insulating element is connected between the back plate and the thermal conductive element to reduce the heat conduction between the light source module and the back plate.Type: ApplicationFiled: December 29, 2010Publication date: July 14, 2011Inventor: Peng-Fang CHEN
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Publication number: 20100238672Abstract: A light-emitting diode (LED) light bulb and an application thereof are described. The light-emitting diode light bulb comprises: a light-emitting diode light source module; a base, wherein the light-emitting diode light source module is disposed on the base; and a driver portion to drive the light-emitting diode light source module, comprising a rotation shaft, wherein the driver portion is connected to the base via the rotation shaft, such that the light-emitting diode light source module can rotate relative to the driver portion.Type: ApplicationFiled: August 6, 2009Publication date: September 23, 2010Applicant: CHI MEI LIGHTING TECHNOLOGY CORP.Inventors: Wen-Liang WU, Peng-Fang CHEN, Yung-Pin YANG
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Publication number: 20100070680Abstract: A memory management method during a power-on self test is used to perform an access management on an option ROM during a power-on self test after a personal computer is powered on. The memory management method includes the following steps. When a BIOS is booted, an option ROM is detected. A memory segment is designated in a conventional memory. It is determined whether the memory segment is empty or not. If the memory segment is not empty, a register segment with the same capacity as the memory segment is applied for from an extended memory, and data in the memory segment is moved to the register segment for being stored. If the memory segment is empty, data in the option ROM is moved to the memory segment. The option ROM in the memory segment is set.Type: ApplicationFiled: November 6, 2008Publication date: March 18, 2010Applicant: INVENTEC CORPORATIONInventors: Peng-Fang LUO, Yin DENG, Chih-Feng CHEN
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Patent number: 6216099Abstract: A test system and methodology to improve the performance and reliability of critical paths including stacked NAND gates with sub-minimum channel transistors employs one or more inverter based ring oscillators to generate reliability data. The reliability data is used to calibrate an aged transistor model, which describes the hot carrier reliability of sub-minimum channel length transistors. A computer simulation uses the calibrated, aged transistor model to simulate the critical path circuitry including the stacked NAND gates.Type: GrantFiled: September 5, 1997Date of Patent: April 10, 2001Assignee: Advanced Micro Devices, Inc.Inventors: Peng Fang, Sunil Shabde
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Patent number: 6180441Abstract: A field effect transistor is formed across a one or more trenches (26) or bars (120), thereby increasing the effective width of the channel region and the current-carrying capacity of the device.Type: GrantFiled: May 10, 1999Date of Patent: January 30, 2001Assignee: Advanced Micro Devices, Inc.Inventors: John T. Yue, Matthew S. Buynoski, Yowjuang W. Liu, Peng Fang
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Patent number: 6143632Abstract: A semiconductor device having reduced hot carrier degradation is achieved by doping the semiconductor substrate and gate oxide with deuterium. A conventional semiconductor device is formed with sequentially deposited metal layers and dielectric layers and a topside protective dielectric layer deposited thereon. Deuterium is introduced to the semiconductor device by using deuterium-containing reactants in at least one of the semiconductor manufacturing steps to passivate dangling silicon bonds at the silicon/oxide interface region.Type: GrantFiled: December 18, 1997Date of Patent: November 7, 2000Assignee: Advanced Micro Devices, Inc.Inventors: Emi Ishida, Peng Fang
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Patent number: 6140186Abstract: Asymmetrically doped source/drain regions of a transistor are formed employing protective insulating layers to prevent a portion of the gate electrode from receiving an excessive impurity implantation dose and penetrating through the underlying gate insulating layer into the semiconductor substrate. Sidewall spacers are employed during heavy implantation.Type: GrantFiled: November 20, 1998Date of Patent: October 31, 2000Assignee: Advanced Micro Devices, Inc.Inventors: Ming-Ren Lin, Peng Fang, Donald L. Wollesen
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Patent number: 6133746Abstract: A method for determining a reliable gate oxide thickness for a transistor involves subjecting test transistors to an alternating current (AC) voltage until the test transistors break down. The breakdown times of the test transistors are measured and correlated with the corresponding gate oxide thickness of the test transistor to form a reliability model of the transistor. The reliable gate oxide thickness is determined by extrapolating the reliability model out to a predetermined period of time for which reliability is desired, for example, ten years.Type: GrantFiled: September 30, 1998Date of Patent: October 17, 2000Assignee: Advanced Micro Devices, Inc.Inventors: Peng Fang, Hao Fang
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Patent number: 6043102Abstract: Plasma induced degradation of thin gate dielectric layers, e.g., silicon dioxide layers of less than 50 .ANG., is assessed by impressing a constant current density across the gate dielectric layer and measuring the resulting stress induced leakage current as a function of time. The sensitivity of the stress induced leakage current to traps generated in a thin gate dielectric layer enables the use of stress induced leakage current measurements to monitor plasma induced damage during various phases of semiconductor manufacturing.Type: GrantFiled: September 5, 1997Date of Patent: March 28, 2000Assignee: Advanced Micro Devices, Inc.Inventors: Peng Fang, Jiang Tao
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Patent number: 6023100Abstract: There is provided an improved metallization stack structure so as to produce a higher electromigration resistance and yet maintain a relatively low resistivity. The metallization stack structure includes a pure copper layer sandwiched between a top thin doped copper layer and a bottom thin doped copper layer. The top and bottom thin doped copper layers produce a higher electromigration resistance. The pure copper layer produces a relatively low resistivity.Type: GrantFiled: February 10, 1999Date of Patent: February 8, 2000Assignee: Advanced Micro Devices, Inc.Inventors: Jiang Tao, Peng Fang
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Patent number: 5994776Abstract: A method of forming low dielectric insulation between pairs of conductive lines separated by insulating material of a level of interconnection for integrated circuits by selectively removing portions of the insulating material to create spaces for containing a gas with a dielectric constant of slightly above 1. Preferably, the insulating material is a conformal source of silicon oxide, such as tetraethylorthosilicate. The resultant method forms an insulation separating the conductive lines whose composite dielectric constant with the gas in the spaces between the insulating material is not greater than about 3 over a predetermined distance. An integrated circuit having a plurality of semiconductor devices being interconnected by conductive lines separated by insulating material and spaces containing a gas, composite dielectric constant of which is not greater than about 3 over a predetermined distance.Type: GrantFiled: April 20, 1998Date of Patent: November 30, 1999Assignee: Advanced Micro Devices, Inc.Inventors: Peng Fang, Homi Fatemi