Patents by Inventor Peng Huang
Peng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250248988Abstract: Novel combination therapies involving nitroxoline, its analogue or pharmaceutically acceptable salt thereof with at least one additional anti-cancer chemotherapy or immunotherapy agent are described. Related kits, pharmaceutical compositions and methods of production arlinee also described.Type: ApplicationFiled: April 25, 2025Publication date: August 7, 2025Inventors: Ke Pan, Peng Huang, Qiang Li
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Publication number: 20250226592Abstract: An antenna apparatus includes an antenna array. An antenna element in the antenna array includes a metal ground plane, a first support layer, disposed on a side of the metal ground plane and spaced from the metal ground plane, a radiating patch, disposed on a side surface that is of the first support layer and that is away from the metal ground plane, a feed network, disposed on a side surface that is of the first support layer and that faces the metal ground plane, and spaced from the metal ground plane, and a feed structure disposed on the first support layer. The feed network feeds the radiating patch through a corresponding feed structure. The radiating patch includes a first patch body and a first window. A vertical projection of the feed network onto a plane on which the radiating patch is located at least partially overlaps the first patch body.Type: ApplicationFiled: March 26, 2025Publication date: July 10, 2025Inventors: Meiqing QI, Peng HUANG, Yinhua YU
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Patent number: 12342689Abstract: A display substrate is provided. The display substrate includes: a base substrate; a light-shielding layer disposed on the base substrate, the light-shielding layer comprising a light-shielding region; and a pixel drive layer disposed on a side of the light-shielding layer away from the base substrate, the pixel drive layer including at least one first thin-film transistor, at least one second thin-film transistor, and a first electrode plate of at least one storage capacitor, wherein the first thin-film transistor is disposed in correspondence with the light-shielding region, the second thin-film transistor in correspondence with the light-shielding region, and the at least one first electrode plate are disposed in correspondence with the light-shielding region.Type: GrantFiled: November 2, 2021Date of Patent: June 24, 2025Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Yanqiang Wang, Tao Gao, Peng Huang, Ke Liu, Yuanzheng Guo
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Patent number: 12310960Abstract: Novel combination therapies involving nitroxoline, its analogue or pharmaceutically acceptable salt thereof with at least one additional anti-cancer chemotherapy or immunotherapy agent are described. Related kits, pharmaceutical compositions and methods of production arlinee also described.Type: GrantFiled: March 29, 2022Date of Patent: May 27, 2025Assignee: Jiangsu Yahong Meditech Co., Ltd.Inventors: Ke Pan, Peng Huang, Qiang Li
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Publication number: 20250169079Abstract: A method of forming a semiconductor structure. A memory structure is formed on a substrate in the memory array region. A dielectric layer is deposited over the memory array region and peripheral region to cover the memory structure. A reverse etching process is performed to remove part of the dielectric layer from the central area of the memory array region, thereby forming an upwardly protruding wall structure along perimeter of the memory array region. The remaining thickness of the dielectric layer in the central area is equal to the sum of a polishing buffer thickness and a target thickness. A first polishing process is performed to remove the upwardly protruding wall structure from the memory array region. A second polishing process is performed to remove upper portion of the dielectric layer with the polishing buffer thickness from the memory array region.Type: ApplicationFiled: January 4, 2024Publication date: May 22, 2025Applicant: UNITED MICROELECTRONICS CORP.Inventors: Fu-Shou Tsai, Chau-Chung Hou, Yong-Yi Lin, Yang-Ju Lu, Yu-Lung Shih, Ren-Peng Huang, Ching-Yang Chuang
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Patent number: 12283319Abstract: An operating circuit and an operating method of a resistive random-access memory are provided, the operating circuit includes: at least one capacitance connected in series with the resistive random-access memory, so that the resistive random-access memory is grounded through the at least one capacitance. The operating method includes: connecting at least one capacitance in series with a resistive random-access memory, so that the resistive random-access memory is grounded through the capacitance; applying a forming pulse voltage or a set pulse voltage on the resistive random-access memory to achieve a forming operation or a set operation of the resistive random-access memory.Type: GrantFiled: August 2, 2019Date of Patent: April 22, 2025Assignee: PEKING UNIVERSITYInventors: Peng Huang, Yizhou Zhang, Yulin Feng, Jinfeng Kang, Xiaoyan Liu, Lifeng Liu
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Patent number: 12272388Abstract: A data storage device comprises a disk; a head configured to read data from and write data to the disk; and a current balancer configured to receive a first voltage supply having a load limit and to receive a second voltage supply. The current balancer is further configured, to mitigate rotational vibration (RV) noise, to sample a first current IH5V drawn from the first voltage supply, to maintain a difference between the first current IH5V and a current balancer threshold parameter IThreshold to be at least twice a minimum peak current minCurrentLimitpk amount required for turn on of the current balancer (IH5V?IThreshold?2*minCurrentLimitpk), and to draw a second current from the second voltage supply to satisfy a part of a total load on the first voltage supply that exceeds the load limit.Type: GrantFiled: August 10, 2023Date of Patent: April 8, 2025Assignee: Western Digital Technologies, Inc.Inventors: Brian Johnson, Peng Huang, Christopher B. Larsen
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Patent number: 12267076Abstract: The present disclosure discloses a clock and data recovery circuit. A sampling circuit performs burst mode over-sampling on an input analog data signal according to a sampling timing in a burst mode to generate over-sampling results. A selection circuit determines neighboring two of the over-sampling results having opposite logic states in the burst mode to select data edge sampling results and data center sampling results interlaced with each other and having the same time period with input analog data signal from the over-sampling results accordingly to be output sampling results. A phase detection circuit performs phase detection according to the output sampling result to generate a phase locking direction. A phase adjusting circuit adjusts the sampling timing of the sampling circuit according to the phase locking direction to track the input analog data signal.Type: GrantFiled: August 25, 2023Date of Patent: April 1, 2025Assignee: REALTEK SEMICONDUCTOR CORPORATIONInventors: Chi-Kung Kuan, Li-Jun Gu, Peng Huang, Chia-Peng Fang, Zhi-Yong Tang
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Patent number: 12266858Abstract: An antenna structure includes a driven element and at least two parasitic elements. The at least two parasitic elements are disposed around the driven element and spaced apart from the driven element. Each parasitic element is provided with a switch control module, the switch control module has at least two switch statuses, and each of the switch statuses of the switch control module corresponds to one electrical length of the parasitic element.Type: GrantFiled: January 4, 2022Date of Patent: April 1, 2025Assignee: VIVO MOBILE COMMUNICATION CO., LTD.Inventors: Yihua Xie, Peng Huang
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Publication number: 20250104769Abstract: The present disclosure provides a complementary phototransistor pixel unit, a sensing and computing array structure and an operation method thereof. The complementary phototransistor pixel unit includes: a first photoelectric field effect transistor, which is a photoelectric field effect transistor based on an ultra-thin body and buried oxide layer; and a second photoelectric field effect transistor, the second photoelectric field effect transistor is a photoelectric field effect transistor based on an ultra-thin body and buried oxide layer, each of the first photoelectric field effect transistor and the second photoelectric field effect transistor is four-end device and has a gate electrode G, a source electrode S, a drain electrode D, and a well base electrode B, and the source electrode S or drain electrode D of the first photoelectric field effect transistor is connected to the source electrode S or drain electrode D of the second photoelectric field effect transistor.Type: ApplicationFiled: October 31, 2022Publication date: March 27, 2025Applicant: PEKING UNIVERSITYInventors: Zheng ZHOU, Jiaqi LI, Guihai YU, Jinfeng KANG, Xiaoyan LIU, Peng HUANG
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Publication number: 20250090823Abstract: A microneedle patch for enhancing accumulation of PpIX in a solid tumor and a preparation method therefor. The method includes steps of: dissolving albumin into Dubos medium, taking the albumin as a template, adding CuCl2 and CaCl2 for mineralization to obtain CCP nanoparticles; loading CAT and 5-ALA onto a surface of the CCP nanoparticles by a one-step carbodiimide coupling method and an electrostatic-adsorption method, respectively, to obtain CCPCA nanoparticles; loading the CCPCA nanoparticles and microneedle-matrix solution into a microneedle mold, after vacuum drying and demolding, obtaining the microneedle patch for enhancing accumulation of PpIX in a solid tumor.Type: ApplicationFiled: July 1, 2022Publication date: March 20, 2025Applicant: SHENZHEN UNIVERSITYInventors: Peng HUANG, Gang HE, Yashi LI, Jing LIN
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Publication number: 20250078881Abstract: The present disclosure provides a method and an apparatus for operating an in-memory computing architecture applied to a neural network and a device, the method includes: generating a mono-pulse input signal based on discrete time coding; inputting the mono-pulse input signal into a memory array of the in-memory computing architecture to generate a bit line current signal corresponding to the memory array; and controlling a neuron circuit of the in-memory computing architecture to output a mono-pulse output signal based on discrete time coding according to the bit line current signal, wherein the mono-pulse output signal is configured as a mono-pulse input signal of a memory array of the next layer of neural network in the next in-memory computing cycle.Type: ApplicationFiled: June 17, 2022Publication date: March 6, 2025Applicant: Peking UniversityInventors: Peng HUANG, Lixia HAN, Xiaoyan LIU, Jinfeng KANG
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Publication number: 20250078843Abstract: The present invention discloses a method for designing an interference noise of speech based on the human speech structure, including the following steps: (1): obtaining a large amount of speech data containing different speakers and different speech contents, extracting voiceprint information, and then building an initial speech data set; (2): for each user, obtaining a small amount of speech data of the user, extracting voiceprint information, and then matching the most similar speech data in the initial speech data set; (3): performing data augmentation on the matched speech data; (4): segmenting the augmented speech data with a phoneme segmentation algorithm to form a vowel data set and a consonant data set; (5): constructing three noise sequences based on the vowel data set and the consonant data set, and performing superimposition to obtain an interference noise; and (6): continuously generating and playing randomly generated interference noise, and continuously injecting the interference noise into recType: ApplicationFiled: December 21, 2022Publication date: March 6, 2025Inventors: ZHONGJIE BA, PENG HUANG, YAO WEI, PENG CHENG, LI LU, FENG LIN, ZHENGUANG LIU, KUI REN
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Publication number: 20250070786Abstract: The present disclosure discloses a clock and data recovery circuit. A sampling circuit performs burst mode over-sampling on an input analog data signal according to a sampling timing in a burst mode to generate over-sampling results. A selection circuit determines neighboring two of the over-sampling results having opposite logic states in the burst mode to select data edge sampling results and data center sampling results interlaced with each other and having the same time period with input analog data signal from the over-sampling results accordingly to be output sampling results. A phase detection circuit performs phase detection according to the output sampling result to generate a phase locking direction. A phase adjusting circuit adjusts the sampling timing of the sampling circuit according to the phase locking direction to track the input analog data signal.Type: ApplicationFiled: August 25, 2023Publication date: February 27, 2025Inventors: CHI-KUNG KUAN, LI-JUN GU, PENG HUANG, CHIA-PENG FANG, ZHI-YONG TANG
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Publication number: 20250061047Abstract: Self-tuning merged code testing is provided which includes testing merged code using a suite of test cases, where the merged code includes one or more code changes, and obtaining, based on the testing, a test case failure using the suite of test cases. Further, the process includes determining, using an artificial intelligence engine, a likely faulty code change of the one or more code changes resulting in the test case failure, and customizing, based on the likely faulty code change, the suite of test cases to facilitate verifying that the likely faulty code change is a faulty code change. In addition, the process includes continuing testing of the merged code using the customized suite of test cases to facilitate verifying that the likely faulty code change is the faulty code change.Type: ApplicationFiled: August 16, 2023Publication date: February 20, 2025Inventors: Sheng Yan SUN, Ting Ting WEN, Peng Hui JIANG, Wu DI, Qing Zhi YU, Peng HUANG
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Publication number: 20250047021Abstract: An electrical connector includes a first set of conductors, a first overmolding in physical contact with a body portion of each of the first set of conductors, a second set of conductors, a second overmolding in physical contact with the body portion of each of the second set of conductors, and a spacer in contact with the first overmolding and the second overmolding. A gap is present between the spacer and at least one of the first set of conductors and a gap between the spacer and at least one of the second set of conductors.Type: ApplicationFiled: October 25, 2024Publication date: February 6, 2025Applicant: Amphenol FCI Asia Pte. Ltd.Inventors: Yaohua Hou, Qiaoli Chen, Peng Huang, Zhineng Fan, Luyun Yi
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Publication number: 20250045878Abstract: The present disclosure provides a method and a system for image generation. The method may include: obtaining an initial image, the initial image being an image generated by a generator and including a specified target; determining, in the initial image, a partial image of the specified target; generating a fusion image including the specified target by performing an image fusion based on a background image and the partial image of the specified target; and generating a target sample image based on the fusion image.Type: ApplicationFiled: October 23, 2024Publication date: February 6, 2025Applicant: ZHEJIANG DAHUA TECHNOLOGY CO., LTD.Inventors: Xiangming ZHOU, Peng HUANG, Li WU, Jun YIN
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Patent number: 12193154Abstract: The present disclosure provides a wiring structure, a display substrate and a display device, and belongs to the field of display technology. The wiring structure of the present disclosure comprises a body portion provided with hollow patterns; the body portion has a first side and a second side which are provided opposite to each other along an extending direction of the wiring structure, and both the first and second sides are wavy; the body portion comprises a plurality of conductive elements sequentially connected along the extending direction of the wiring structure; and in each conductive element, a length of a protruding portion on the first side in the extending direction of the wiring structure is different from that of a protruding portion on the second side in the extending direction of the wiring structure.Type: GrantFiled: April 28, 2023Date of Patent: January 7, 2025Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Zhifeng Zhan, Peng Huang, Yanxin Wang, Shuquan Yang, Wei Wang
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Publication number: 20250006440Abstract: An airtight switch adapted for an airtight device comprises an enclosure and a lid structure which are adapted to be joined with each other at a junction plane. The airtight switch includes a slider disposed at one of the enclosure or the lid structure. The airtight switch includes a contact element disposed at the other of the enclosure or the lid structure. The contact element has a sloped surface, and the slider selectively abuts against the sloped surface. The airtight switch includes a linear drive device adapted to drive the slider to move linearly in a sliding direction. The sliding direction is parallel to the junction plane and non-perpendicular to a normal vector of the sloped surface. The airtight switch is adapted to be applied in an airtight device needing a switch with good sealing and airtightness.Type: ApplicationFiled: December 18, 2023Publication date: January 2, 2025Inventors: CHUNG-PENG HUANG, FANG-YI LIN, KUAN-LIN CHEN, CHUN-CHING KUO
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Publication number: 20250003669Abstract: An exhaust condensation recovery device for solving an issue of difficulties in removing a gaseous working fluid diffused in an outer hood. An exhaust condensation recovery device includes a housing, including a gas inflow portion, a liquid inflow portion and a gas outflow portion, the housing including therein an accommodating chamber, wherein a liquid collection zone is formed below accommodating chamber, and the liquid outflow portion is in communication with the liquid collection zone; and a cooling module, forming a condensation channel in the accommodating chamber, wherein the condensation channel is located above the liquid collection zone, and two ends of the condensation channel are respectively in communication with the gas inflow portion and the gas outflow portion.Type: ApplicationFiled: February 1, 2024Publication date: January 2, 2025Inventors: CHUNG-PENG HUANG, FANG-YI LIN, KUAN-LIN CHEN, CHUN-CHING KUO