Abstract: The present disclosure provides a memory block and its control method. The method includes: performing row-selection operation on at least a portion of at least one row of multiple rows of word lines in the memory block to select at least a portion of at least one row of memory cells; performing column-selection operation on at least one column of memory cells of at least one of multiple memory subarrays to select at least one memory cells to perform a memory operation.

Abstract: The invention relates to pyrido[2,3-d]pyrimidine compound WB3 and its preparation method and application. The structure of WB3 is as follows, and the invention also relates to a pharmaceutical composition of WB3. Moreover, the invention also provides applications of the WB3 in the preparation of drugs for the treatment and prevention of HIV.

Abstract: The present invention belongs to the field of pharmaceutical technology, specifically disclosing a class of thienopyrimidine compounds with the general formula I, theirs stereoisomeric forms, stereoisomeric mixtures and pharmaceutically acceptable salts, hydrates and solvents. Also including theirs polycrystalline and eutectic, prodrugs and derivatives with same biologically functional, methods for their preparation, and compositions containing one or more of these compounds in the drugs application of treatment and prevention of human immunodeficiency virus (HIV).

Abstract: A complex programmable logic device includes a SGPIO analyzing circuit, a I2C analyzing circuit and a first multiplexer. The SGPIO analyzing circuit has a plurality of port analyzing circuits, a detecting circuit and a processing circuit. Each port analyzing circuit receives an input signal and outputs a first data. The detecting circuit detects the input signal of the first port analyzing circuit to output a detecting signal. The processing circuit captures port information of the first data outputted by at least part of the port analyzing circuits as a first control signal according to the detecting signal. The I2C analyzing circuit analyzes a data flow for outputting a second control signal according to an address command related to an address message, a control command and an input data. The first multiplexer selects the first control signal or the second control to be outputted according to a testing signal.

Abstract: The present invention belongs to the field of pharmaceutical technology, specifically disclosing thiazolopyrimidine compounds with the general formulas I and II. Also including theirs polycrystalline and eutectic, prodrugs and derivatives with same biologically functional, methods for their preparation, and compositions containing one or more of these compounds in the drugs application of treatment and prevention of human immunodeficiency virus.

Abstract: The present invention belongs to the field of pharmaceutical technology, specifically disclosing five-membered non-aromatic pyrimidines compounds with the general formulas I. Also including theirs polycrystalline and eutectic, prodrugs and derivatives with same biologically functional, methods for their preparation, and compositions containing one or more of these compounds in the drugs application of treatment and prevention of human immunodeficiency virus.

Abstract: A display method includes acquiring continuous input data input on an input apparatus of an electronic device and, in response to an input position of initial input data of the continuous input data satisfies a position condition during a process of continuously acquiring the continuous input data, adjusting a range of a target region on the input apparatus to keep an input position of the continuous input data within the range of the target region after being adjusted. The target region is configured to at least control a position of an indicator on a display apparatus of the electronic device.

Abstract: A complex programmable logic device includes a SGPIO analyzing circuit, a I2C analyzing circuit and a first multiplexer. The SGPIO analyzing circuit has a plurality of port analyzing circuits, a detecting circuit and a processing circuit. Each port analyzing circuit receives an input signal and outputs a first data. The detecting circuit detects the input signal of the first port analyzing circuit to output a detecting signal. The processing circuit captures port information of the first data outputted by at least part of the port analyzing circuits as a first control signal according to the detecting signal. The I2C analyzing circuit analyzes a data flow for outputting a second control signal according to an address command related to an address message, a control command and an input data. The first multiplexer selects the first control signal or the second control to be outputted according to a testing signal.

Abstract: A power control device comprises the following elements. An input assembly has a switch and is electrically connected to a first actuator, and generates a trigger signal according to a state of the switch or a control signal inputted from the first actuator. A calculating assembly is electrically connected to the input assembly and outputs a first signal from a control output terminal and a second signal from a feedback output terminal when the calculating assembly receives the trigger signal. An output assembly is electrically connected to the control output terminal of the calculating assembly for receiving the first signal and changes a power-on/off state of a controlled device when a voltage level of the first signal changes. A feedback assembly is electrically connected to the feedback output terminal of the calculating assembly and outputs a feedback signal to the first actuator according to the second signal.

Abstract: A fan control circuit comprises: a fan controller connected with at least one fan connector, connected with a baseboard management controller (BMC) via integrated circuit bus communication lines and outputting a BMC fan signal wherein said fan controller is powered by a main power supply, and a baseboard status detection circuit connected with the BMC and the fan controller respectively, detecting a heartbeat signal of the BMC, and controlling an output of a fan pulse signal according to the heartbeat signal so as to control a fan connected with the fan controller to operate normally.

Abstract: The present invention belongs to the field of pharmaceutical technology, specifically disclosing five-membered non-aromatic pyrimidines compounds with the general formulas I. Also including theirs polycrystalline and eutectic, prodrugs and derivatives with same biologically functional, methods for their preparation, and compositions containing one or more of these compounds in the drugs application of treatment and prevention of human immunodeficiency virus.

Abstract: The present invention belongs to the field of pharmaceutical technology, specifically disclosing thiazolopyrimidine compounds with the general formulas I and II. Also including theirs polycrystalline and eutectic, prodrugs and derivatives with same biologically functional, methods for their preparation, and compositions containing one or more of these compounds in the drugs application of treatment and prevention of human immunodeficiency virus.

Abstract: A power control device comprises the following elements. An input assembly has a switch and is electrically connected to a first actuator, and generates a triggered signal according to a state of the switch or a control signal inputted from the first actuator. A calculating assembly is electrically connected to the input assembly and outputs a first signal from a control output terminal and a second signal from a feedback output terminal when the calculating assembly receives the triggered signal. An output assembly is electrically connected to the control output terminal of the calculating assembly for receiving the first signal and changes a power-on/off state of a controlled device when a voltage level of the first signal changes. A feedback assembly is electrically connected to the feedback output terminal of the calculating assembly and outputs a feedback signal to the first actuator according to the second signal.

Abstract: The disclosure provides a server system, which comprises the following elements. A plurality of computing nodes and a plurality of storage nodes start to operate after the computing nodes and the storage nodes are actuated. A switch is electrically connected to the computing nodes through a plurality of first ports, and the switch is electrically connected to the storage nodes through a plurality of second ports. A rack management controller is electrically connected to the computing nodes, the storage nodes, and the switch. When the rack management controller receives a demand of hardware resource, the rack management controller controls the switch to connect to at least a part of the computing nodes and at least a part of the storage nodes according to the demand of hardware resource.

Abstract: The invention provides server including a casing. The casing has back panel area. The back panel area is located at air outlet of the server. Package substrate, up HDD back panel and down HDD back panel are horizontally disposed on the back panel area. Motherboard of the server is communicatively connected to the package substrate via first connector. The package substrate is communicatively connected to the up HDD back panel via second connector. The up HDD back panel is communicatively connected to the down HDD back panel via third connector. The server of the invention has high dense storage devices, very high space utilization, and innovative heat dissipation channels design. The server has high configuration flexibility and expansibility, can be operated in a simple manner, and can support apparatus that are power-consuming and operating in standby mode.